+++ /dev/null
-#
-# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-3-Clause
-#
-
-PLAT_BL_COMMON_SOURCES += plat/arm/board/common/board_css_common.c
-
-include plat/arm/board/common/board_common.mk
+++ /dev/null
-/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#include <arm_def.h>
-#include <plat_arm.h>
-
-/*
- * Table of memory regions for different BL stages to map using the MMU.
- * This doesn't include Trusted SRAM as arm_setup_page_tables() already
- * takes care of mapping it.
- */
-#ifdef IMAGE_BL1
-const mmap_region_t plat_arm_mmap[] = {
- ARM_MAP_SHARED_RAM,
- V2M_MAP_FLASH0_RW,
- V2M_MAP_IOFPGA,
- CSS_MAP_DEVICE,
- SOC_CSS_MAP_DEVICE,
-#if TRUSTED_BOARD_BOOT
- /* Map DRAM to authenticate NS_BL2U image. */
- ARM_MAP_NS_DRAM1,
-#endif
- {0}
-};
-#endif
-#ifdef IMAGE_BL2
-const mmap_region_t plat_arm_mmap[] = {
- ARM_MAP_SHARED_RAM,
- V2M_MAP_FLASH0_RW,
-#ifdef PLAT_ARM_MEM_PROT_ADDR
- ARM_V2M_MAP_MEM_PROTECT,
-#endif
- V2M_MAP_IOFPGA,
- CSS_MAP_DEVICE,
- SOC_CSS_MAP_DEVICE,
- ARM_MAP_NS_DRAM1,
-#ifdef AARCH64
- ARM_MAP_DRAM2,
-#endif
-#ifdef SPD_tspd
- ARM_MAP_TSP_SEC_MEM,
-#endif
-#ifdef SPD_opteed
- ARM_MAP_OPTEE_CORE_MEM,
- ARM_OPTEE_PAGEABLE_LOAD_MEM,
-#endif
- {0}
-};
-#endif
-#ifdef IMAGE_BL2U
-const mmap_region_t plat_arm_mmap[] = {
- ARM_MAP_SHARED_RAM,
- CSS_MAP_DEVICE,
- CSS_MAP_SCP_BL2U,
- V2M_MAP_IOFPGA,
- SOC_CSS_MAP_DEVICE,
- {0}
-};
-#endif
-#ifdef IMAGE_BL31
-const mmap_region_t plat_arm_mmap[] = {
- ARM_MAP_SHARED_RAM,
- V2M_MAP_IOFPGA,
- CSS_MAP_DEVICE,
-#ifdef PLAT_ARM_MEM_PROT_ADDR
- ARM_V2M_MAP_MEM_PROTECT,
-#endif
- SOC_CSS_MAP_DEVICE,
- {0}
-};
-#endif
-#ifdef IMAGE_BL32
-const mmap_region_t plat_arm_mmap[] = {
-#ifdef AARCH32
- ARM_MAP_SHARED_RAM,
-#ifdef PLAT_ARM_MEM_PROT_ADDR
- ARM_V2M_MAP_MEM_PROTECT,
-#endif
-#endif
- V2M_MAP_IOFPGA,
- CSS_MAP_DEVICE,
- SOC_CSS_MAP_DEVICE,
- {0}
-};
-#endif
-
-ARM_CASSERT_MMAP
--- /dev/null
+/*
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#include <arm_def.h>
+#include <plat_arm.h>
+
+/*
+ * Table of memory regions for different BL stages to map using the MMU.
+ * This doesn't include Trusted SRAM as arm_setup_page_tables() already
+ * takes care of mapping it.
+ */
+#ifdef IMAGE_BL1
+const mmap_region_t plat_arm_mmap[] = {
+ ARM_MAP_SHARED_RAM,
+ V2M_MAP_FLASH0_RW,
+ V2M_MAP_IOFPGA,
+ CSS_MAP_DEVICE,
+ SOC_CSS_MAP_DEVICE,
+#if TRUSTED_BOARD_BOOT
+ /* Map DRAM to authenticate NS_BL2U image. */
+ ARM_MAP_NS_DRAM1,
+#endif
+ {0}
+};
+#endif
+#ifdef IMAGE_BL2
+const mmap_region_t plat_arm_mmap[] = {
+ ARM_MAP_SHARED_RAM,
+ V2M_MAP_FLASH0_RW,
+#ifdef PLAT_ARM_MEM_PROT_ADDR
+ ARM_V2M_MAP_MEM_PROTECT,
+#endif
+ V2M_MAP_IOFPGA,
+ CSS_MAP_DEVICE,
+ SOC_CSS_MAP_DEVICE,
+ ARM_MAP_NS_DRAM1,
+#ifdef AARCH64
+ ARM_MAP_DRAM2,
+#endif
+#ifdef SPD_tspd
+ ARM_MAP_TSP_SEC_MEM,
+#endif
+#ifdef SPD_opteed
+ ARM_MAP_OPTEE_CORE_MEM,
+ ARM_OPTEE_PAGEABLE_LOAD_MEM,
+#endif
+ {0}
+};
+#endif
+#ifdef IMAGE_BL2U
+const mmap_region_t plat_arm_mmap[] = {
+ ARM_MAP_SHARED_RAM,
+ CSS_MAP_DEVICE,
+ CSS_MAP_SCP_BL2U,
+ V2M_MAP_IOFPGA,
+ SOC_CSS_MAP_DEVICE,
+ {0}
+};
+#endif
+#ifdef IMAGE_BL31
+const mmap_region_t plat_arm_mmap[] = {
+ ARM_MAP_SHARED_RAM,
+ V2M_MAP_IOFPGA,
+ CSS_MAP_DEVICE,
+#ifdef PLAT_ARM_MEM_PROT_ADDR
+ ARM_V2M_MAP_MEM_PROTECT,
+#endif
+ SOC_CSS_MAP_DEVICE,
+ {0}
+};
+#endif
+#ifdef IMAGE_BL32
+const mmap_region_t plat_arm_mmap[] = {
+#ifdef AARCH32
+ ARM_MAP_SHARED_RAM,
+#ifdef PLAT_ARM_MEM_PROT_ADDR
+ ARM_V2M_MAP_MEM_PROTECT,
+#endif
+#endif
+ V2M_MAP_IOFPGA,
+ CSS_MAP_DEVICE,
+ SOC_CSS_MAP_DEVICE,
+ {0}
+};
+#endif
+
+ARM_CASSERT_MMAP
PLAT_INCLUDES := -Iplat/arm/board/juno/include \
-Iplat/arm/css/drivers/sds
-PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S
+PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S \
+ plat/arm/board/juno/juno_common.c
# Flag to enable support for AArch32 state on JUNO
JUNO_AARCH32_EL3_RUNTIME := 0
# Do not enable SVE
ENABLE_SVE_FOR_NS := 0
-include plat/arm/board/common/board_css.mk
+include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk
include plat/arm/soc/common/soc_css.mk
include plat/arm/css/common/css_common.mk