perf tools: Allow building for ARM

Add definitions of rmb() and cpu_relax() and include the ARM
unistd.h header. The __kuser_memory_barrier helper in the helper
page is used to provide the correct memory barrier depending on
the CPU type.

[ The rmb() will work on v6 and v7, segfault on v5. Dynamic
  detection to add v5 support will be added later. ]

Signed-off-by: Jamie Iles <jamie.iles@picochip.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Mikael Pettersson <mikpe@it.uu.se>
LKML-Reference: <1260534009-5394-1-git-send-email-jamie.iles@picochip.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index 454d5d55f32d9cb30d8206c6f03bfe1e0b5f61fb..75f941bfba9eb897b0bdd3075a450425536ac74c 100644 (file)
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -59,6 +59,18 @@
 #define cpu_relax()    asm volatile ("hint @pause" ::: "memory")
 #endif
 
+#ifdef __arm__
+#include "../../arch/arm/include/asm/unistd.h"
+/*
+ * Use the __kuser_memory_barrier helper in the CPU helper page. See
+ * arch/arm/kernel/entry-armv.S in the kernel source for details.
+ */
+#define rmb()          asm volatile("mov r0, #0xffff0fff; mov lr, pc;" \
+                                    "sub pc, r0, #95" ::: "r0", "lr", "cc", \
+                                    "memory")
+#define cpu_relax()    asm volatile("":::"memory")
+#endif
+
 #include <time.h>
 #include <unistd.h>
 #include <sys/types.h>