si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) || \
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx)
# SPDX-License-Identifier: GPL-2.0+
#
-PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 \
+PLATFORM_CPPFLAGS += -DCONFIG_MPC8260 -DCONFIG_CPM2 \
-mstring -mcpu=603e -mmultiple
#include <mpc8260.h>
#include <version.h>
-#define CONFIG_8260 1 /* needed for Linux kernel header files */
-
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <mpc8260.h>
#include <version.h>
-#define CONFIG_8260 1 /* needed for Linux kernel header files */
-
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#elif defined(CONFIG_GEMINI)
#define _machine _MACH_gemini
#define have_of 0
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#define _machine _MACH_8260
#define have_of 0
#elif defined(CONFIG_SANDPOINT)
#ifndef CONFIG_BOARD_SPECIFIC_LED
# if defined(CONFIG_8xx)
# include <mpc8xx.h>
-# elif defined(CONFIG_8260)
+# elif defined(CONFIG_MPC8260)
# include <mpc8260.h>
# elif defined(CONFIG_5xx)
# include <mpc5xx.h>
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
serial_init,
console_init_f,
display_options,
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
prt_8260_rsr,
prt_8260_clks,
-#endif /* CONFIG_8260 */
+#endif /* CONFIG_MPC8260 */
#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
#endif
-#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#define SPACE_REQUIRED ((32*4)+(32*8)+(6*4))
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
/* store floating double indexed */
#define STFDI(n,p) __asm__ __volatile__ ("stfd " #n ",%0" : "=o"(p[2*n]))
/* store floating double multiple */
*ptr++ = regs->gpr[i];
/* Floating Point Regs */
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
STFDM(ptr);
ptr += 32*2;
#else
/* set the value of the CPU registers */
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
/* load floating double */
#define LFD(n,v) __asm__ __volatile__ ("lfd " #n ",%0" :: "o"(v))
/* load floating double indexed */
regs->gpr[regno] = *ptr;
else switch (regno) {
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
#define caseF(n) \
case (n) + 32: LFD(n, *ptr); break;
regs->gpr[i] = *ptr++;
/* Floating Point Regs */
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
LFDM(ptr);
#endif
ptr += 32*2;
/* ------------------------------------------------------------------------- */
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
#include <ioports.h>
}
};
-#endif /* CONFIG_8260 */
+#endif /* CONFIG_MPC8260 */
/* ------------------------------------------------------------------------- */
#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
- (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE))
+ (defined(CONFIG_MPC8260) && defined(CONFIG_CONS_NONE))
#if CONFIG_CONS_INDEX == 1
#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
#ifndef _HYMOD_H_
#define _HYMOD_H_
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
#include <asm/iopin_8260.h>
#endif
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
#endif
-#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#endif
display_options, /* say that we are here */
display_text_info, /* show debugging info if required */
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
prt_8260_rsr,
prt_8260_clks,
-#endif /* CONFIG_8260 */
+#endif /* CONFIG_MPC8260 */
#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
print_num("sramstart", bd->bi_sramstart);
print_num("sramsize", bd->bi_sramsize);
#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
- defined(CONFIG_8260) || defined(CONFIG_E500)
+ defined(CONFIG_MPC8260) || defined(CONFIG_E500)
print_num("immr_base", bd->bi_immr_base);
#endif
print_num("bootflags", bd->bi_bootflags);
#include <common.h>
#include <command.h>
-#if defined(CONFIG_8xx) || defined(CONFIG_8260)
+#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260)
#if defined(CONFIG_8xx)
#include <asm/8xx_immap.h>
#include <commproc.h>
#include <asm/iopin_8xx.h>
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#include <asm/immap_8260.h>
#include <asm/cpm_8260.h>
#include <asm/iopin_8260.h>
#if defined(CONFIG_8xx)
volatile sysconf8xx_t *sc = &immap->im_siu_conf;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile sysconf8260_t *sc = &immap->im_siu_conf;
#endif
printf ("SIPEND= %08x SIMASK= %08x\n", sc->sc_sipend, sc->sc_simask);
printf ("SIEL = %08x SIVEC = %08x\n", sc->sc_siel, sc->sc_sivec);
printf ("TESR = %08x SDCR = %08x\n", sc->sc_tesr, sc->sc_sdcr);
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
printf ("BCR = %08x\n", sc->sc_bcr);
printf ("P_ACR = %02x P_ALRH= %08x P_ALRL= %08x\n",
sc->sc_ppc_acr, sc->sc_ppc_alrh, sc->sc_ppc_alrl);
#if defined(CONFIG_8xx)
volatile memctl8xx_t *memctl = &immap->im_memctl;
int nbanks = 8;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile memctl8260_t *memctl = &immap->im_memctl;
int nbanks = 12;
#endif
printf ("MAR = %08x", memctl->memc_mar);
#if defined(CONFIG_8xx)
printf (" MCR = %08x\n", memctl->memc_mcr);
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
putc ('\n');
#endif
printf ("MAMR = %08x MBMR = %08x",
memctl->memc_mamr, memctl->memc_mbmr);
#if defined(CONFIG_8xx)
printf ("\nMSTAT = %04x\n", memctl->memc_mstat);
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
printf (" MCMR = %08x\n", memctl->memc_mcmr);
#endif
printf ("MPTPR = %04x MDR = %08x\n",
memctl->memc_mptpr, memctl->memc_mdr);
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
printf ("PSDMR = %08x LSDMR = %08x\n",
memctl->memc_psdmr, memctl->memc_lsdmr);
printf ("PURT = %02x PSRT = %02x\n",
return 0;
}
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
int
do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_8xx)
volatile car8xx_t *car = &immap->im_clkrst;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile car8260_t *car = &immap->im_clkrst;
#endif
printf ("SCCR = %08x\n", car->car_sccr);
printf ("PLPRCR= %08x\n", car->car_plprcr);
printf ("RSR = %08x\n", car->car_rsr);
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
printf ("SCCR = %08x\n", car->car_sccr);
printf ("SCMR = %08x\n", car->car_scmr);
printf ("RSR = %08x\n", car->car_rsr);
#define PB_NB_ODR 16
#define PC_NBITS 12
#define PD_NBITS 13
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#define PA_NBITS 32
#define PA_NB_ODR 32
#define PB_NBITS 28
#if defined(CONFIG_8xx)
volatile iop8xx_t *iop = &immap->im_ioport;
volatile ushort *l, *r;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile iop8260_t *iop = &immap->im_ioport;
volatile uint *l, *r;
#endif
#if defined(CONFIG_8xx)
l = &iop->iop_padir;
R = &immap->im_cpm.cp_pbdir;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
l = &iop->iop_pdira;
R = &iop->iop_pdirb;
#endif
binary ("PB_DIR", *R++, PB_NBITS);
binary ("PA_PAR", *l++, PA_NBITS);
binary ("PB_PAR", *R++, PB_NBITS);
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
binary ("PA_SOR", *l++, PA_NBITS);
binary ("PB_SOR", *R++, PB_NBITS);
#endif
#if defined(CONFIG_8xx)
l = &iop->iop_pcdir;
r = &iop->iop_pddir;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
l = &iop->iop_pdirc;
r = &iop->iop_pdird;
#endif
binary ("PC_SO ", *l++, PC_NBITS);
binary (" ", 0, 0);
r++;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
binary ("PC_SOR", *l++, PC_NBITS);
binary ("PD_SOR", *r++, PD_NBITS);
binary ("PC_ODR", *l++, PC_NBITS);
#if defined(CONFIG_8xx)
ulong clock = gd->cpu_clk;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
ulong clock = gd->arch.brg_clk;
#endif
#if defined(CONFIG_8xx)
volatile cpm8xx_t *cp = &immap->im_cpm;
volatile uint *p = &cp->cp_brgc1;
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile uint *p = &immap->im_brgc1;
#endif
int i = 1;
while (i <= 4)
prbrg (i++, *p++);
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
p = &immap->im_brgc5;
while (i <= 8)
prbrg (i++, *p++);
volatile i2c8xx_t *i2c = &immap->im_i2c;
volatile cpm8xx_t *cp = &immap->im_cpm;
volatile iic_t *iip = (iic_t *) & cp->cp_dparam[PROFF_IIC];
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
volatile i2c8260_t *i2c = &immap->im_i2c;
volatile iic_t *iip;
uint dpaddr;
""
);
-#ifdef CONFIG_8260
+#ifdef CONFIG_MPC8260
U_BOOT_CMD(
icinfo, 1, 1, do_icinfo,
"print Interrupt Controller registers",
extra-$(CONFIG_SPI_FLASH_ATMEL) += atmel_df_pow2
extra-$(CONFIG_MPC5xxx) += interrupt
extra-$(CONFIG_8xx) += test_burst timer
-extra-$(CONFIG_8260) += mem_to_mem_idma2intr
+extra-$(CONFIG_MPC8260) += mem_to_mem_idma2intr
extra-$(CONFIG_PPC) += sched
#
unsigned long bi_dsp_freq; /* dsp core frequency */
unsigned long bi_ddr_freq; /* ddr frequency */
#endif
-#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#include <mpc5xxx.h>
#elif defined(CONFIG_MPC512X)
#include <asm/immap_512x.h>
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#if defined(CONFIG_MPC8247) \
|| defined(CONFIG_MPC8248) \
|| defined(CONFIG_MPC8271) \
|| defined(CONFIG_MPC8272)
#define CONFIG_MPC8272_FAMILY 1
#endif
-#if defined(CONFIG_MPC8272_FAMILY)
-#define CONFIG_MPC8260 1
-#endif
#include <asm/immap_8260.h>
#endif
#ifdef CONFIG_MPC86xx
int get_clocks_866 (void);
int sdram_adjust_866 (void);
int adjust_sdram_tbs_8xx (void);
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
int prt_8260_clks (void);
#elif defined(CONFIG_MPC5xxx)
int prt_mpc5xxx_clks (void);
#endif
/* $(CPU)/cpu_init.c */
-#if defined(CONFIG_8xx) || defined(CONFIG_8260)
+#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260)
void cpu_init_f (volatile immap_t *immr);
#endif
#if defined(CONFIG_4xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MCF52x2) ||defined(CONFIG_MPC86xx)
#endif
int cpu_init_r (void);
-#if defined(CONFIG_8260)
+#if defined(CONFIG_MPC8260)
int prt_8260_rsr (void);
#elif defined(CONFIG_MPC83xx)
int prt_83xx_rsr (void);
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_CPU86 1 /* ...on a CPU86 board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_CPU87 1 /* ...on a CPU87 board */
#define CONFIG_PCI
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#define CONFIG_MPC8272_FAMILY 1
#define CONFIG_IDS8247 1
#define CPU_ID_STR "MPC8247"
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_IPHASE4539 1 /* ...on a Interphase 4539 PMC */
#define CONFIG_SYS_TEXT_BASE 0xffb00000
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MPC8260 /* This is an MPC8260 CPU */
#define CONFIG_ISPAN /* ...on one of Interphase iSPAN boards */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* details. :-(
*/
#define CONFIG_MPC8272 1
-#else
-#define CONFIG_MPC8260 1
#endif /* CONFIG_ADSTYPE == CONFIG_SYS_8272ADS */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_MPC8266ADS 1 /* ...on motorola ADS board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#define CONFIG_PM826 1 /* ...on a PM8260 module */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#define CONFIG_PM828 1 /* ...on a PM828 module */
#define CONFIG_CPM2 1 /* Has a CPM2 */
*
*****************************************************************************/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_RPXSUPER 1 /* on an Embedded Planet RPX Super Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
#ifdef CONFIG_MPC8248
#define CPU_ID_STR "MPC8248"
#else
-#define CONFIG_MPC8260
#define CPU_ID_STR "MPC8250"
#endif /* CONFIG_MPC8248 */
#define CONFIG_SYS_TEXT_BASE 0x40000000
-#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#if 0
#define CONFIG_TQM8260 100 /* ...on a TQM8260 module Rev.100 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is a MPC8260 CPU */
#define CONFIG_MPC8272_FAMILY 1
#define CONFIG_TQM8272 1
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_ZPC1900 1 /* ...on Zephyr ZPC.1900 board */
#define CONFIG_SYS_TEXT_BASE 0xFE000000
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_ATC 1 /* ...on a ATC board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
*
*****************************************************************************/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_EP8260 11 /* on an Embedded Planet EP8260 Board, Rev. 11 */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_MPC8260
#define CPU_ID_STR "MPC8270"
#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */
*
*****************************************************************************/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_GW8260 1 /* on an GW8260 Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_HYMOD 1 /* ...on a Hymod board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_8260 1
-#define CONFIG_MPC8260 1
#define CONFIG_MUAS3001 1
#define CONFIG_SYS_TEXT_BASE 0xFF000000
*
*****************************************************************************/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_PPMC8260 1 /* on an Wind River PPMC8260 Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
* (easy to change)
*/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_RSD_PROTO 1 /* on a R&S Protocol Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
*
*****************************************************************************/
-#define CONFIG_MPC8260 1 /* This is an MPC8260 CPU */
#define CONFIG_SACSng 1 /* munged for the SACSng */
#define CONFIG_CPM2 1 /* Has a CPM2 */
#define PLPRCR 0x00000284
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#define HID2 1011