drm/amdgpu/gfx9: allow updating sck slowdown and cp pg state

More stuff for gfx pg.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index c8f236de7116619a496ef6f8f4c77e7cd5f5cd4b..8e0f7e68be5c8cf89478796adbf6a2058218a917 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -3399,6 +3399,27 @@ static const struct amdgpu_rlc_funcs gfx_v9_0_rlc_funcs = {
 static int gfx_v9_0_set_powergating_state(void *handle,
                                          enum amd_powergating_state state)
 {
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+       switch (adev->asic_type) {
+       case CHIP_RAVEN:
+               if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) {
+                       gfx_v9_0_enable_sck_slow_down_on_power_up(adev, true);
+                       gfx_v9_0_enable_sck_slow_down_on_power_down(adev, true);
+               } else {
+                       gfx_v9_0_enable_sck_slow_down_on_power_up(adev, false);
+                       gfx_v9_0_enable_sck_slow_down_on_power_down(adev, false);
+               }
+
+               if (adev->pg_flags & AMD_PG_SUPPORT_CP)
+                       gfx_v9_0_enable_cp_power_gating(adev, true);
+               else
+                       gfx_v9_0_enable_cp_power_gating(adev, false);
+               break;
+       default:
+               break;
+       }
+
        return 0;
 }