[MIPS] SMTC: De-obscure Malta hooks.

Should now be understandable why the thing works ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile
index cb7f349b051448376a554749d4c4c1dc0c1963f8..377d9e8f250a31f717cf908ea5160c7c781d919e 100644 (file)
--- a/arch/mips/mips-boards/malta/Makefile
+++ b/arch/mips/mips-boards/malta/Makefile
@@ -21,4 +21,4 @@
 
 obj-y := malta_int.o malta_setup.o
 obj-$(CONFIG_MTD) += malta_mtd.o
-obj-$(CONFIG_SMP) += malta_smp.o
+obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o

diff --git a/arch/mips/mips-boards/malta/malta_smp.c b/arch/mips/mips-boards/malta/malta_smp.c
deleted file mode 100644 (file)
index cf96717..0000000
--- a/arch/mips/mips-boards/malta/malta_smp.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Malta Platform-specific hooks for SMP operation
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/cpumask.h>
-#include <linux/interrupt.h>
-
-#include <asm/atomic.h>
-#include <asm/cpu.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/hardirq.h>
-#include <asm/mmu_context.h>
-#include <asm/smp.h>
-#ifdef CONFIG_MIPS_MT_SMTC
-#include <asm/smtc_ipi.h>
-#endif /* CONFIG_MIPS_MT_SMTC */
-
-/* VPE/SMP Prototype implements platform interfaces directly */
-#if !defined(CONFIG_MIPS_MT_SMP)
-
-/*
- * Cause the specified action to be performed on a targeted "CPU"
- */
-
-void core_send_ipi(int cpu, unsigned int action)
-{
-/* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
-#ifdef CONFIG_MIPS_MT_SMTC
-       smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
-#endif /* CONFIG_MIPS_MT_SMTC */
-}
-
-/*
- * Platform "CPU" startup hook
- */
-
-void prom_boot_secondary(int cpu, struct task_struct *idle)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-       smtc_boot_secondary(cpu, idle);
-#endif /* CONFIG_MIPS_MT_SMTC */
-}
-
-/*
- * Post-config but pre-boot cleanup entry point
- */
-
-void prom_init_secondary(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-        void smtc_init_secondary(void);
-       int myvpe;
-
-       /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
-       myvpe = read_c0_tcbind() & TCBIND_CURVPE;
-       if (myvpe != 0) {
-               /* Ideally, this should be done only once per VPE, but... */
-               clear_c0_status(STATUSF_IP2);
-               set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3
-                               | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6
-                               | STATUSF_IP7);
-       }
-
-        smtc_init_secondary();
-#endif /* CONFIG_MIPS_MT_SMTC */
-}
-
-/*
- * Platform SMP pre-initialization
- *
- * As noted above, we can assume a single CPU for now
- * but it may be multithreaded.
- */
-
-void plat_smp_setup(void)
-{
-       if (read_c0_config3() & (1<<2))
-               mipsmt_build_cpu_map(0);
-}
-
-void __init plat_prepare_cpus(unsigned int max_cpus)
-{
-       if (read_c0_config3() & (1<<2))
-               mipsmt_prepare_cpus();
-}
-
-/*
- * SMP initialization finalization entry point
- */
-
-void prom_smp_finish(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-       smtc_smp_finish();
-#endif /* CONFIG_MIPS_MT_SMTC */
-}
-
-/*
- * Hook for after all CPUs are online
- */
-
-void prom_cpus_done(void)
-{
-}
-
-#endif /* CONFIG_MIPS32R2_MT_SMP */

diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c
new file mode 100644 (file)
index 0000000..d1c80f6
--- /dev/null
+++ b/arch/mips/mips-boards/malta/malta_smtc.c
@@ -0,0 +1,88 @@
+/*
+ * Malta Platform-specific hooks for SMP operation
+ */
+#include <linux/init.h>
+
+#include <asm/mipsregs.h>
+#include <asm/mipsmtregs.h>
+#include <asm/smtc.h>
+#include <asm/smtc_ipi.h>
+
+/* VPE/SMP Prototype implements platform interfaces directly */
+
+/*
+ * Cause the specified action to be performed on a targeted "CPU"
+ */
+
+void core_send_ipi(int cpu, unsigned int action)
+{
+       /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
+       smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
+}
+
+/*
+ * Platform "CPU" startup hook
+ */
+
+void prom_boot_secondary(int cpu, struct task_struct *idle)
+{
+       smtc_boot_secondary(cpu, idle);
+}
+
+/*
+ * Post-config but pre-boot cleanup entry point
+ */
+
+void prom_init_secondary(void)
+{
+        void smtc_init_secondary(void);
+       int myvpe;
+
+       /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
+       myvpe = read_c0_tcbind() & TCBIND_CURVPE;
+       if (myvpe != 0) {
+               /* Ideally, this should be done only once per VPE, but... */
+               clear_c0_status(STATUSF_IP2);
+               set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3
+                               | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6
+                               | STATUSF_IP7);
+       }
+
+        smtc_init_secondary();
+}
+
+/*
+ * Platform SMP pre-initialization
+ *
+ * As noted above, we can assume a single CPU for now
+ * but it may be multithreaded.
+ */
+
+void plat_smp_setup(void)
+{
+       if (read_c0_config3() & (1<<2))
+               mipsmt_build_cpu_map(0);
+}
+
+void __init plat_prepare_cpus(unsigned int max_cpus)
+{
+       if (read_c0_config3() & (1<<2))
+               mipsmt_prepare_cpus();
+}
+
+/*
+ * SMP initialization finalization entry point
+ */
+
+void prom_smp_finish(void)
+{
+       smtc_smp_finish();
+}
+
+/*
+ * Hook for after all CPUs are online
+ */
+
+void prom_cpus_done(void)
+{
+}