sata_fsl: Update RX_WATER_MARK for TRANSCFG

RX_WATER_MARK sets the number of locations in Rx FIFO that can be used before
the transport layer instructs the link layer to transmit HOLDS. Note that it
can take some time for the HOLDs to get to the other end, and that in the
interim there must be enough room in the FIFO to absorb all data that could
arrive.

Update the new recommended value to 16.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 2ddb567f165bca041708afb29434e967f0bd4d25..7f9eab34a386be7d44ef7690156f2dd882fa32f9 100644 (file)
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -185,6 +185,11 @@ enum {
        COMMANDSTAT = 0x20,
 };
 
+/* TRANSCFG (transport-layer) configuration control */
+enum {
+       TRANSCFG_RX_WATER_MARK = (1 << 4),
+};
+
 /* PHY (link-layer) configuration control */
 enum {
        PHY_BIST_ENABLE = 0x01,
@@ -1305,6 +1310,7 @@ static int sata_fsl_probe(struct platform_device *ofdev,
        struct sata_fsl_host_priv *host_priv = NULL;
        int irq;
        struct ata_host *host;
+       u32 temp;
 
        struct ata_port_info pi = sata_fsl_port_info[0];
        const struct ata_port_info *ppi[] = { &pi, NULL };
@@ -1319,6 +1325,12 @@ static int sata_fsl_probe(struct platform_device *ofdev,
        ssr_base = hcr_base + 0x100;
        csr_base = hcr_base + 0x140;
 
+       if (!of_device_is_compatible(ofdev->dev.of_node, "fsl,mpc8315-sata")) {
+               temp = ioread32(csr_base + TRANSCFG);
+               temp = temp & 0xffffffe0;
+               iowrite32(temp | TRANSCFG_RX_WATER_MARK, csr_base + TRANSCFG);
+       }
+
        DPRINTK("@reset i/o = 0x%x\n", ioread32(csr_base + TRANSCFG));
        DPRINTK("sizeof(cmd_desc) = %d\n", sizeof(struct command_desc));
        DPRINTK("sizeof(#define cmd_desc) = %d\n", SATA_FSL_CMD_DESC_SIZE);