MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes.
This patch resolves this for the ULL() macro by using ULL suffix instead
of the ull suffix.
Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01
Signed-off-by: David Cunado <david.cunado@arm.com>
- **#define : ADDR\_SPACE\_SIZE**
Defines the total size of the address space in bytes. For example, for a 32
- bit address space, this value should be ``(1ull << 32)``. This definition is
+ bit address space, this value should be ``(1ULL << 32)``. This definition is
now deprecated, platforms should use ``PLAT_PHY_ADDR_SPACE_SIZE`` and
``PLAT_VIRT_ADDR_SPACE_SIZE`` instead.
- **#define : PLAT\_VIRT\_ADDR\_SPACE\_SIZE**
Defines the total size of the virtual address space in bytes. For example,
- for a 32 bit virtual address space, this value should be ``(1ull << 32)``.
+ for a 32 bit virtual address space, this value should be ``(1ULL << 32)``.
- **#define : PLAT\_PHY\_ADDR\_SPACE\_SIZE**
Defines the total size of the physical address space in bytes. For example,
- for a 32 bit physical address space, this value should be ``(1ull << 32)``.
+ for a 32 bit physical address space, this value should be ``(1ULL << 32)``.
If the platform port uses the IO storage framework, the following constants
must also be defined:
# define U(_x) (_x)
# define ULL(_x) (_x)
#else
-# define U(_x) (_x##u)
-# define ULL(_x) (_x##ull)
+# define U(_x) (_x##U)
+# define ULL(_x) (_x##ULL)
#endif
/* Register size of the current architecture. */
* AArch64 builds
*/
#ifdef AARCH64
-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 36)
-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 36)
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 36)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 36)
#else
-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#endif
#define debug_print(...) ((void)0)
#endif
-#define UNSET_DESC ~0ull
+#define UNSET_DESC ~0ULL
static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES]
__aligned(XLAT_TABLE_SIZE) __section("xlat_table");
unsigned long long xlat_arch_get_max_supported_pa(void)
{
/* Physical address space size for long descriptor format. */
- return (1ull << 40) - 1ull;
+ return (1ULL << 40) - 1ULL;
}
#endif /* ENABLE_ASSERTIONS*/
/* All other values are reserved */
assert(pa_range < ARRAY_SIZE(pa_range_bits_arr));
- return (1ull << pa_range_bits_arr[pa_range]) - 1ull;
+ return (1ULL << pa_range_bits_arr[pa_range]) - 1ULL;
}
#endif /* ENABLE_ASSERTIONS*/
#define PWKUPR_OFF 0xc
#define PSYSR_OFF 0x10
-#define PWKUPR_WEN (1ull << 31)
+#define PWKUPR_WEN (1ULL << 31)
#define PSYSR_AFF_L2 (1 << 31)
#define PSYSR_AFF_L1 (1 << 30)
/*
* Platform specific page table and MMU setup constants
*/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#if defined(IMAGE_BL1) || defined(IMAGE_BL32)
#define MAX_XLAT_TABLES 3
/*
* Platform specific page table and MMU setup constants
*/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#if defined(IMAGE_BL1) || defined(IMAGE_BL31) || defined(IMAGE_BL32)
#define MAX_XLAT_TABLES 3
#define PLAT_POPLAR_NS_IMAGE_OFFSET 0x37000000
/* Page table and MMU setup constants */
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES (4)
#define MAX_MMAP_REGIONS (16)
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 7
#define MAX_MMAP_REGIONS 16
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 4
#define MAX_MMAP_REGIONS 16
#define NS_IMAGE_OFFSET 0x60000000
-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_MMAP_REGIONS 8
#define MAX_XLAT_TABLES 6
#define MAX_IO_DEVICES 3
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 9
#define MAX_MMAP_REGIONS 33
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 8
#define MAX_MMAP_REGIONS 16
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define ADDR_SPACE_SIZE (1ull << 32)
+#define ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_XLAT_TABLES 20
#define MAX_MMAP_REGIONS 25
/*******************************************************************************
* Platform specific page table and MMU setup constants
******************************************************************************/
-#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
-#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
+#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
+#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define MAX_MMAP_REGIONS 7
#define MAX_XLAT_TABLES 5