MIPS: Netlogic: Initialization when !CONFIG_SMP
authorJayachandran C <jchandra@broadcom.com>
Mon, 10 Jun 2013 06:41:02 +0000 (06:41 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 13 Jun 2013 15:46:42 +0000 (17:46 +0200)
The core initialization and reset vector setup needs to be done
even when booting uniprocessor. Move this code from smp.c to setup.c

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5428/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/netlogic/common/Makefile
arch/mips/netlogic/common/smp.c
arch/mips/netlogic/xlp/setup.c
arch/mips/netlogic/xlp/wakeup.c
arch/mips/netlogic/xlr/setup.c

index a396a39ec491b9358675572a97db86eb97fdb0bb..362739d62b1d9ebe6d400d8b20fdc02f1aff6b76 100644 (file)
@@ -1,4 +1,5 @@
 obj-y                          += irq.o time.o
 obj-y                          += nlm-dma.o
-obj-$(CONFIG_SMP)              += smp.o smpboot.o reset.o
+obj-y                          += reset.o
+obj-$(CONFIG_SMP)              += smp.o smpboot.o
 obj-$(CONFIG_EARLY_PRINTK)     += earlycons.o
index ffba52489bef7b52a1dcb996cb911c277359a45d..da3d3bc02c206b4137e0d59502d5f4143ab5b94d 100644 (file)
@@ -254,15 +254,9 @@ unsupp:
 
 int __cpuinit nlm_wakeup_secondary_cpus(void)
 {
-       unsigned long reset_vec;
        char *reset_data;
        int threadmode;
 
-       /* Update reset entry point with CPU init code */
-       reset_vec = CKSEG1ADDR(RESET_VEC_PHYS);
-       memcpy((void *)reset_vec, (void *)nlm_reset_entry,
-                       (nlm_reset_entry_end - nlm_reset_entry));
-
        /* verify the mask and setup core config variables */
        threadmode = nlm_parse_cpumask(&nlm_cpumask);
 
index 7b6694998cdca9cb66b893faa5c688d51bdb07fc..5bdd354fef481e2110ddf35d6efda80c3f1096d8 100644 (file)
@@ -98,11 +98,19 @@ void nlm_percpu_init(int hwcpuid)
 
 void __init prom_init(void)
 {
+       void *reset_vec;
+
        nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
+       nlm_init_boot_cpu();
        xlp_mmu_init();
        nlm_node_init(0);
        xlp_dt_init((void *)(long)fw_arg0);
 
+       /* Update reset entry point with CPU init code */
+       reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+       memcpy(reset_vec, (void *)nlm_reset_entry,
+                       (nlm_reset_entry_end - nlm_reset_entry));
+
 #ifdef CONFIG_SMP
        cpumask_setall(&nlm_cpumask);
        nlm_wakeup_secondary_cpus();
index 1a7d529fcec0bca6d5a8ad9f1ee11723577bf829..abb3e08cc05250498f0d9502e78ef824ec1ebd80 100644 (file)
@@ -137,7 +137,6 @@ void xlp_wakeup_secondary_cpus()
         * In case of u-boot, the secondaries are in reset
         * first wakeup core 0 threads
         */
-       nlm_init_boot_cpu();
        xlp_boot_core0_siblings();
 
        /* now get other cores out of reset */
index 89c8c1066632b5f2800c1a4f2ecaef212ac890cf..7e27f8591867d94cc6e6536c047e4f2c76561990 100644 (file)
@@ -196,6 +196,7 @@ void __init prom_init(void)
 {
        int *argv, *envp;               /* passed as 32 bit ptrs */
        struct psb_info *prom_infop;
+       void *reset_vec;
 #ifdef CONFIG_SMP
        int i;
 #endif
@@ -208,6 +209,11 @@ void __init prom_init(void)
        nlm_prom_info = *prom_infop;
        nlm_init_node();
 
+       /* Update reset entry point with CPU init code */
+       reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
+       memcpy(reset_vec, (void *)nlm_reset_entry,
+                       (nlm_reset_entry_end - nlm_reset_entry));
+
        nlm_early_serial_setup();
        build_arcs_cmdline(argv);
        prom_add_memory();