The driver name does not need to be writable, so constify it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-int at91rm9200_miiphy_read(char *devname, unsigned char addr,
+int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
return 0;
}
-int at91rm9200_miiphy_write(char *devname, unsigned char addr,
+int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);
/*
* prototypes...
*/
-extern int npe_miiphy_read (char *devname, unsigned char addr,
+extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-extern int npe_miiphy_write (char *devname, unsigned char addr,
+extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */
}
-int npe_miiphy_read (char *devname, unsigned char addr,
+int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
} /* phy_read */
-int npe_miiphy_write (char *devname, unsigned char addr,
+int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
-int mcffec_miiphy_read(char *devname, unsigned char addr,
+int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int mcffec_miiphy_write(char *devname, unsigned char addr,
+int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
-int au1x00_miiphy_read(char *devname, unsigned char addr,
+int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
return 0;
}
-int au1x00_miiphy_write(char *devname, unsigned char addr,
+int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
+int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
/********************************************************************/
#ifdef DEBUG
/* MII-interface related functions */
/********************************************************************/
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
}
/********************************************************************/
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
static int mii_discover_phy(struct eth_device *dev);
#endif
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static struct ether_fcc_info_s
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
return 0;
}
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
short rdreg; /* register working value */
return 0;
}
-int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
unsigned long sta_reg;
/* write a phy reg and return the value with a rc */
/***********************************************************/
-int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);
/* MII PHY access routines are common for all i/f, use gal_ent0 */
#define GT6426x_MII_DEVNAME "gal_enet0"
-int gt6426x_miiphy_read(char *devname, unsigned char phy,
+int gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val);
static inline unsigned short
MII utilities - write: write to an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_write(char *devname, unsigned char phy,
+gt6426x_miiphy_write(const char *devname, unsigned char phy,
unsigned char reg, unsigned short data)
{
unsigned int temp= (reg<<21) | (phy<<16) | data;
MII utilities - read: read from an MII register via SMI
***************************************************************************/
int
-gt6426x_miiphy_read(char *devname, unsigned char phy,
+gt6426x_miiphy_read(const char *devname, unsigned char phy,
unsigned char reg, unsigned short *val)
{
unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;
int mv64460_eth_xmit (struct eth_device *, volatile void *packet, int length);
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value);
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value);
int phy_setup_aneg (char *devname, unsigned char addr);
return true;
}
-int mv_miiphy_read(char *devname, unsigned char phy_addr,
+int mv_miiphy_read(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short *value)
{
unsigned int reg_value;
return true;
}
-int mv_miiphy_write(char *devname, unsigned char phy_addr,
+int mv_miiphy_write(const char *devname, unsigned char phy_addr,
unsigned char phy_reg, unsigned short value)
{
unsigned int reg_value;
unsigned char addr, reg;
unsigned short data;
int rcode = 0;
- char *devname;
+ const char *devname;
if (argc < 2)
return cmd_usage(cmdtp);
struct mii_dev {
struct list_head link;
- char *name;
- int (*read) (char *devname, unsigned char addr,
+ const char *name;
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
};
*
* Initialize global data. Need to be called before any other miiphy routine.
*/
-void miiphy_init ()
+void miiphy_init(void)
{
INIT_LIST_HEAD (&mii_devs);
current_mii = NULL;
*
* Register read and write MII access routines for the device <name>.
*/
-void miiphy_register (char *name,
- int (*read) (char *devname, unsigned char addr,
+void miiphy_register(const char *name,
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
struct list_head *entry;
struct mii_dev *new_dev;
struct mii_dev *miidev;
unsigned int name_len;
+ char *new_name;
/* check if we have unique name */
list_for_each (entry, &mii_devs) {
INIT_LIST_HEAD (&new_dev->link);
new_dev->read = read;
new_dev->write = write;
- new_dev->name = (char *)(new_dev + 1);
- strncpy (new_dev->name, name, name_len);
- new_dev->name[name_len] = '\0';
+ new_dev->name = new_name = (char *)(new_dev + 1);
+ strncpy (new_name, name, name_len);
+ new_name[name_len] = '\0';
debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, new_dev->read, new_dev->write);
current_mii = new_dev;
}
-int miiphy_set_current_dev (char *devname)
+int miiphy_set_current_dev(const char *devname)
{
struct list_head *entry;
struct mii_dev *dev;
return 1;
}
-char *miiphy_get_current_dev ()
+const char *miiphy_get_current_dev(void)
{
if (current_mii)
return current_mii->name;
* Returns:
* 0 on success
*/
-int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
struct list_head *entry;
* Returns:
* 0 on success
*/
-int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
struct list_head *entry;
* Returns:
* 0 on success
*/
-int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
+int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev)
{
unsigned int reg = 0;
* Returns:
* 0 on success
*/
-int miiphy_reset (char *devname, unsigned char addr)
+int miiphy_reset(const char *devname, unsigned char addr)
{
unsigned short reg;
int timeout = 500;
*
* Determine the ethernet speed (10/100/1000). Return 10 on error.
*/
-int miiphy_speed (char *devname, unsigned char addr)
+int miiphy_speed(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
*
* Determine full/half duplex. Return half on error.
*/
-int miiphy_duplex (char *devname, unsigned char addr)
+int miiphy_duplex(const char *devname, unsigned char addr)
{
u16 bmcr, anlpar;
* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
* 1000BASE-T, or on error.
*/
-int miiphy_is_1000base_x (char *devname, unsigned char addr)
+int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
u16 exsr;
*
* Determine link status
*/
-int miiphy_link (char *devname, unsigned char addr)
+int miiphy_link(const char *devname, unsigned char addr)
{
unsigned short reg;
static void emac_err (struct eth_device *dev, unsigned long isr);
extern int phy_setup_aneg (char *devname, unsigned char addr);
-extern int emac4xx_miiphy_read (char *devname, unsigned char addr,
+extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-extern int emac4xx_miiphy_write (char *devname, unsigned char addr,
+extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int board_emac_count(void);
/* MDIO access to phy */
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
-static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+static int altera_tse_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
return 0;
}
-static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+static int altera_tse_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
return (at91_emac_t *) netdev->iobase;
}
-int at91emac_mii_read(char *devname, unsigned char addr,
+int at91emac_mii_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
at91_emac_t *emac;
}
-int at91emac_mii_write(char *devname, unsigned char addr,
+int at91emac_mii_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91_emac_t *emac;
return 0;
}
-static int bfin_miiphy_read(char *devname, uchar addr, uchar reg, ushort *val)
+static int bfin_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val)
{
if (bfin_miiphy_wait())
return 1;
return 0;
}
-static int bfin_miiphy_write(char *devname, uchar addr, uchar reg, ushort val)
+static int bfin_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val)
{
if (bfin_miiphy_wait())
return 1;
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
+static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
{
return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1);
}
-static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
+static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value)
{
return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1);
}
}
#if defined(CONFIG_MII)
-static int dw_mii_read(char *devname, u8 addr, u8 reg, u16 *val)
+static int dw_mii_read(const char *devname, u8 addr, u8 reg, u16 *val)
{
struct eth_device *dev;
return 0;
}
-static int dw_mii_write(char *devname, u8 addr, u8 reg, u16 val)
+static int dw_mii_write(const char *devname, u8 addr, u8 reg, u16 val)
{
struct eth_device *dev;
return dev;
}
-static int eepro100_miiphy_read (char *devname, unsigned char addr,
+static int eepro100_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
struct eth_device *dev;
return 0;
}
-static int eepro100_miiphy_write (char *devname, unsigned char addr,
+static int eepro100_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct eth_device *dev;
#define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
/* ep93xx_miiphy ops forward declarations */
-static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value);
-static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value);
#if defined(EP93XX_MAC_DEBUG)
/**
* Read a 16-bit value from an MII register.
*/
-static int ep93xx_miiphy_read(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_read(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short * const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
/**
* Write a 16-bit value to an MII register.
*/
-static int ep93xx_miiphy_write(char * const dev, unsigned char const addr,
+static int ep93xx_miiphy_write(const char * const dev, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
struct mac_regs *mac = (struct mac_regs *)MAC_BASE;
/*
* MII-interface related functions
*/
-static int fec_miiphy_read(char *dev, uint8_t phyAddr, uint8_t regAddr,
+static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t *retVal)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
debug("fec_init: mii_speed %#lx\n",
fec->eth->mii_speed);
}
-static int fec_miiphy_write(char *dev, uint8_t phyAddr, uint8_t regAddr,
+static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
uint16_t data)
{
struct eth_device *edev = eth_get_dev_by_name(dev);
#if defined(CONFIG_CMD_MII)
-int macb_miiphy_read(char *devname, u8 phy_adr, u8 reg, u16 *value)
+int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
return 0;
}
-int macb_miiphy_write(char *devname, u8 phy_adr, u8 reg, u16 value)
+int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct macb_device *macb = to_macb(dev);
* Otherwise they hang in mii_send() !!! Sorry!
*/
-int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
short rdreg; /* register working value */
return 0;
}
-int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
short rdreg; /* register working value */
#error "CONFIG_MII has to be defined!"
#endif
-int fec512x_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec512x_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
+int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data);
int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
static uchar rx_buff[FEC_BUFFER_SIZE];
/* MII-interface related functions */
/********************************************************************/
-int fec512x_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
+int fec512x_miiphy_read(const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
}
/********************************************************************/
-int fec512x_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile fec512x_t *eth = &im->fec;
uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal);
-int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
+int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal);
+int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis);
/* MII-interface related functions */
/********************************************************************/
-int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
+int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
}
/********************************************************************/
-int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
+int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
{
ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC;
uint32 reg; /* convenient holder for the PHY register */
*
* Returns 16bit phy register value, or 0xffff on error
*/
-static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
+static int smi_reg_read(const char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
* Returns 0 if write succeed, -EINVAL on bad parameters
* -ETIME on timeout
*/
-static int smi_reg_write(char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
+static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct mvgbe_device *dmvgbe = to_mvgbe(dev);
/**
* Read a 16-bit value from an MII register.
*/
-extern int ns7520_miiphy_read(char *devname, unsigned char const addr,
+extern int ns7520_miiphy_read(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short *const value)
{
int ret = MII_STATUS_FAILURE;
/**
* Write a 16-bit value to an MII register.
*/
-extern int ns7520_miiphy_write(char *devname, unsigned char const addr,
+extern int ns7520_miiphy_write(const char *devname, unsigned char const addr,
unsigned char const reg, unsigned short const value)
{
int ret = MII_STATUS_FAILURE;
static void adjust_link(struct eth_device *dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
-static int tsec_miiphy_write(char *devname, unsigned char addr,
+static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
-static int tsec_miiphy_read(char *devname, unsigned char addr,
+static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
#endif
#ifdef CONFIG_MCAST_TFTP
* Returns:
* 0 on success
*/
-static int tsec_miiphy_read(char *devname, unsigned char addr,
+static int tsec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
unsigned short ret;
* Returns:
* 0 on success
*/
-static int tsec_miiphy_write(char *devname, unsigned char addr,
+static int tsec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
struct tsec_private *priv = privlist[0];
* Returns:
* The index where the device is located, -1 on error
*/
-static int uec_miiphy_find_dev_by_name(char *devname)
+static int uec_miiphy_find_dev_by_name(const char *devname)
{
int i;
* Returns:
* 0 on success
*/
-static int uec_miiphy_read(char *devname, unsigned char addr,
+static int uec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
int devindex = 0;
* Returns:
* 0 on success
*/
-static int uec_miiphy_write(char *devname, unsigned char addr,
+static int uec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
int devindex = 0;
#include <net.h>
-int miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value);
-int miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value);
-int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
+int miiphy_info (const char *devname, unsigned char addr, unsigned int *oui,
unsigned char *model, unsigned char *rev);
-int miiphy_reset (char *devname, unsigned char addr);
-int miiphy_speed (char *devname, unsigned char addr);
-int miiphy_duplex (char *devname, unsigned char addr);
-int miiphy_is_1000base_x (char *devname, unsigned char addr);
+int miiphy_reset (const char *devname, unsigned char addr);
+int miiphy_speed (const char *devname, unsigned char addr);
+int miiphy_duplex (const char *devname, unsigned char addr);
+int miiphy_is_1000base_x (const char *devname, unsigned char addr);
#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
-int miiphy_link (char *devname, unsigned char addr);
+int miiphy_link (const char *devname, unsigned char addr);
#endif
void miiphy_init (void);
-void miiphy_register (char *devname,
- int (*read) (char *devname, unsigned char addr,
+void miiphy_register (const char *devname,
+ int (*read) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
- int (*write) (char *devname, unsigned char addr,
+ int (*write) (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value));
-int miiphy_set_current_dev (char *devname);
-char *miiphy_get_current_dev (void);
+int miiphy_set_current_dev (const char *devname);
+const char *miiphy_get_current_dev (void);
void miiphy_listdev (void);
extern int bb_miiphy_buses_num;
void bb_miiphy_init (void);
-int bb_miiphy_read (char *devname, unsigned char addr,
+int bb_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int bb_miiphy_write (char *devname, unsigned char addr,
+int bb_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif