ti: drop value from CONFIG_SYS_NAND_BUSWIDTH_16BIT
authorStefano Babic <sbabic@denx.de>
Sun, 26 Jul 2015 13:18:15 +0000 (15:18 +0200)
committerTom Rini <trini@konsulko.com>
Thu, 13 Aug 2015 00:47:45 +0000 (20:47 -0400)
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
12 files changed:
include/configs/am3517_crane.h
include/configs/devkit8000.h
include/configs/dig297.h
include/configs/omap3_beagle.h
include/configs/omap3_evm_common.h
include/configs/omap3_igep00x0.h
include/configs/omap3_logic.h
include/configs/omap3_overo.h
include/configs/omap3_pandora.h
include/configs/omap3_zoom1.h
include/configs/tam3517-common.h
include/configs/tao3530.h

index 600fefbc203624180955d8fdb42a932398a51570..a0b193e837b593a78a68466f3ba36ce3ea5ca383 100644 (file)
 #define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
index 215dc30bde8ac25134944c885728eb92eaeadfd7..6d2c22e6baac6bde8fda352434c09026118732bb 100644 (file)
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
index f6d7ec4e782314e61477c70cbbda96847510d30c..2e16ca7c54a21f8d5d910e8306acb229bceb40f1 100644 (file)
  * Board NAND Info.
  */
 #define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
                                                        /* to access nand */
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
index dbe3e9be8ca14f4c97cfe3c6656a873f0e8e458c..f309b2e83b7103c511dd41c68d4dd5507684bade 100644 (file)
 #define CONFIG_SPL_OMAP3_ID_NAND
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
index 66c314fc42c15822b000375a18439bf4a000076e..314e507845929b865ce4a37dcc2f01474c0b7870 100644 (file)
 
 /* Max number of NAND devices */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 /* Timeout values (in ticks) */
 #define CONFIG_SYS_FLASH_ERASE_TOUT    (100 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_FLASH_WRITE_TOUT    (100 * CONFIG_SYS_HZ)
index 8785d8fd501aeaa981dfdafcdc8d8f0962927dd6..04433edcc543c6fba908294bcfcb2d3e27e4df40 100644 (file)
 
 /* NAND boot config */
 #ifdef CONFIG_NAND
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
index af6ae73ef61c63a4f3c0c33a673cc6d05839e517..7457324c4f75d18b7c4d825cf0c3c12dc20f660a 100644 (file)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of */
                                                        /* NAND devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_JFFS2_NAND
 /* nand device jffs2 lives on */
 #define CONFIG_JFFS2_DEV               "nand0"
index a1a90ec313ec782a3834dd35b3dcbdea31981020..cbaf69296a074d9f8d5c3582a6eb7cc8598feae2 100644 (file)
 #define CONFIG_SYS_CACHELINE_SIZE      64
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_MAX_ECCPOS  56
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
index 49467c9c927f68aea4440a0f4e10d24c3c2da245..26adfbaa4e18980fd882b1190ec8de811ffcf107 100644 (file)
@@ -64,7 +64,7 @@
  */
 #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
                                                        /* to access nand */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_SW
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_OOBSIZE                64
index 2d1d53dc38135488670bdf86b31697b4ec6f2d15..cef2243bfeb59cc2f4498efa9b01449f5d3cc3a3 100644 (file)
@@ -97,7 +97,7 @@
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 
 /* Environment information */
 
index 34f1228140349aeeea46a693533bf471488a7f60..801220a1ce48ac0c6e9c1c45d83bd0fdecc07e8c 100644 (file)
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_OOBSIZE                64
index c8ec79b1965568100dc96a94653fb95b11c6cac5..3eacfa7b14a298bb6267987aba97321e255fe584 100644 (file)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 /* Environment information */
 #define CONFIG_BOOTDELAY               3