* register. On returning a 32 bit number, the value can be
* applied to any PLL in the calling function.
*/
- reg =
- FIELD_SET(0, PLL_CTRL, BYPASS, OFF)
- | FIELD_SET(0, PLL_CTRL, POWER, ON)
- | FIELD_SET(0, PLL_CTRL, INPUT, OSC)
+ reg = PLL_CTRL_POWER
#ifndef VALIDATION_CHIP
| FIELD_VALUE(0, PLL_CTRL, POD, pPLL->POD)
#endif
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
- if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PLL_CTRL, POWER) ==
- PLL_CTRL_POWER_OFF) ||
+ if (!(PEEK32(PANEL_PLL_CTRL) & PLL_CTRL_POWER) ||
(FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
PANEL_DISPLAY_CTRL_TIMING_DISABLE)) {
return;
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
- if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), PLL_CTRL, POWER) ==
- PLL_CTRL_POWER_OFF) ||
+ if (!(PEEK32(CRT_PLL_CTRL) & PLL_CTRL_POWER) ||
(FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
CRT_DISPLAY_CTRL_TIMING_DISABLE)) {
return;
#define PLL_CLK_COUNT_COUNTER 15:0
#define PANEL_PLL_CTRL 0x00005C
-#define PLL_CTRL_BYPASS 18:18
-#define PLL_CTRL_BYPASS_OFF 0
-#define PLL_CTRL_BYPASS_ON 1
-#define PLL_CTRL_POWER 17:17
-#define PLL_CTRL_POWER_OFF 0
-#define PLL_CTRL_POWER_ON 1
-#define PLL_CTRL_INPUT 16:16
-#define PLL_CTRL_INPUT_OSC 0
-#define PLL_CTRL_INPUT_TESTCLK 1
+#define PLL_CTRL_BYPASS BIT(18)
+#define PLL_CTRL_POWER BIT(17)
+#define PLL_CTRL_INPUT BIT(16)
#ifdef VALIDATION_CHIP
#define PLL_CTRL_OD 15:14
#else