MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler
authorLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Thu, 13 Nov 2014 13:39:39 +0000 (13:39 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Tue, 17 Feb 2015 15:37:25 +0000 (15:37 +0000)
Just like MIPS R2, in MIPS R6 it is possible to determine if a
timer interrupt has happened or not.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/kernel/cevt-r4k.c

index 28bfdf2c59a5ad4c685140c0d7c63f25450659e5..82bd2b278a243602dbf4c7ec15f8366af1ecf059 100644 (file)
@@ -39,7 +39,7 @@ int cp0_timer_irq_installed;
 
 irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
 {
-       const int r2 = cpu_has_mips_r2;
+       const int r2 = cpu_has_mips_r2_r6;
        struct clock_event_device *cd;
        int cpu = smp_processor_id();