83xx: Use common LSDMR defines from asm/fsl_lbc.h

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 4eab2857127ef4fd7a16cb1107cca5a3d1b7f3ec..9b8b0333ed2e8a0071cd4a662a585fff68f0e296 100644 (file)
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -248,34 +248,8 @@
 #define CONFIG_SYS_LBC_LSRT    0x32000000      /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000      /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
 #define CONFIG_SYS_LBC_LSDMR_COMMON    0x0063b723
 
-/*
- * SDRAM Controller configuration sequence.
- */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
-
 #endif
 
 /*

diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index ea1928eae97aba2d4062416fdc83dfc6eb5dd2bd..c82cda2dd017b6b883b87aa0ffd5c0446219a69e 100644 (file)
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -246,34 +246,8 @@
 #define CONFIG_SYS_LBC_LSRT    0x32000000      /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000      /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
 #define CONFIG_SYS_LBC_LSDMR_COMMON    0x0063b723
 
-/*
- * SDRAM Controller configuration sequence.
- */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
-
 #endif
 
 /*

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index b3c0e2dd5c1db82754951eab6d600b00634b0f92..6cc27cb3ad18cf128a149f2c281e6e533b5c1a49 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -262,60 +262,24 @@
 #define CONFIG_SYS_LBC_LSRT    0x32000000    /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000    /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR5     (3 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR8     (5 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW3  (3 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC2      (2 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC3      (3 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_BUFCMD    (1 << (31 - 29))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFEN            \
-                               | CONFIG_SYS_LBC_LSDMR_BSMA1516 \
-                               | CONFIG_SYS_LBC_LSDMR_RFCR8            \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT6        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC3             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFEN            \
+                               | LSDMR_BSMA1516        \
+                               | LSDMR_RFCR8           \
+                               | LSDMR_PRETOACT6       \
+                               | LSDMR_ACTTORW3        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC3            \
+                               | LSDMR_CL3             \
                                )
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 #endif
 
 /*

diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index bdd6b87ad3a50ddde7cf96a2c150e4a55969d660..4b09de17fca52b8b67b697ee9f5a64363eb29088 100644 (file)
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -271,33 +271,16 @@
 #define CONFIG_SYS_LBC_LSRT    0x32000000 /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000 /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
 #define CONFIG_SYS_LBC_LSDMR_COMMON    0x0063b723
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 
 #endif
 

diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index f476e3ed5e690eae28d56de937f415d3689877fa..db1d4ac030bcb19a81f1393a1b6c935ce7592e7f 100644 (file)
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -227,60 +227,24 @@
 #define CONFIG_SYS_LBC_LSRT    0x32000000    /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000    /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR5     (3 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR8     (5 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW3  (3 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC2      (2 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC3      (3 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_BUFCMD    (1 << (31 - 29))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFEN            \
-                               | CONFIG_SYS_LBC_LSDMR_BSMA1516 \
-                               | CONFIG_SYS_LBC_LSDMR_RFCR8            \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT6        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC3             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFEN            \
+                               | LSDMR_BSMA1516        \
+                               | LSDMR_RFCR8           \
+                               | LSDMR_PRETOACT6       \
+                               | LSDMR_ACTTORW3        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC3            \
+                               | LSDMR_CL3             \
                                )
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 #endif
 
 /*