drm/nouveau/nvif: split out nvsw interface definitons

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h
index 122e0ae58efaaf3e6a2d7f961252826ca40479a4..65b7e4546731defa91a2503837310a579572a130 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvif/class.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/class.h
@@ -5,10 +5,10 @@
 #define NVIF_CLASS_CONTROL                                                   -1
 #define NVIF_CLASS_PERFMON                                                   -2
 #define NVIF_CLASS_PERFDOM                                                   -3
-#define NVIF_CLASS_SW_NV04                                                   -4
-#define NVIF_CLASS_SW_NV10                                                   -5
-#define NVIF_CLASS_SW_NV50                                                   -6
-#define NVIF_CLASS_SW_GF100                                                  -7
+#define NVIF_CLASS_SW_NV04                                    /* if0004.h */ -4
+#define NVIF_CLASS_SW_NV10                                    /* if0005.h */ -5
+#define NVIF_CLASS_SW_NV50                                    /* if0005.h */ -6
+#define NVIF_CLASS_SW_GF100                                   /* if0005.h */ -7
 
 /* the below match nvidia-assigned (either in hw, or sw) class numbers */
 #define NV_DEVICE                                                    0x00000080
@@ -614,18 +614,4 @@ struct nv50_disp_overlay_v0 {
 };
 
 #define NV50_DISP_OVERLAY_V0_NTFY_UEVENT                                   0x00
-
-/*******************************************************************************
- * software
- ******************************************************************************/
-
-#define NVSW_NTFY_UEVENT                                                   0x00
-
-#define NV04_NVSW_GET_REF                                                  0x00
-
-struct nv04_nvsw_get_ref_v0 {
-       __u8  version;
-       __u8  pad01[3];
-       __u32 ref;
-};
 #endif

diff --git a/drivers/gpu/drm/nouveau/include/nvif/if0004.h b/drivers/gpu/drm/nouveau/include/nvif/if0004.h
new file mode 100644 (file)
index 0000000..bd5cd42
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/if0004.h
@@ -0,0 +1,13 @@
+#ifndef __NVIF_IF0004_H__
+#define __NVIF_IF0004_H__
+
+#define NV04_NVSW_NTFY_UEVENT                                              0x00
+
+#define NV04_NVSW_GET_REF                                                  0x00
+
+struct nv04_nvsw_get_ref_v0 {
+       __u8  version;
+       __u8  pad01[3];
+       __u32 ref;
+};
+#endif

diff --git a/drivers/gpu/drm/nouveau/include/nvif/if0005.h b/drivers/gpu/drm/nouveau/include/nvif/if0005.h
new file mode 100644 (file)
index 0000000..abfd373
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvif/if0005.h
@@ -0,0 +1,4 @@
+#ifndef __NVIF_IF0005_H__
+#define __NVIF_IF0005_H__
+#define NV10_NVSW_NTFY_UEVENT                                              0x00
+#endif

diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index b3a563c44bcd51a2bd440b3d1318f7144897f383..e82545cde01185c800c74ba7b998c2947393a9d0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -37,6 +37,8 @@
 #include <core/pci.h>
 #include <core/tegra.h>
 
+#include <nvif/if0004.h>
+
 #include "nouveau_drm.h"
 #include "nouveau_dma.h"
 #include "nouveau_ttm.h"
@@ -256,8 +258,8 @@ nouveau_accel_init(struct nouveau_drm *drm)
                }
 
                ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
-                                      false, NVSW_NTFY_UEVENT, NULL, 0, 0,
-                                      &drm->flip);
+                                      false, NV04_NVSW_NTFY_UEVENT,
+                                      NULL, 0, 0, &drm->flip);
                if (ret == 0)
                        ret = nvif_notify_get(&drm->flip);
                if (ret) {

diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c
index f3d705d67738a28b434213a4e6b16d82ac2ea251..3022d24ed88bfb91f011935b8c5fe69876f9454b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv04_fence.c
+++ b/drivers/gpu/drm/nouveau/nv04_fence.c
@@ -26,6 +26,8 @@
 #include "nouveau_dma.h"
 #include "nouveau_fence.h"
 
+#include <nvif/if0004.h>
+
 struct nv04_fence_chan {
        struct nouveau_fence_chan base;
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
index 2405116bffc7fcc4d9febb2f331db89f87bd9d4e..648caac3841ac8554fe304cd9604e51d68e84fb2 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
@@ -27,6 +27,7 @@
 #include "nvsw.h"
 
 #include <nvif/class.h>
+#include <nvif/if0004.h>
 #include <nvif/ioctl.h>
 #include <nvif/unpack.h>
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c
index 66cf986b9572cf1f3ffefc77952aa5299934b2ee..33dd03fff3c40fe5a1a6bed1be699ff74eccc523 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c
@@ -24,7 +24,7 @@
 #include "nvsw.h"
 #include "chan.h"
 
-#include <nvif/class.h>
+#include <nvif/if0004.h>
 
 static int
 nvkm_nvsw_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
@@ -41,7 +41,7 @@ nvkm_nvsw_ntfy_(struct nvkm_object *object, u32 mthd,
 {
        struct nvkm_nvsw *nvsw = nvkm_nvsw(object);
        switch (mthd) {
-       case NVSW_NTFY_UEVENT:
+       case NV04_NVSW_NTFY_UEVENT:
                *pevent = &nvsw->chan->event;
                return 0;
        default: