bnxt_en: Separate RDMA MR/AH context allocation.
authorDevesh Sharma <devesh.sharma@broadcom.com>
Sun, 5 May 2019 11:17:04 +0000 (07:17 -0400)
committerDavid S. Miller <davem@davemloft.net>
Mon, 6 May 2019 04:42:17 +0000 (21:42 -0700)
In newer firmware, the context memory for MR (Memory Region)
and AH (Address Handle) to support RDMA are specified separately.
Modify driver to specify and allocate the 2 context memory types
separately when supported by the firmware.

Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/bnxt/bnxt.c
drivers/net/ethernet/broadcom/bnxt/bnxt.h

index 7073b996927ebe04e749f61b9ded9df3f3dae037..d70320cfbc3ffe8fc8a83dc6225306e85c7dc6c6 100644 (file)
@@ -6074,6 +6074,8 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
                        ctx->tqm_entries_multiple = 1;
                ctx->mrav_max_entries = le32_to_cpu(resp->mrav_max_entries);
                ctx->mrav_entry_size = le16_to_cpu(resp->mrav_entry_size);
+               ctx->mrav_num_entries_units =
+                       le16_to_cpu(resp->mrav_num_entries_units);
                ctx->tim_entry_size = le16_to_cpu(resp->tim_entry_size);
                ctx->tim_max_entries = le32_to_cpu(resp->tim_max_entries);
        } else {
@@ -6120,6 +6122,7 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
        struct bnxt_ctx_pg_info *ctx_pg;
        __le32 *num_entries;
        __le64 *pg_dir;
+       u32 flags = 0;
        u8 *pg_attr;
        int i, rc;
        u32 ena;
@@ -6179,6 +6182,9 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
        if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV) {
                ctx_pg = &ctx->mrav_mem;
                req.mrav_num_entries = cpu_to_le32(ctx_pg->entries);
+               if (ctx->mrav_num_entries_units)
+                       flags |=
+                       FUNC_BACKING_STORE_CFG_REQ_FLAGS_MRAV_RESERVATION_SPLIT;
                req.mrav_entry_size = cpu_to_le16(ctx->mrav_entry_size);
                bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
                                      &req.mrav_pg_size_mrav_lvl,
@@ -6205,6 +6211,7 @@ static int bnxt_hwrm_func_backing_store_cfg(struct bnxt *bp, u32 enables)
                *num_entries = cpu_to_le32(ctx_pg->entries);
                bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir);
        }
+       req.flags = cpu_to_le32(flags);
        rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
        if (rc)
                rc = -EIO;
@@ -6343,6 +6350,7 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
        struct bnxt_ctx_pg_info *ctx_pg;
        struct bnxt_ctx_mem_info *ctx;
        u32 mem_size, ena, entries;
+       u32 num_mr, num_ah;
        u32 extra_srqs = 0;
        u32 extra_qps = 0;
        u8 pg_lvl = 1;
@@ -6406,12 +6414,21 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)
                goto skip_rdma;
 
        ctx_pg = &ctx->mrav_mem;
-       ctx_pg->entries = extra_qps * 4;
+       /* 128K extra is needed to accommodate static AH context
+        * allocation by f/w.
+        */
+       num_mr = 1024 * 256;
+       num_ah = 1024 * 128;
+       ctx_pg->entries = num_mr + num_ah;
        mem_size = ctx->mrav_entry_size * ctx_pg->entries;
        rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 2);
        if (rc)
                return rc;
        ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV;
+       if (ctx->mrav_num_entries_units)
+               ctx_pg->entries =
+                       ((num_mr / ctx->mrav_num_entries_units) << 16) |
+                        (num_ah / ctx->mrav_num_entries_units);
 
        ctx_pg = &ctx->tim_mem;
        ctx_pg->entries = ctx->qp_mem.entries;
index 2c18f08fb64eed5f2b39ffbbf162a03fc1a3c538..bc4c37ad12b1cd30fd6632228b708c5f40a3810b 100644 (file)
@@ -1227,6 +1227,7 @@ struct bnxt_ctx_mem_info {
        u16     mrav_entry_size;
        u16     tim_entry_size;
        u32     tim_max_entries;
+       u16     mrav_num_entries_units;
        u8      tqm_entries_multiple;
 
        u32     flags;