+++ /dev/null
-From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
-From: INAGAKI Hiroshi <musashino.open@gmail.com>
-Date: Thu, 13 Oct 2022 00:51:33 +0900
-Subject: [PATCH] nvmem: u-boot-env: align endianness of crc32 values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch fixes crc32 error on Big-Endianness system by conversion of
-calculated crc32 value.
-
-Little-Endianness system:
-
- obtained crc32: Little
-calculated crc32: Little
-
-Big-Endianness system:
-
- obtained crc32: Little
-calculated crc32: Big
-
-log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
-
-[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
-[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
-
-Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
-
-Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
-Acked-by: Rafał Miłecki <rafal@milecki.pl>
-Tested-by: Christian Lamparter <chunkeey@gmail.com>
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
----
- drivers/nvmem/u-boot-env.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/nvmem/u-boot-env.c
-+++ b/drivers/nvmem/u-boot-env.c
-@@ -156,7 +156,7 @@ static int u_boot_env_parse(struct u_boo
- crc32_data_len = priv->mtd->size - crc32_data_offset;
- data_len = priv->mtd->size - data_offset;
-
-- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
-+ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
- if (calc != crc32) {
- dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
- err = -EINVAL;
--- /dev/null
+From 2e8dc541ae207349b51c65391be625ffe1f86e0c Mon Sep 17 00:00:00 2001
+From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
+Date: Mon, 6 Feb 2023 13:43:41 +0000
+Subject: [PATCH] nvmem: core: remove spurious white space
+
+Remove a spurious white space in for the ida_alloc() call.
+
+Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-8-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -764,7 +764,7 @@ struct nvmem_device *nvmem_register(cons
+ if (!nvmem)
+ return ERR_PTR(-ENOMEM);
+
+- rval = ida_alloc(&nvmem_ida, GFP_KERNEL);
++ rval = ida_alloc(&nvmem_ida, GFP_KERNEL);
+ if (rval < 0) {
+ kfree(nvmem);
+ return ERR_PTR(rval);
--- /dev/null
+From 5d8e6e6c10a3d37486d263b16ddc15991a7e4a88 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:46 +0000
+Subject: [PATCH] nvmem: core: add an index parameter to the cell
+
+Sometimes a cell can represend multiple values. For example, a base
+ethernet address stored in the NVMEM can be expanded into multiple
+discreet ones by adding an offset.
+
+For this use case, introduce an index parameter which is then used to
+distiguish between values. This parameter will then be passed to the
+post process hook which can then use it to create different values
+during reading.
+
+At the moment, there is only support for the device tree path. You can
+add the index to the phandle, e.g.
+
+ &net {
+ nvmem-cells = <&base_mac_address 2>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ &nvmem_provider {
+ base_mac_address: base-mac-address@0 {
+ #nvmem-cell-cells = <1>;
+ reg = <0 6>;
+ };
+ };
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-13-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 37 ++++++++++++++++++++++++----------
+ drivers/nvmem/imx-ocotp.c | 4 ++--
+ include/linux/nvmem-provider.h | 4 ++--
+ 3 files changed, 30 insertions(+), 15 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -60,6 +60,7 @@ struct nvmem_cell_entry {
+ struct nvmem_cell {
+ struct nvmem_cell_entry *entry;
+ const char *id;
++ int index;
+ };
+
+ static DEFINE_MUTEX(nvmem_mutex);
+@@ -1127,7 +1128,8 @@ struct nvmem_device *devm_nvmem_device_g
+ }
+ EXPORT_SYMBOL_GPL(devm_nvmem_device_get);
+
+-static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry, const char *id)
++static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry,
++ const char *id, int index)
+ {
+ struct nvmem_cell *cell;
+ const char *name = NULL;
+@@ -1146,6 +1148,7 @@ static struct nvmem_cell *nvmem_create_c
+
+ cell->id = name;
+ cell->entry = entry;
++ cell->index = index;
+
+ return cell;
+ }
+@@ -1184,7 +1187,7 @@ nvmem_cell_get_from_lookup(struct device
+ __nvmem_device_put(nvmem);
+ cell = ERR_PTR(-ENOENT);
+ } else {
+- cell = nvmem_create_cell(cell_entry, con_id);
++ cell = nvmem_create_cell(cell_entry, con_id, 0);
+ if (IS_ERR(cell))
+ __nvmem_device_put(nvmem);
+ }
+@@ -1232,15 +1235,27 @@ struct nvmem_cell *of_nvmem_cell_get(str
+ struct nvmem_device *nvmem;
+ struct nvmem_cell_entry *cell_entry;
+ struct nvmem_cell *cell;
++ struct of_phandle_args cell_spec;
+ int index = 0;
++ int cell_index = 0;
++ int ret;
+
+ /* if cell name exists, find index to the name */
+ if (id)
+ index = of_property_match_string(np, "nvmem-cell-names", id);
+
+- cell_np = of_parse_phandle(np, "nvmem-cells", index);
+- if (!cell_np)
+- return ERR_PTR(-ENOENT);
++ ret = of_parse_phandle_with_optional_args(np, "nvmem-cells",
++ "#nvmem-cell-cells",
++ index, &cell_spec);
++ if (ret)
++ return ERR_PTR(ret);
++
++ if (cell_spec.args_count > 1)
++ return ERR_PTR(-EINVAL);
++
++ cell_np = cell_spec.np;
++ if (cell_spec.args_count)
++ cell_index = cell_spec.args[0];
+
+ nvmem_np = of_get_next_parent(cell_np);
+ if (!nvmem_np)
+@@ -1257,7 +1272,7 @@ struct nvmem_cell *of_nvmem_cell_get(str
+ return ERR_PTR(-ENOENT);
+ }
+
+- cell = nvmem_create_cell(cell_entry, id);
++ cell = nvmem_create_cell(cell_entry, id, cell_index);
+ if (IS_ERR(cell))
+ __nvmem_device_put(nvmem);
+
+@@ -1410,8 +1425,8 @@ static void nvmem_shift_read_buffer_in_p
+ }
+
+ static int __nvmem_cell_read(struct nvmem_device *nvmem,
+- struct nvmem_cell_entry *cell,
+- void *buf, size_t *len, const char *id)
++ struct nvmem_cell_entry *cell,
++ void *buf, size_t *len, const char *id, int index)
+ {
+ int rc;
+
+@@ -1425,7 +1440,7 @@ static int __nvmem_cell_read(struct nvme
+ nvmem_shift_read_buffer_in_place(cell, buf);
+
+ if (nvmem->cell_post_process) {
+- rc = nvmem->cell_post_process(nvmem->priv, id,
++ rc = nvmem->cell_post_process(nvmem->priv, id, index,
+ cell->offset, buf, cell->bytes);
+ if (rc)
+ return rc;
+@@ -1460,7 +1475,7 @@ void *nvmem_cell_read(struct nvmem_cell
+ if (!buf)
+ return ERR_PTR(-ENOMEM);
+
+- rc = __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id);
++ rc = __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id, cell->index);
+ if (rc) {
+ kfree(buf);
+ return ERR_PTR(rc);
+@@ -1773,7 +1788,7 @@ ssize_t nvmem_device_cell_read(struct nv
+ if (rc)
+ return rc;
+
+- rc = __nvmem_cell_read(nvmem, &cell, buf, &len, NULL);
++ rc = __nvmem_cell_read(nvmem, &cell, buf, &len, NULL, 0);
+ if (rc)
+ return rc;
+
+--- a/drivers/nvmem/imx-ocotp.c
++++ b/drivers/nvmem/imx-ocotp.c
+@@ -222,8 +222,8 @@ read_end:
+ return ret;
+ }
+
+-static int imx_ocotp_cell_pp(void *context, const char *id, unsigned int offset,
+- void *data, size_t bytes)
++static int imx_ocotp_cell_pp(void *context, const char *id, int index,
++ unsigned int offset, void *data, size_t bytes)
+ {
+ struct ocotp_priv *priv = context;
+
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -20,8 +20,8 @@ typedef int (*nvmem_reg_read_t)(void *pr
+ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset,
+ void *val, size_t bytes);
+ /* used for vendor specific post processing of cell data */
+-typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, unsigned int offset,
+- void *buf, size_t bytes);
++typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, int index,
++ unsigned int offset, void *buf, size_t bytes);
+
+ enum nvmem_type {
+ NVMEM_TYPE_UNKNOWN = 0,
--- /dev/null
+From fbd03d27776c6121a483921601418e3c8f0ff37e Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:47 +0000
+Subject: [PATCH] nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
+
+struct nvmem_cell_info is used to describe a cell. Thus this should
+really be in the nvmem-provider's header. There are two (unused) nvmem
+access methods which use the nvmem_cell_info to describe the cell to be
+accesses. One can argue, that they will create a cell before accessing,
+thus they are both a provider and a consumer.
+
+struct nvmem_cell_info will get used more and more by nvmem-providers,
+don't force them to also include the consumer header, although they are
+not.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-14-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/linux/nvmem-consumer.h | 10 +---------
+ include/linux/nvmem-provider.h | 19 ++++++++++++++++++-
+ 2 files changed, 19 insertions(+), 10 deletions(-)
+
+--- a/include/linux/nvmem-consumer.h
++++ b/include/linux/nvmem-consumer.h
+@@ -18,15 +18,7 @@ struct device_node;
+ /* consumer cookie */
+ struct nvmem_cell;
+ struct nvmem_device;
+-
+-struct nvmem_cell_info {
+- const char *name;
+- unsigned int offset;
+- unsigned int bytes;
+- unsigned int bit_offset;
+- unsigned int nbits;
+- struct device_node *np;
+-};
++struct nvmem_cell_info;
+
+ /**
+ * struct nvmem_cell_lookup - cell lookup entry
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -14,7 +14,6 @@
+ #include <linux/gpio/consumer.h>
+
+ struct nvmem_device;
+-struct nvmem_cell_info;
+ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int offset,
+ void *val, size_t bytes);
+ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset,
+@@ -48,6 +47,24 @@ struct nvmem_keepout {
+ };
+
+ /**
++ * struct nvmem_cell_info - NVMEM cell description
++ * @name: Name.
++ * @offset: Offset within the NVMEM device.
++ * @bytes: Length of the cell.
++ * @bit_offset: Bit offset if cell is smaller than a byte.
++ * @nbits: Number of bits.
++ * @np: Optional device_node pointer.
++ */
++struct nvmem_cell_info {
++ const char *name;
++ unsigned int offset;
++ unsigned int bytes;
++ unsigned int bit_offset;
++ unsigned int nbits;
++ struct device_node *np;
++};
++
++/**
+ * struct nvmem_config - NVMEM device configuration
+ *
+ * @dev: Parent device.
--- /dev/null
+From cc5bdd323dde6494623f3ffe3a5b887fa21cd375 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:48 +0000
+Subject: [PATCH] nvmem: core: drop the removal of the cells in
+ nvmem_add_cells()
+
+If nvmem_add_cells() fails, the whole nvmem_register() will fail
+and the cells will then be removed anyway. This is a preparation
+to introduce a nvmem_add_one_cell() which can then be used by
+nvmem_add_cells().
+
+This is then the same to what nvmem_add_cells_from_table() and
+nvmem_add_cells_from_of() do.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-15-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 14 ++++----------
+ 1 file changed, 4 insertions(+), 10 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -515,7 +515,7 @@ static int nvmem_add_cells(struct nvmem_
+ int ncells)
+ {
+ struct nvmem_cell_entry **cells;
+- int i, rval;
++ int i, rval = 0;
+
+ cells = kcalloc(ncells, sizeof(*cells), GFP_KERNEL);
+ if (!cells)
+@@ -525,28 +525,22 @@ static int nvmem_add_cells(struct nvmem_
+ cells[i] = kzalloc(sizeof(**cells), GFP_KERNEL);
+ if (!cells[i]) {
+ rval = -ENOMEM;
+- goto err;
++ goto out;
+ }
+
+ rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, &info[i], cells[i]);
+ if (rval) {
+ kfree(cells[i]);
+- goto err;
++ goto out;
+ }
+
+ nvmem_cell_entry_add(cells[i]);
+ }
+
++out:
+ /* remove tmp array */
+ kfree(cells);
+
+- return 0;
+-err:
+- while (i--)
+- nvmem_cell_entry_drop(cells[i]);
+-
+- kfree(cells);
+-
+ return rval;
+ }
+
--- /dev/null
+From 2ded6830d376d5e7bf43d59f7f7fdf1a59abc676 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:49 +0000
+Subject: [PATCH] nvmem: core: add nvmem_add_one_cell()
+
+Add a new function to add exactly one cell. This will be used by the
+nvmem layout drivers to add custom cells. In contrast to the
+nvmem_add_cells(), this has the advantage that we don't have to assemble
+a list of cells on runtime.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-16-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 59 ++++++++++++++++++++--------------
+ include/linux/nvmem-provider.h | 8 +++++
+ 2 files changed, 43 insertions(+), 24 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -502,6 +502,36 @@ static int nvmem_cell_info_to_nvmem_cell
+ }
+
+ /**
++ * nvmem_add_one_cell() - Add one cell information to an nvmem device
++ *
++ * @nvmem: nvmem device to add cells to.
++ * @info: nvmem cell info to add to the device
++ *
++ * Return: 0 or negative error code on failure.
++ */
++int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info)
++{
++ struct nvmem_cell_entry *cell;
++ int rval;
++
++ cell = kzalloc(sizeof(*cell), GFP_KERNEL);
++ if (!cell)
++ return -ENOMEM;
++
++ rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, info, cell);
++ if (rval) {
++ kfree(cell);
++ return rval;
++ }
++
++ nvmem_cell_entry_add(cell);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(nvmem_add_one_cell);
++
++/**
+ * nvmem_add_cells() - Add cell information to an nvmem device
+ *
+ * @nvmem: nvmem device to add cells to.
+@@ -514,34 +544,15 @@ static int nvmem_add_cells(struct nvmem_
+ const struct nvmem_cell_info *info,
+ int ncells)
+ {
+- struct nvmem_cell_entry **cells;
+- int i, rval = 0;
+-
+- cells = kcalloc(ncells, sizeof(*cells), GFP_KERNEL);
+- if (!cells)
+- return -ENOMEM;
++ int i, rval;
+
+ for (i = 0; i < ncells; i++) {
+- cells[i] = kzalloc(sizeof(**cells), GFP_KERNEL);
+- if (!cells[i]) {
+- rval = -ENOMEM;
+- goto out;
+- }
+-
+- rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, &info[i], cells[i]);
+- if (rval) {
+- kfree(cells[i]);
+- goto out;
+- }
+-
+- nvmem_cell_entry_add(cells[i]);
++ rval = nvmem_add_one_cell(nvmem, &info[i]);
++ if (rval)
++ return rval;
+ }
+
+-out:
+- /* remove tmp array */
+- kfree(cells);
+-
+- return rval;
++ return 0;
+ }
+
+ /**
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -155,6 +155,9 @@ struct nvmem_device *devm_nvmem_register
+ void nvmem_add_cell_table(struct nvmem_cell_table *table);
+ void nvmem_del_cell_table(struct nvmem_cell_table *table);
+
++int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info);
++
+ #else
+
+ static inline struct nvmem_device *nvmem_register(const struct nvmem_config *c)
+@@ -172,6 +175,11 @@ devm_nvmem_register(struct device *dev,
+
+ static inline void nvmem_add_cell_table(struct nvmem_cell_table *table) {}
+ static inline void nvmem_del_cell_table(struct nvmem_cell_table *table) {}
++static inline int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info)
++{
++ return -EOPNOTSUPP;
++}
+
+ #endif /* CONFIG_NVMEM */
+ #endif /* ifndef _LINUX_NVMEM_PROVIDER_H */
--- /dev/null
+From 50014d659617dc58780a5d31ceb76c82779a9d8b Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:50 +0000
+Subject: [PATCH] nvmem: core: use nvmem_add_one_cell() in
+ nvmem_add_cells_from_of()
+
+Convert nvmem_add_cells_from_of() to use the new nvmem_add_one_cell().
+This will remove duplicate code and it will make it possible to add a
+hook to a nvmem layout in between, which can change fields before the
+cell is finally added.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-17-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 45 ++++++++++++++------------------------------
+ 1 file changed, 14 insertions(+), 31 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -688,15 +688,14 @@ static int nvmem_validate_keepouts(struc
+
+ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem)
+ {
+- struct device_node *parent, *child;
+ struct device *dev = &nvmem->dev;
+- struct nvmem_cell_entry *cell;
++ struct device_node *child;
+ const __be32 *addr;
+- int len;
++ int len, ret;
+
+- parent = dev->of_node;
++ for_each_child_of_node(dev->of_node, child) {
++ struct nvmem_cell_info info = {0};
+
+- for_each_child_of_node(parent, child) {
+ addr = of_get_property(child, "reg", &len);
+ if (!addr)
+ continue;
+@@ -706,40 +705,24 @@ static int nvmem_add_cells_from_of(struc
+ return -EINVAL;
+ }
+
+- cell = kzalloc(sizeof(*cell), GFP_KERNEL);
+- if (!cell) {
+- of_node_put(child);
+- return -ENOMEM;
+- }
+-
+- cell->nvmem = nvmem;
+- cell->offset = be32_to_cpup(addr++);
+- cell->bytes = be32_to_cpup(addr);
+- cell->name = kasprintf(GFP_KERNEL, "%pOFn", child);
++ info.offset = be32_to_cpup(addr++);
++ info.bytes = be32_to_cpup(addr);
++ info.name = kasprintf(GFP_KERNEL, "%pOFn", child);
+
+ addr = of_get_property(child, "bits", &len);
+ if (addr && len == (2 * sizeof(u32))) {
+- cell->bit_offset = be32_to_cpup(addr++);
+- cell->nbits = be32_to_cpup(addr);
++ info.bit_offset = be32_to_cpup(addr++);
++ info.nbits = be32_to_cpup(addr);
+ }
+
+- if (cell->nbits)
+- cell->bytes = DIV_ROUND_UP(
+- cell->nbits + cell->bit_offset,
+- BITS_PER_BYTE);
+-
+- if (!IS_ALIGNED(cell->offset, nvmem->stride)) {
+- dev_err(dev, "cell %s unaligned to nvmem stride %d\n",
+- cell->name, nvmem->stride);
+- /* Cells already added will be freed later. */
+- kfree_const(cell->name);
+- kfree(cell);
++ info.np = of_node_get(child);
++
++ ret = nvmem_add_one_cell(nvmem, &info);
++ kfree(info.name);
++ if (ret) {
+ of_node_put(child);
+- return -EINVAL;
++ return ret;
+ }
+-
+- cell->np = of_node_get(child);
+- nvmem_cell_entry_add(cell);
+ }
+
+ return 0;
--- /dev/null
+From 6a0bc3522e746025e2d9a63ab2cb5d7062c2d39c Mon Sep 17 00:00:00 2001
+From: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Date: Mon, 6 Feb 2023 13:43:51 +0000
+Subject: [PATCH] nvmem: stm32: add OP-TEE support for STM32MP13x
+
+For boot with OP-TEE on STM32MP13, the communication with the secure
+world no more use STMicroelectronics SMC but communication with the
+STM32MP BSEC TA, for data access (read/write) or lock operation:
+- all the request are sent to OP-TEE trusted application,
+- for upper OTP with ECC protection and with word programming only
+ each OTP are permanently locked when programmed to avoid ECC error
+ on the second write operation
+
+Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-18-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/Kconfig | 11 +
+ drivers/nvmem/Makefile | 1 +
+ drivers/nvmem/stm32-bsec-optee-ta.c | 298 ++++++++++++++++++++++++++++
+ drivers/nvmem/stm32-bsec-optee-ta.h | 80 ++++++++
+ drivers/nvmem/stm32-romem.c | 54 ++++-
+ 5 files changed, 441 insertions(+), 3 deletions(-)
+ create mode 100644 drivers/nvmem/stm32-bsec-optee-ta.c
+ create mode 100644 drivers/nvmem/stm32-bsec-optee-ta.h
+
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -290,9 +290,20 @@ config NVMEM_SPRD_EFUSE
+ This driver can also be built as a module. If so, the module
+ will be called nvmem-sprd-efuse.
+
++config NVMEM_STM32_BSEC_OPTEE_TA
++ bool "STM32MP BSEC OP-TEE TA support for nvmem-stm32-romem driver"
++ depends on OPTEE
++ help
++ Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
++ trusted application STM32MP BSEC.
++
++ This library is a used by stm32-romem driver or included in the module
++ called nvmem-stm32-romem.
++
+ config NVMEM_STM32_ROMEM
+ tristate "STMicroelectronics STM32 factory-programmed memory support"
+ depends on ARCH_STM32 || COMPILE_TEST
++ imply NVMEM_STM32_BSEC_OPTEE_TA
+ help
+ Say y here to enable read-only access for STMicroelectronics STM32
+ factory-programmed memory area.
+--- a/drivers/nvmem/Makefile
++++ b/drivers/nvmem/Makefile
+@@ -61,6 +61,7 @@ obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem
+ nvmem_sprd_efuse-y := sprd-efuse.o
+ obj-$(CONFIG_NVMEM_STM32_ROMEM) += nvmem_stm32_romem.o
+ nvmem_stm32_romem-y := stm32-romem.o
++nvmem_stm32_romem-$(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA) += stm32-bsec-optee-ta.o
+ obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) += nvmem_sunplus_ocotp.o
+ nvmem_sunplus_ocotp-y := sunplus-ocotp.o
+ obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
+--- /dev/null
++++ b/drivers/nvmem/stm32-bsec-optee-ta.c
+@@ -0,0 +1,298 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++/*
++ * OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
++ *
++ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
++ */
++
++#include <linux/tee_drv.h>
++
++#include "stm32-bsec-optee-ta.h"
++
++/*
++ * Read OTP memory
++ *
++ * [in] value[0].a OTP start offset in byte
++ * [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
++ * [out] memref[1].buffer Output buffer to store read values
++ * [out] memref[1].size Size of OTP to be read
++ *
++ * Return codes:
++ * TEE_SUCCESS - Invoke command success
++ * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
++ * TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
++ */
++#define PTA_BSEC_READ_MEM 0x0
++
++/*
++ * Write OTP memory
++ *
++ * [in] value[0].a OTP start offset in byte
++ * [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
++ * [in] memref[1].buffer Input buffer to read values
++ * [in] memref[1].size Size of OTP to be written
++ *
++ * Return codes:
++ * TEE_SUCCESS - Invoke command success
++ * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
++ * TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
++ */
++#define PTA_BSEC_WRITE_MEM 0x1
++
++/* value of PTA_BSEC access type = value[in] b */
++#define SHADOW_ACCESS 0
++#define FUSE_ACCESS 1
++#define LOCK_ACCESS 2
++
++/* Bitfield definition for LOCK status */
++#define LOCK_PERM BIT(30)
++
++/* OP-TEE STM32MP BSEC TA UUID */
++static const uuid_t stm32mp_bsec_ta_uuid =
++ UUID_INIT(0x94cf71ad, 0x80e6, 0x40b5,
++ 0xa7, 0xc6, 0x3d, 0xc5, 0x01, 0xeb, 0x28, 0x03);
++
++/*
++ * Check whether this driver supports the BSEC TA in the TEE instance
++ * represented by the params (ver/data) to this function.
++ */
++static int stm32_bsec_optee_ta_match(struct tee_ioctl_version_data *ver,
++ const void *data)
++{
++ /* Currently this driver only supports GP compliant, OP-TEE based TA */
++ if ((ver->impl_id == TEE_IMPL_ID_OPTEE) &&
++ (ver->gen_caps & TEE_GEN_CAP_GP))
++ return 1;
++ else
++ return 0;
++}
++
++/* Open a session to OP-TEE for STM32MP BSEC TA */
++static int stm32_bsec_ta_open_session(struct tee_context *ctx, u32 *id)
++{
++ struct tee_ioctl_open_session_arg sess_arg;
++ int rc;
++
++ memset(&sess_arg, 0, sizeof(sess_arg));
++ export_uuid(sess_arg.uuid, &stm32mp_bsec_ta_uuid);
++ sess_arg.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL;
++ sess_arg.num_params = 0;
++
++ rc = tee_client_open_session(ctx, &sess_arg, NULL);
++ if ((rc < 0) || (sess_arg.ret != 0)) {
++ pr_err("%s: tee_client_open_session failed err:%#x, ret:%#x\n",
++ __func__, sess_arg.ret, rc);
++ if (!rc)
++ rc = -EINVAL;
++ } else {
++ *id = sess_arg.session;
++ }
++
++ return rc;
++}
++
++/* close a session to OP-TEE for STM32MP BSEC TA */
++static void stm32_bsec_ta_close_session(void *ctx, u32 id)
++{
++ tee_client_close_session(ctx, id);
++}
++
++/* stm32_bsec_optee_ta_open() - initialize the STM32MP BSEC TA */
++int stm32_bsec_optee_ta_open(struct tee_context **ctx)
++{
++ struct tee_context *tee_ctx;
++ u32 session_id;
++ int rc;
++
++ /* Open context with TEE driver */
++ tee_ctx = tee_client_open_context(NULL, stm32_bsec_optee_ta_match, NULL, NULL);
++ if (IS_ERR(tee_ctx)) {
++ rc = PTR_ERR(tee_ctx);
++ if (rc == -ENOENT)
++ return -EPROBE_DEFER;
++ pr_err("%s: tee_client_open_context failed (%d)\n", __func__, rc);
++
++ return rc;
++ }
++
++ /* Check STM32MP BSEC TA presence */
++ rc = stm32_bsec_ta_open_session(tee_ctx, &session_id);
++ if (rc) {
++ tee_client_close_context(tee_ctx);
++ return rc;
++ }
++
++ stm32_bsec_ta_close_session(tee_ctx, session_id);
++
++ *ctx = tee_ctx;
++
++ return 0;
++}
++
++/* stm32_bsec_optee_ta_open() - release the PTA STM32MP BSEC TA */
++void stm32_bsec_optee_ta_close(void *ctx)
++{
++ tee_client_close_context(ctx);
++}
++
++/* stm32_bsec_optee_ta_read() - nvmem read access using PTA client driver */
++int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
++ void *buf, size_t bytes)
++{
++ struct tee_shm *shm;
++ struct tee_ioctl_invoke_arg arg;
++ struct tee_param param[2];
++ u8 *shm_buf;
++ u32 start, num_bytes;
++ int ret;
++ u32 session_id;
++
++ ret = stm32_bsec_ta_open_session(ctx, &session_id);
++ if (ret)
++ return ret;
++
++ memset(&arg, 0, sizeof(arg));
++ memset(¶m, 0, sizeof(param));
++
++ arg.func = PTA_BSEC_READ_MEM;
++ arg.session = session_id;
++ arg.num_params = 2;
++
++ /* align access on 32bits */
++ start = ALIGN_DOWN(offset, 4);
++ num_bytes = round_up(offset + bytes - start, 4);
++ param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
++ param[0].u.value.a = start;
++ param[0].u.value.b = SHADOW_ACCESS;
++
++ shm = tee_shm_alloc_kernel_buf(ctx, num_bytes);
++ if (IS_ERR(shm)) {
++ ret = PTR_ERR(shm);
++ goto out_tee_session;
++ }
++
++ param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT;
++ param[1].u.memref.shm = shm;
++ param[1].u.memref.size = num_bytes;
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n",
++ arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ if (!ret) {
++ shm_buf = tee_shm_get_va(shm, 0);
++ if (IS_ERR(shm_buf)) {
++ ret = PTR_ERR(shm_buf);
++ pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
++ } else {
++ /* read data from 32 bits aligned buffer */
++ memcpy(buf, &shm_buf[offset % 4], bytes);
++ }
++ }
++
++ tee_shm_free(shm);
++
++out_tee_session:
++ stm32_bsec_ta_close_session(ctx, session_id);
++
++ return ret;
++}
++
++/* stm32_bsec_optee_ta_write() - nvmem write access using PTA client driver */
++int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
++ unsigned int offset, void *buf, size_t bytes)
++{ struct tee_shm *shm;
++ struct tee_ioctl_invoke_arg arg;
++ struct tee_param param[2];
++ u8 *shm_buf;
++ int ret;
++ u32 session_id;
++
++ ret = stm32_bsec_ta_open_session(ctx, &session_id);
++ if (ret)
++ return ret;
++
++ /* Allow only writing complete 32-bits aligned words */
++ if ((bytes % 4) || (offset % 4))
++ return -EINVAL;
++
++ memset(&arg, 0, sizeof(arg));
++ memset(¶m, 0, sizeof(param));
++
++ arg.func = PTA_BSEC_WRITE_MEM;
++ arg.session = session_id;
++ arg.num_params = 2;
++
++ param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
++ param[0].u.value.a = offset;
++ param[0].u.value.b = FUSE_ACCESS;
++
++ shm = tee_shm_alloc_kernel_buf(ctx, bytes);
++ if (IS_ERR(shm)) {
++ ret = PTR_ERR(shm);
++ goto out_tee_session;
++ }
++
++ param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT;
++ param[1].u.memref.shm = shm;
++ param[1].u.memref.size = bytes;
++
++ shm_buf = tee_shm_get_va(shm, 0);
++ if (IS_ERR(shm_buf)) {
++ ret = PTR_ERR(shm_buf);
++ pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
++ tee_shm_free(shm);
++
++ goto out_tee_session;
++ }
++
++ memcpy(shm_buf, buf, bytes);
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ pr_debug("Write OTPs %d to %zu, ret=%d\n", offset / 4, (offset + bytes) / 4, ret);
++
++ /* Lock the upper OTPs with ECC protection, word programming only */
++ if (!ret && ((offset + bytes) >= (lower * 4))) {
++ u32 start, nb_lock;
++ u32 *lock = (u32 *)shm_buf;
++ int i;
++
++ /*
++ * don't lock the lower OTPs, no ECC protection and incremental
++ * bit programming, a second write is allowed
++ */
++ start = max_t(u32, offset, lower * 4);
++ nb_lock = (offset + bytes - start) / 4;
++
++ param[0].u.value.a = start;
++ param[0].u.value.b = LOCK_ACCESS;
++ param[1].u.memref.size = nb_lock * 4;
++
++ for (i = 0; i < nb_lock; i++)
++ lock[i] = LOCK_PERM;
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ pr_debug("Lock upper OTPs %d to %d, ret=%d\n",
++ start / 4, start / 4 + nb_lock, ret);
++ }
++
++ tee_shm_free(shm);
++
++out_tee_session:
++ stm32_bsec_ta_close_session(ctx, session_id);
++
++ return ret;
++}
+--- /dev/null
++++ b/drivers/nvmem/stm32-bsec-optee-ta.h
+@@ -0,0 +1,80 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++/*
++ * OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
++ *
++ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
++ */
++
++#if IS_ENABLED(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA)
++/**
++ * stm32_bsec_optee_ta_open() - initialize the STM32 BSEC TA
++ * @ctx: the OP-TEE context on success
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_open(struct tee_context **ctx);
++
++/**
++ * stm32_bsec_optee_ta_close() - release the STM32 BSEC TA
++ * @ctx: the OP-TEE context
++ *
++ * This function used to clean the OP-TEE resources initialized in
++ * stm32_bsec_optee_ta_open(); it can be used as callback to
++ * devm_add_action_or_reset()
++ */
++void stm32_bsec_optee_ta_close(void *ctx);
++
++/**
++ * stm32_bsec_optee_ta_read() - nvmem read access using TA client driver
++ * @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
++ * @offset: nvmem offset
++ * @buf: buffer to fill with nvem values
++ * @bytes: number of bytes to read
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
++ void *buf, size_t bytes);
++
++/**
++ * stm32_bsec_optee_ta_write() - nvmem write access using TA client driver
++ * @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
++ * @lower: number of lower OTP, not protected by ECC
++ * @offset: nvmem offset
++ * @buf: buffer with nvem values
++ * @bytes: number of bytes to write
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
++ unsigned int offset, void *buf, size_t bytes);
++
++#else
++
++static inline int stm32_bsec_optee_ta_open(struct tee_context **ctx)
++{
++ return -EOPNOTSUPP;
++}
++
++static inline void stm32_bsec_optee_ta_close(void *ctx)
++{
++}
++
++static inline int stm32_bsec_optee_ta_read(struct tee_context *ctx,
++ unsigned int offset, void *buf,
++ size_t bytes)
++{
++ return -EOPNOTSUPP;
++}
++
++static inline int stm32_bsec_optee_ta_write(struct tee_context *ctx,
++ unsigned int lower,
++ unsigned int offset, void *buf,
++ size_t bytes)
++{
++ return -EOPNOTSUPP;
++}
++#endif /* CONFIG_NVMEM_STM32_BSEC_OPTEE_TA */
+--- a/drivers/nvmem/stm32-romem.c
++++ b/drivers/nvmem/stm32-romem.c
+@@ -11,6 +11,9 @@
+ #include <linux/module.h>
+ #include <linux/nvmem-provider.h>
+ #include <linux/of_device.h>
++#include <linux/tee_drv.h>
++
++#include "stm32-bsec-optee-ta.h"
+
+ /* BSEC secure service access from non-secure */
+ #define STM32_SMC_BSEC 0x82001003
+@@ -25,12 +28,14 @@
+ struct stm32_romem_cfg {
+ int size;
+ u8 lower;
++ bool ta;
+ };
+
+ struct stm32_romem_priv {
+ void __iomem *base;
+ struct nvmem_config cfg;
+ u8 lower;
++ struct tee_context *ctx;
+ };
+
+ static int stm32_romem_read(void *context, unsigned int offset, void *buf,
+@@ -138,12 +143,29 @@ static int stm32_bsec_write(void *contex
+ return 0;
+ }
+
++static int stm32_bsec_pta_read(void *context, unsigned int offset, void *buf,
++ size_t bytes)
++{
++ struct stm32_romem_priv *priv = context;
++
++ return stm32_bsec_optee_ta_read(priv->ctx, offset, buf, bytes);
++}
++
++static int stm32_bsec_pta_write(void *context, unsigned int offset, void *buf,
++ size_t bytes)
++{
++ struct stm32_romem_priv *priv = context;
++
++ return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes);
++}
++
+ static int stm32_romem_probe(struct platform_device *pdev)
+ {
+ const struct stm32_romem_cfg *cfg;
+ struct device *dev = &pdev->dev;
+ struct stm32_romem_priv *priv;
+ struct resource *res;
++ int rc;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+@@ -173,15 +195,31 @@ static int stm32_romem_probe(struct plat
+ } else {
+ priv->cfg.size = cfg->size;
+ priv->lower = cfg->lower;
+- priv->cfg.reg_read = stm32_bsec_read;
+- priv->cfg.reg_write = stm32_bsec_write;
++ if (cfg->ta) {
++ rc = stm32_bsec_optee_ta_open(&priv->ctx);
++ /* wait for OP-TEE client driver to be up and ready */
++ if (rc)
++ return rc;
++ }
++ if (priv->ctx) {
++ rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx);
++ if (rc) {
++ dev_err(dev, "devm_add_action_or_reset() failed (%d)\n", rc);
++ return rc;
++ }
++ priv->cfg.reg_read = stm32_bsec_pta_read;
++ priv->cfg.reg_write = stm32_bsec_pta_write;
++ } else {
++ priv->cfg.reg_read = stm32_bsec_read;
++ priv->cfg.reg_write = stm32_bsec_write;
++ }
+ }
+
+ return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg));
+ }
+
+ /*
+- * STM32MP15 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
++ * STM32MP15/13 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
+ * => 96 x 32-bits data words
+ * - Lower: 1K bits, 2:1 redundancy, incremental bit programming
+ * => 32 (x 32-bits) lower shadow registers = words 0 to 31
+@@ -191,6 +229,13 @@ static int stm32_romem_probe(struct plat
+ static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
+ .size = 384,
+ .lower = 32,
++ .ta = false,
++};
++
++static const struct stm32_romem_cfg stm32mp13_bsec_cfg = {
++ .size = 384,
++ .lower = 32,
++ .ta = true,
+ };
+
+ static const struct of_device_id stm32_romem_of_match[] = {
+@@ -198,7 +243,10 @@ static const struct of_device_id stm32_r
+ .compatible = "st,stm32mp15-bsec",
+ .data = (void *)&stm32mp15_bsec_cfg,
+ }, {
++ .compatible = "st,stm32mp13-bsec",
++ .data = (void *)&stm32mp13_bsec_cfg,
+ },
++ { /* sentinel */ },
+ };
+ MODULE_DEVICE_TABLE(of, stm32_romem_of_match);
+
--- /dev/null
+From df2f34ef1d924125ffaf29dfdaf7cdbd3183c321 Mon Sep 17 00:00:00 2001
+From: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Date: Mon, 6 Feb 2023 13:43:52 +0000
+Subject: [PATCH] nvmem: stm32: detect bsec pta presence for STM32MP15x
+
+On STM32MP15x SoC, the SMC backend is optional when OP-TEE is used;
+the PTA BSEC should be used as it is done on STM32MP13x platform,
+but the BSEC SMC can be also used: it is a legacy mode in OP-TEE,
+not recommended but used in previous OP-TEE firmware.
+
+The presence of OP-TEE is dynamically detected in STM32MP15x device tree
+and the supported NVMEM backend is dynamically detected:
+- PTA with stm32_bsec_pta_find
+- SMC with stm32_bsec_check
+
+With OP-TEE but without PTA and SMC detection, the probe is deferred for
+STM32MP15x devices.
+
+On STM32MP13x platform, only the PTA is supported with cfg->ta = true
+and this detection is skipped.
+
+Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-19-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/stm32-romem.c | 38 +++++++++++++++++++++++++++++++++----
+ 1 file changed, 34 insertions(+), 4 deletions(-)
+
+--- a/drivers/nvmem/stm32-romem.c
++++ b/drivers/nvmem/stm32-romem.c
+@@ -159,6 +159,31 @@ static int stm32_bsec_pta_write(void *co
+ return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes);
+ }
+
++static bool stm32_bsec_smc_check(void)
++{
++ u32 val;
++ int ret;
++
++ /* check that the OP-TEE support the BSEC SMC (legacy mode) */
++ ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, 0, 0, &val);
++
++ return !ret;
++}
++
++static bool optee_presence_check(void)
++{
++ struct device_node *np;
++ bool tee_detected = false;
++
++ /* check that the OP-TEE node is present and available. */
++ np = of_find_compatible_node(NULL, NULL, "linaro,optee-tz");
++ if (np && of_device_is_available(np))
++ tee_detected = true;
++ of_node_put(np);
++
++ return tee_detected;
++}
++
+ static int stm32_romem_probe(struct platform_device *pdev)
+ {
+ const struct stm32_romem_cfg *cfg;
+@@ -195,11 +220,16 @@ static int stm32_romem_probe(struct plat
+ } else {
+ priv->cfg.size = cfg->size;
+ priv->lower = cfg->lower;
+- if (cfg->ta) {
++ if (cfg->ta || optee_presence_check()) {
+ rc = stm32_bsec_optee_ta_open(&priv->ctx);
+- /* wait for OP-TEE client driver to be up and ready */
+- if (rc)
+- return rc;
++ if (rc) {
++ /* wait for OP-TEE client driver to be up and ready */
++ if (rc == -EPROBE_DEFER)
++ return -EPROBE_DEFER;
++ /* BSEC PTA is required or SMC not supported */
++ if (cfg->ta || !stm32_bsec_smc_check())
++ return rc;
++ }
+ }
+ if (priv->ctx) {
+ rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx);
--- /dev/null
+From 3e5ac22aa564026e99defc3a8e02082521a5b231 Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Mon, 6 Feb 2023 13:43:53 +0000
+Subject: [PATCH] nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
+
+Convert an empty line to " *" to avoid a kernel-doc warning:
+
+drivers/nvmem/rave-sp-eeprom.c:48: warning: bad line:
+
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Cc: Andrey Vostrikov <andrey.vostrikov@cogentembedded.com>
+Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
+Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-20-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/rave-sp-eeprom.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/rave-sp-eeprom.c
++++ b/drivers/nvmem/rave-sp-eeprom.c
+@@ -45,7 +45,7 @@ enum rave_sp_eeprom_header_size {
+ * @type: Access type (see enum rave_sp_eeprom_access_type)
+ * @success: Success flag (Success = 1, Failure = 0)
+ * @data: Read data
+-
++ *
+ * Note this structure corresponds to RSP_*_EEPROM payload from RAVE
+ * SP ICD
+ */
--- /dev/null
+From eb7dda20f42a9137e9ee53d5ed3b743d49338cb5 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Mon, 6 Feb 2023 13:43:54 +0000
+Subject: [PATCH] nvmem: qcom-spmi-sdam: register at device init time
+
+There are currently no in-tree users of the Qualcomm SDAM nvmem driver
+and there is generally no point in registering a driver that can be
+built as a module at subsys init time.
+
+Register the driver at the normal device init time instead and let
+driver core sort out the probe order.
+
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-21-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/qcom-spmi-sdam.c | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+--- a/drivers/nvmem/qcom-spmi-sdam.c
++++ b/drivers/nvmem/qcom-spmi-sdam.c
+@@ -175,18 +175,7 @@ static struct platform_driver sdam_drive
+ },
+ .probe = sdam_probe,
+ };
+-
+-static int __init sdam_init(void)
+-{
+- return platform_driver_register(&sdam_driver);
+-}
+-subsys_initcall(sdam_init);
+-
+-static void __exit sdam_exit(void)
+-{
+- return platform_driver_unregister(&sdam_driver);
+-}
+-module_exit(sdam_exit);
++module_platform_driver(sdam_driver);
+
+ MODULE_DESCRIPTION("QCOM SPMI SDAM driver");
+ MODULE_LICENSE("GPL v2");
--- /dev/null
+From 1dc7e37bb0ec1c997fac82031332a38c7610352f Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Mon, 6 Feb 2023 13:43:56 +0000
+Subject: [PATCH] nvmem: stm32: fix OPTEE dependency
+
+The stm32 nvmem driver fails to link as built-in when OPTEE
+is a loadable module:
+
+aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec:
+stm32-bsec-optee-ta.c:(.text+0xc8): undefined reference to `tee_client_open_session'
+aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec:
+stm32-bsec-optee-ta.c:(.text+0x1fc): undefined reference to `tee_client_open_context'
+
+Change the CONFIG_NVMEM_STM32_ROMEM definition so it can only
+be built-in if OPTEE is either built-in or disabled, and
+make NVMEM_STM32_BSEC_OPTEE_TA a hidden symbol instead.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-23-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/Kconfig | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -291,8 +291,7 @@ config NVMEM_SPRD_EFUSE
+ will be called nvmem-sprd-efuse.
+
+ config NVMEM_STM32_BSEC_OPTEE_TA
+- bool "STM32MP BSEC OP-TEE TA support for nvmem-stm32-romem driver"
+- depends on OPTEE
++ def_bool NVMEM_STM32_ROMEM && OPTEE
+ help
+ Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
+ trusted application STM32MP BSEC.
+@@ -303,7 +302,7 @@ config NVMEM_STM32_BSEC_OPTEE_TA
+ config NVMEM_STM32_ROMEM
+ tristate "STMicroelectronics STM32 factory-programmed memory support"
+ depends on ARCH_STM32 || COMPILE_TEST
+- imply NVMEM_STM32_BSEC_OPTEE_TA
++ depends on OPTEE || !OPTEE
+ help
+ Say y here to enable read-only access for STMicroelectronics STM32
+ factory-programmed memory area.
+++ /dev/null
-From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
-From: INAGAKI Hiroshi <musashino.open@gmail.com>
-Date: Thu, 13 Oct 2022 00:51:33 +0900
-Subject: [PATCH] nvmem: u-boot-env: align endianness of crc32 values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch fixes crc32 error on Big-Endianness system by conversion of
-calculated crc32 value.
-
-Little-Endianness system:
-
- obtained crc32: Little
-calculated crc32: Little
-
-Big-Endianness system:
-
- obtained crc32: Little
-calculated crc32: Big
-
-log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
-
-[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
-[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
-
-Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
-
-Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
-Acked-by: Rafał Miłecki <rafal@milecki.pl>
-Tested-by: Christian Lamparter <chunkeey@gmail.com>
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
----
- drivers/nvmem/u-boot-env.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/nvmem/u-boot-env.c
-+++ b/drivers/nvmem/u-boot-env.c
-@@ -156,7 +156,7 @@ static int u_boot_env_parse(struct u_boo
- crc32_data_len = priv->mtd->size - crc32_data_offset;
- data_len = priv->mtd->size - data_offset;
-
-- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
-+ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
- if (calc != crc32) {
- dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
- err = -EINVAL;
--- /dev/null
+From 2e8dc541ae207349b51c65391be625ffe1f86e0c Mon Sep 17 00:00:00 2001
+From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
+Date: Mon, 6 Feb 2023 13:43:41 +0000
+Subject: [PATCH] nvmem: core: remove spurious white space
+
+Remove a spurious white space in for the ida_alloc() call.
+
+Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-8-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -764,7 +764,7 @@ struct nvmem_device *nvmem_register(cons
+ if (!nvmem)
+ return ERR_PTR(-ENOMEM);
+
+- rval = ida_alloc(&nvmem_ida, GFP_KERNEL);
++ rval = ida_alloc(&nvmem_ida, GFP_KERNEL);
+ if (rval < 0) {
+ kfree(nvmem);
+ return ERR_PTR(rval);
--- /dev/null
+From 5d8e6e6c10a3d37486d263b16ddc15991a7e4a88 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:46 +0000
+Subject: [PATCH] nvmem: core: add an index parameter to the cell
+
+Sometimes a cell can represend multiple values. For example, a base
+ethernet address stored in the NVMEM can be expanded into multiple
+discreet ones by adding an offset.
+
+For this use case, introduce an index parameter which is then used to
+distiguish between values. This parameter will then be passed to the
+post process hook which can then use it to create different values
+during reading.
+
+At the moment, there is only support for the device tree path. You can
+add the index to the phandle, e.g.
+
+ &net {
+ nvmem-cells = <&base_mac_address 2>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ &nvmem_provider {
+ base_mac_address: base-mac-address@0 {
+ #nvmem-cell-cells = <1>;
+ reg = <0 6>;
+ };
+ };
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-13-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 37 ++++++++++++++++++++++++----------
+ drivers/nvmem/imx-ocotp.c | 4 ++--
+ include/linux/nvmem-provider.h | 4 ++--
+ 3 files changed, 30 insertions(+), 15 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -60,6 +60,7 @@ struct nvmem_cell_entry {
+ struct nvmem_cell {
+ struct nvmem_cell_entry *entry;
+ const char *id;
++ int index;
+ };
+
+ static DEFINE_MUTEX(nvmem_mutex);
+@@ -1125,7 +1126,8 @@ struct nvmem_device *devm_nvmem_device_g
+ }
+ EXPORT_SYMBOL_GPL(devm_nvmem_device_get);
+
+-static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry, const char *id)
++static struct nvmem_cell *nvmem_create_cell(struct nvmem_cell_entry *entry,
++ const char *id, int index)
+ {
+ struct nvmem_cell *cell;
+ const char *name = NULL;
+@@ -1144,6 +1146,7 @@ static struct nvmem_cell *nvmem_create_c
+
+ cell->id = name;
+ cell->entry = entry;
++ cell->index = index;
+
+ return cell;
+ }
+@@ -1182,7 +1185,7 @@ nvmem_cell_get_from_lookup(struct device
+ __nvmem_device_put(nvmem);
+ cell = ERR_PTR(-ENOENT);
+ } else {
+- cell = nvmem_create_cell(cell_entry, con_id);
++ cell = nvmem_create_cell(cell_entry, con_id, 0);
+ if (IS_ERR(cell))
+ __nvmem_device_put(nvmem);
+ }
+@@ -1230,15 +1233,27 @@ struct nvmem_cell *of_nvmem_cell_get(str
+ struct nvmem_device *nvmem;
+ struct nvmem_cell_entry *cell_entry;
+ struct nvmem_cell *cell;
++ struct of_phandle_args cell_spec;
+ int index = 0;
++ int cell_index = 0;
++ int ret;
+
+ /* if cell name exists, find index to the name */
+ if (id)
+ index = of_property_match_string(np, "nvmem-cell-names", id);
+
+- cell_np = of_parse_phandle(np, "nvmem-cells", index);
+- if (!cell_np)
+- return ERR_PTR(-ENOENT);
++ ret = of_parse_phandle_with_optional_args(np, "nvmem-cells",
++ "#nvmem-cell-cells",
++ index, &cell_spec);
++ if (ret)
++ return ERR_PTR(ret);
++
++ if (cell_spec.args_count > 1)
++ return ERR_PTR(-EINVAL);
++
++ cell_np = cell_spec.np;
++ if (cell_spec.args_count)
++ cell_index = cell_spec.args[0];
+
+ nvmem_np = of_get_next_parent(cell_np);
+ if (!nvmem_np)
+@@ -1255,7 +1270,7 @@ struct nvmem_cell *of_nvmem_cell_get(str
+ return ERR_PTR(-ENOENT);
+ }
+
+- cell = nvmem_create_cell(cell_entry, id);
++ cell = nvmem_create_cell(cell_entry, id, cell_index);
+ if (IS_ERR(cell))
+ __nvmem_device_put(nvmem);
+
+@@ -1408,8 +1423,8 @@ static void nvmem_shift_read_buffer_in_p
+ }
+
+ static int __nvmem_cell_read(struct nvmem_device *nvmem,
+- struct nvmem_cell_entry *cell,
+- void *buf, size_t *len, const char *id)
++ struct nvmem_cell_entry *cell,
++ void *buf, size_t *len, const char *id, int index)
+ {
+ int rc;
+
+@@ -1423,7 +1438,7 @@ static int __nvmem_cell_read(struct nvme
+ nvmem_shift_read_buffer_in_place(cell, buf);
+
+ if (nvmem->cell_post_process) {
+- rc = nvmem->cell_post_process(nvmem->priv, id,
++ rc = nvmem->cell_post_process(nvmem->priv, id, index,
+ cell->offset, buf, cell->bytes);
+ if (rc)
+ return rc;
+@@ -1458,7 +1473,7 @@ void *nvmem_cell_read(struct nvmem_cell
+ if (!buf)
+ return ERR_PTR(-ENOMEM);
+
+- rc = __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id);
++ rc = __nvmem_cell_read(nvmem, cell->entry, buf, len, cell->id, cell->index);
+ if (rc) {
+ kfree(buf);
+ return ERR_PTR(rc);
+@@ -1771,7 +1786,7 @@ ssize_t nvmem_device_cell_read(struct nv
+ if (rc)
+ return rc;
+
+- rc = __nvmem_cell_read(nvmem, &cell, buf, &len, NULL);
++ rc = __nvmem_cell_read(nvmem, &cell, buf, &len, NULL, 0);
+ if (rc)
+ return rc;
+
+--- a/drivers/nvmem/imx-ocotp.c
++++ b/drivers/nvmem/imx-ocotp.c
+@@ -222,8 +222,8 @@ read_end:
+ return ret;
+ }
+
+-static int imx_ocotp_cell_pp(void *context, const char *id, unsigned int offset,
+- void *data, size_t bytes)
++static int imx_ocotp_cell_pp(void *context, const char *id, int index,
++ unsigned int offset, void *data, size_t bytes)
+ {
+ struct ocotp_priv *priv = context;
+
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -20,8 +20,8 @@ typedef int (*nvmem_reg_read_t)(void *pr
+ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset,
+ void *val, size_t bytes);
+ /* used for vendor specific post processing of cell data */
+-typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, unsigned int offset,
+- void *buf, size_t bytes);
++typedef int (*nvmem_cell_post_process_t)(void *priv, const char *id, int index,
++ unsigned int offset, void *buf, size_t bytes);
+
+ enum nvmem_type {
+ NVMEM_TYPE_UNKNOWN = 0,
--- /dev/null
+From fbd03d27776c6121a483921601418e3c8f0ff37e Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:47 +0000
+Subject: [PATCH] nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
+
+struct nvmem_cell_info is used to describe a cell. Thus this should
+really be in the nvmem-provider's header. There are two (unused) nvmem
+access methods which use the nvmem_cell_info to describe the cell to be
+accesses. One can argue, that they will create a cell before accessing,
+thus they are both a provider and a consumer.
+
+struct nvmem_cell_info will get used more and more by nvmem-providers,
+don't force them to also include the consumer header, although they are
+not.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-14-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/linux/nvmem-consumer.h | 10 +---------
+ include/linux/nvmem-provider.h | 19 ++++++++++++++++++-
+ 2 files changed, 19 insertions(+), 10 deletions(-)
+
+--- a/include/linux/nvmem-consumer.h
++++ b/include/linux/nvmem-consumer.h
+@@ -18,15 +18,7 @@ struct device_node;
+ /* consumer cookie */
+ struct nvmem_cell;
+ struct nvmem_device;
+-
+-struct nvmem_cell_info {
+- const char *name;
+- unsigned int offset;
+- unsigned int bytes;
+- unsigned int bit_offset;
+- unsigned int nbits;
+- struct device_node *np;
+-};
++struct nvmem_cell_info;
+
+ /**
+ * struct nvmem_cell_lookup - cell lookup entry
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -14,7 +14,6 @@
+ #include <linux/gpio/consumer.h>
+
+ struct nvmem_device;
+-struct nvmem_cell_info;
+ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int offset,
+ void *val, size_t bytes);
+ typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset,
+@@ -48,6 +47,24 @@ struct nvmem_keepout {
+ };
+
+ /**
++ * struct nvmem_cell_info - NVMEM cell description
++ * @name: Name.
++ * @offset: Offset within the NVMEM device.
++ * @bytes: Length of the cell.
++ * @bit_offset: Bit offset if cell is smaller than a byte.
++ * @nbits: Number of bits.
++ * @np: Optional device_node pointer.
++ */
++struct nvmem_cell_info {
++ const char *name;
++ unsigned int offset;
++ unsigned int bytes;
++ unsigned int bit_offset;
++ unsigned int nbits;
++ struct device_node *np;
++};
++
++/**
+ * struct nvmem_config - NVMEM device configuration
+ *
+ * @dev: Parent device.
--- /dev/null
+From cc5bdd323dde6494623f3ffe3a5b887fa21cd375 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:48 +0000
+Subject: [PATCH] nvmem: core: drop the removal of the cells in
+ nvmem_add_cells()
+
+If nvmem_add_cells() fails, the whole nvmem_register() will fail
+and the cells will then be removed anyway. This is a preparation
+to introduce a nvmem_add_one_cell() which can then be used by
+nvmem_add_cells().
+
+This is then the same to what nvmem_add_cells_from_table() and
+nvmem_add_cells_from_of() do.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-15-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 14 ++++----------
+ 1 file changed, 4 insertions(+), 10 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -515,7 +515,7 @@ static int nvmem_add_cells(struct nvmem_
+ int ncells)
+ {
+ struct nvmem_cell_entry **cells;
+- int i, rval;
++ int i, rval = 0;
+
+ cells = kcalloc(ncells, sizeof(*cells), GFP_KERNEL);
+ if (!cells)
+@@ -525,28 +525,22 @@ static int nvmem_add_cells(struct nvmem_
+ cells[i] = kzalloc(sizeof(**cells), GFP_KERNEL);
+ if (!cells[i]) {
+ rval = -ENOMEM;
+- goto err;
++ goto out;
+ }
+
+ rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, &info[i], cells[i]);
+ if (rval) {
+ kfree(cells[i]);
+- goto err;
++ goto out;
+ }
+
+ nvmem_cell_entry_add(cells[i]);
+ }
+
++out:
+ /* remove tmp array */
+ kfree(cells);
+
+- return 0;
+-err:
+- while (i--)
+- nvmem_cell_entry_drop(cells[i]);
+-
+- kfree(cells);
+-
+ return rval;
+ }
+
--- /dev/null
+From 2ded6830d376d5e7bf43d59f7f7fdf1a59abc676 Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:49 +0000
+Subject: [PATCH] nvmem: core: add nvmem_add_one_cell()
+
+Add a new function to add exactly one cell. This will be used by the
+nvmem layout drivers to add custom cells. In contrast to the
+nvmem_add_cells(), this has the advantage that we don't have to assemble
+a list of cells on runtime.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-16-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 59 ++++++++++++++++++++--------------
+ include/linux/nvmem-provider.h | 8 +++++
+ 2 files changed, 43 insertions(+), 24 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -502,6 +502,36 @@ static int nvmem_cell_info_to_nvmem_cell
+ }
+
+ /**
++ * nvmem_add_one_cell() - Add one cell information to an nvmem device
++ *
++ * @nvmem: nvmem device to add cells to.
++ * @info: nvmem cell info to add to the device
++ *
++ * Return: 0 or negative error code on failure.
++ */
++int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info)
++{
++ struct nvmem_cell_entry *cell;
++ int rval;
++
++ cell = kzalloc(sizeof(*cell), GFP_KERNEL);
++ if (!cell)
++ return -ENOMEM;
++
++ rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, info, cell);
++ if (rval) {
++ kfree(cell);
++ return rval;
++ }
++
++ nvmem_cell_entry_add(cell);
++
++ return 0;
++}
++EXPORT_SYMBOL_GPL(nvmem_add_one_cell);
++
++/**
+ * nvmem_add_cells() - Add cell information to an nvmem device
+ *
+ * @nvmem: nvmem device to add cells to.
+@@ -514,34 +544,15 @@ static int nvmem_add_cells(struct nvmem_
+ const struct nvmem_cell_info *info,
+ int ncells)
+ {
+- struct nvmem_cell_entry **cells;
+- int i, rval = 0;
+-
+- cells = kcalloc(ncells, sizeof(*cells), GFP_KERNEL);
+- if (!cells)
+- return -ENOMEM;
++ int i, rval;
+
+ for (i = 0; i < ncells; i++) {
+- cells[i] = kzalloc(sizeof(**cells), GFP_KERNEL);
+- if (!cells[i]) {
+- rval = -ENOMEM;
+- goto out;
+- }
+-
+- rval = nvmem_cell_info_to_nvmem_cell_entry(nvmem, &info[i], cells[i]);
+- if (rval) {
+- kfree(cells[i]);
+- goto out;
+- }
+-
+- nvmem_cell_entry_add(cells[i]);
++ rval = nvmem_add_one_cell(nvmem, &info[i]);
++ if (rval)
++ return rval;
+ }
+
+-out:
+- /* remove tmp array */
+- kfree(cells);
+-
+- return rval;
++ return 0;
+ }
+
+ /**
+--- a/include/linux/nvmem-provider.h
++++ b/include/linux/nvmem-provider.h
+@@ -153,6 +153,9 @@ struct nvmem_device *devm_nvmem_register
+ void nvmem_add_cell_table(struct nvmem_cell_table *table);
+ void nvmem_del_cell_table(struct nvmem_cell_table *table);
+
++int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info);
++
+ #else
+
+ static inline struct nvmem_device *nvmem_register(const struct nvmem_config *c)
+@@ -170,6 +173,11 @@ devm_nvmem_register(struct device *dev,
+
+ static inline void nvmem_add_cell_table(struct nvmem_cell_table *table) {}
+ static inline void nvmem_del_cell_table(struct nvmem_cell_table *table) {}
++static inline int nvmem_add_one_cell(struct nvmem_device *nvmem,
++ const struct nvmem_cell_info *info)
++{
++ return -EOPNOTSUPP;
++}
+
+ #endif /* CONFIG_NVMEM */
+ #endif /* ifndef _LINUX_NVMEM_PROVIDER_H */
--- /dev/null
+From 50014d659617dc58780a5d31ceb76c82779a9d8b Mon Sep 17 00:00:00 2001
+From: Michael Walle <michael@walle.cc>
+Date: Mon, 6 Feb 2023 13:43:50 +0000
+Subject: [PATCH] nvmem: core: use nvmem_add_one_cell() in
+ nvmem_add_cells_from_of()
+
+Convert nvmem_add_cells_from_of() to use the new nvmem_add_one_cell().
+This will remove duplicate code and it will make it possible to add a
+hook to a nvmem layout in between, which can change fields before the
+cell is finally added.
+
+Signed-off-by: Michael Walle <michael@walle.cc>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-17-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/core.c | 45 ++++++++++++++------------------------------
+ 1 file changed, 14 insertions(+), 31 deletions(-)
+
+--- a/drivers/nvmem/core.c
++++ b/drivers/nvmem/core.c
+@@ -688,15 +688,14 @@ static int nvmem_validate_keepouts(struc
+
+ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem)
+ {
+- struct device_node *parent, *child;
+ struct device *dev = &nvmem->dev;
+- struct nvmem_cell_entry *cell;
++ struct device_node *child;
+ const __be32 *addr;
+- int len;
++ int len, ret;
+
+- parent = dev->of_node;
++ for_each_child_of_node(dev->of_node, child) {
++ struct nvmem_cell_info info = {0};
+
+- for_each_child_of_node(parent, child) {
+ addr = of_get_property(child, "reg", &len);
+ if (!addr)
+ continue;
+@@ -706,40 +705,24 @@ static int nvmem_add_cells_from_of(struc
+ return -EINVAL;
+ }
+
+- cell = kzalloc(sizeof(*cell), GFP_KERNEL);
+- if (!cell) {
+- of_node_put(child);
+- return -ENOMEM;
+- }
+-
+- cell->nvmem = nvmem;
+- cell->offset = be32_to_cpup(addr++);
+- cell->bytes = be32_to_cpup(addr);
+- cell->name = kasprintf(GFP_KERNEL, "%pOFn", child);
++ info.offset = be32_to_cpup(addr++);
++ info.bytes = be32_to_cpup(addr);
++ info.name = kasprintf(GFP_KERNEL, "%pOFn", child);
+
+ addr = of_get_property(child, "bits", &len);
+ if (addr && len == (2 * sizeof(u32))) {
+- cell->bit_offset = be32_to_cpup(addr++);
+- cell->nbits = be32_to_cpup(addr);
++ info.bit_offset = be32_to_cpup(addr++);
++ info.nbits = be32_to_cpup(addr);
+ }
+
+- if (cell->nbits)
+- cell->bytes = DIV_ROUND_UP(
+- cell->nbits + cell->bit_offset,
+- BITS_PER_BYTE);
+-
+- if (!IS_ALIGNED(cell->offset, nvmem->stride)) {
+- dev_err(dev, "cell %s unaligned to nvmem stride %d\n",
+- cell->name, nvmem->stride);
+- /* Cells already added will be freed later. */
+- kfree_const(cell->name);
+- kfree(cell);
++ info.np = of_node_get(child);
++
++ ret = nvmem_add_one_cell(nvmem, &info);
++ kfree(info.name);
++ if (ret) {
+ of_node_put(child);
+- return -EINVAL;
++ return ret;
+ }
+-
+- cell->np = of_node_get(child);
+- nvmem_cell_entry_add(cell);
+ }
+
+ return 0;
--- /dev/null
+From 6a0bc3522e746025e2d9a63ab2cb5d7062c2d39c Mon Sep 17 00:00:00 2001
+From: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Date: Mon, 6 Feb 2023 13:43:51 +0000
+Subject: [PATCH] nvmem: stm32: add OP-TEE support for STM32MP13x
+
+For boot with OP-TEE on STM32MP13, the communication with the secure
+world no more use STMicroelectronics SMC but communication with the
+STM32MP BSEC TA, for data access (read/write) or lock operation:
+- all the request are sent to OP-TEE trusted application,
+- for upper OTP with ECC protection and with word programming only
+ each OTP are permanently locked when programmed to avoid ECC error
+ on the second write operation
+
+Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-18-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/Kconfig | 11 +
+ drivers/nvmem/Makefile | 1 +
+ drivers/nvmem/stm32-bsec-optee-ta.c | 298 ++++++++++++++++++++++++++++
+ drivers/nvmem/stm32-bsec-optee-ta.h | 80 ++++++++
+ drivers/nvmem/stm32-romem.c | 54 ++++-
+ 5 files changed, 441 insertions(+), 3 deletions(-)
+ create mode 100644 drivers/nvmem/stm32-bsec-optee-ta.c
+ create mode 100644 drivers/nvmem/stm32-bsec-optee-ta.h
+
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -290,9 +290,20 @@ config NVMEM_SPRD_EFUSE
+ This driver can also be built as a module. If so, the module
+ will be called nvmem-sprd-efuse.
+
++config NVMEM_STM32_BSEC_OPTEE_TA
++ bool "STM32MP BSEC OP-TEE TA support for nvmem-stm32-romem driver"
++ depends on OPTEE
++ help
++ Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
++ trusted application STM32MP BSEC.
++
++ This library is a used by stm32-romem driver or included in the module
++ called nvmem-stm32-romem.
++
+ config NVMEM_STM32_ROMEM
+ tristate "STMicroelectronics STM32 factory-programmed memory support"
+ depends on ARCH_STM32 || COMPILE_TEST
++ imply NVMEM_STM32_BSEC_OPTEE_TA
+ help
+ Say y here to enable read-only access for STMicroelectronics STM32
+ factory-programmed memory area.
+--- a/drivers/nvmem/Makefile
++++ b/drivers/nvmem/Makefile
+@@ -61,6 +61,7 @@ obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem
+ nvmem_sprd_efuse-y := sprd-efuse.o
+ obj-$(CONFIG_NVMEM_STM32_ROMEM) += nvmem_stm32_romem.o
+ nvmem_stm32_romem-y := stm32-romem.o
++nvmem_stm32_romem-$(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA) += stm32-bsec-optee-ta.o
+ obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) += nvmem_sunplus_ocotp.o
+ nvmem_sunplus_ocotp-y := sunplus-ocotp.o
+ obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
+--- /dev/null
++++ b/drivers/nvmem/stm32-bsec-optee-ta.c
+@@ -0,0 +1,298 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++/*
++ * OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
++ *
++ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
++ */
++
++#include <linux/tee_drv.h>
++
++#include "stm32-bsec-optee-ta.h"
++
++/*
++ * Read OTP memory
++ *
++ * [in] value[0].a OTP start offset in byte
++ * [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
++ * [out] memref[1].buffer Output buffer to store read values
++ * [out] memref[1].size Size of OTP to be read
++ *
++ * Return codes:
++ * TEE_SUCCESS - Invoke command success
++ * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
++ * TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
++ */
++#define PTA_BSEC_READ_MEM 0x0
++
++/*
++ * Write OTP memory
++ *
++ * [in] value[0].a OTP start offset in byte
++ * [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
++ * [in] memref[1].buffer Input buffer to read values
++ * [in] memref[1].size Size of OTP to be written
++ *
++ * Return codes:
++ * TEE_SUCCESS - Invoke command success
++ * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
++ * TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
++ */
++#define PTA_BSEC_WRITE_MEM 0x1
++
++/* value of PTA_BSEC access type = value[in] b */
++#define SHADOW_ACCESS 0
++#define FUSE_ACCESS 1
++#define LOCK_ACCESS 2
++
++/* Bitfield definition for LOCK status */
++#define LOCK_PERM BIT(30)
++
++/* OP-TEE STM32MP BSEC TA UUID */
++static const uuid_t stm32mp_bsec_ta_uuid =
++ UUID_INIT(0x94cf71ad, 0x80e6, 0x40b5,
++ 0xa7, 0xc6, 0x3d, 0xc5, 0x01, 0xeb, 0x28, 0x03);
++
++/*
++ * Check whether this driver supports the BSEC TA in the TEE instance
++ * represented by the params (ver/data) to this function.
++ */
++static int stm32_bsec_optee_ta_match(struct tee_ioctl_version_data *ver,
++ const void *data)
++{
++ /* Currently this driver only supports GP compliant, OP-TEE based TA */
++ if ((ver->impl_id == TEE_IMPL_ID_OPTEE) &&
++ (ver->gen_caps & TEE_GEN_CAP_GP))
++ return 1;
++ else
++ return 0;
++}
++
++/* Open a session to OP-TEE for STM32MP BSEC TA */
++static int stm32_bsec_ta_open_session(struct tee_context *ctx, u32 *id)
++{
++ struct tee_ioctl_open_session_arg sess_arg;
++ int rc;
++
++ memset(&sess_arg, 0, sizeof(sess_arg));
++ export_uuid(sess_arg.uuid, &stm32mp_bsec_ta_uuid);
++ sess_arg.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL;
++ sess_arg.num_params = 0;
++
++ rc = tee_client_open_session(ctx, &sess_arg, NULL);
++ if ((rc < 0) || (sess_arg.ret != 0)) {
++ pr_err("%s: tee_client_open_session failed err:%#x, ret:%#x\n",
++ __func__, sess_arg.ret, rc);
++ if (!rc)
++ rc = -EINVAL;
++ } else {
++ *id = sess_arg.session;
++ }
++
++ return rc;
++}
++
++/* close a session to OP-TEE for STM32MP BSEC TA */
++static void stm32_bsec_ta_close_session(void *ctx, u32 id)
++{
++ tee_client_close_session(ctx, id);
++}
++
++/* stm32_bsec_optee_ta_open() - initialize the STM32MP BSEC TA */
++int stm32_bsec_optee_ta_open(struct tee_context **ctx)
++{
++ struct tee_context *tee_ctx;
++ u32 session_id;
++ int rc;
++
++ /* Open context with TEE driver */
++ tee_ctx = tee_client_open_context(NULL, stm32_bsec_optee_ta_match, NULL, NULL);
++ if (IS_ERR(tee_ctx)) {
++ rc = PTR_ERR(tee_ctx);
++ if (rc == -ENOENT)
++ return -EPROBE_DEFER;
++ pr_err("%s: tee_client_open_context failed (%d)\n", __func__, rc);
++
++ return rc;
++ }
++
++ /* Check STM32MP BSEC TA presence */
++ rc = stm32_bsec_ta_open_session(tee_ctx, &session_id);
++ if (rc) {
++ tee_client_close_context(tee_ctx);
++ return rc;
++ }
++
++ stm32_bsec_ta_close_session(tee_ctx, session_id);
++
++ *ctx = tee_ctx;
++
++ return 0;
++}
++
++/* stm32_bsec_optee_ta_open() - release the PTA STM32MP BSEC TA */
++void stm32_bsec_optee_ta_close(void *ctx)
++{
++ tee_client_close_context(ctx);
++}
++
++/* stm32_bsec_optee_ta_read() - nvmem read access using PTA client driver */
++int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
++ void *buf, size_t bytes)
++{
++ struct tee_shm *shm;
++ struct tee_ioctl_invoke_arg arg;
++ struct tee_param param[2];
++ u8 *shm_buf;
++ u32 start, num_bytes;
++ int ret;
++ u32 session_id;
++
++ ret = stm32_bsec_ta_open_session(ctx, &session_id);
++ if (ret)
++ return ret;
++
++ memset(&arg, 0, sizeof(arg));
++ memset(¶m, 0, sizeof(param));
++
++ arg.func = PTA_BSEC_READ_MEM;
++ arg.session = session_id;
++ arg.num_params = 2;
++
++ /* align access on 32bits */
++ start = ALIGN_DOWN(offset, 4);
++ num_bytes = round_up(offset + bytes - start, 4);
++ param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
++ param[0].u.value.a = start;
++ param[0].u.value.b = SHADOW_ACCESS;
++
++ shm = tee_shm_alloc_kernel_buf(ctx, num_bytes);
++ if (IS_ERR(shm)) {
++ ret = PTR_ERR(shm);
++ goto out_tee_session;
++ }
++
++ param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT;
++ param[1].u.memref.shm = shm;
++ param[1].u.memref.size = num_bytes;
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n",
++ arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ if (!ret) {
++ shm_buf = tee_shm_get_va(shm, 0);
++ if (IS_ERR(shm_buf)) {
++ ret = PTR_ERR(shm_buf);
++ pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
++ } else {
++ /* read data from 32 bits aligned buffer */
++ memcpy(buf, &shm_buf[offset % 4], bytes);
++ }
++ }
++
++ tee_shm_free(shm);
++
++out_tee_session:
++ stm32_bsec_ta_close_session(ctx, session_id);
++
++ return ret;
++}
++
++/* stm32_bsec_optee_ta_write() - nvmem write access using PTA client driver */
++int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
++ unsigned int offset, void *buf, size_t bytes)
++{ struct tee_shm *shm;
++ struct tee_ioctl_invoke_arg arg;
++ struct tee_param param[2];
++ u8 *shm_buf;
++ int ret;
++ u32 session_id;
++
++ ret = stm32_bsec_ta_open_session(ctx, &session_id);
++ if (ret)
++ return ret;
++
++ /* Allow only writing complete 32-bits aligned words */
++ if ((bytes % 4) || (offset % 4))
++ return -EINVAL;
++
++ memset(&arg, 0, sizeof(arg));
++ memset(¶m, 0, sizeof(param));
++
++ arg.func = PTA_BSEC_WRITE_MEM;
++ arg.session = session_id;
++ arg.num_params = 2;
++
++ param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
++ param[0].u.value.a = offset;
++ param[0].u.value.b = FUSE_ACCESS;
++
++ shm = tee_shm_alloc_kernel_buf(ctx, bytes);
++ if (IS_ERR(shm)) {
++ ret = PTR_ERR(shm);
++ goto out_tee_session;
++ }
++
++ param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT;
++ param[1].u.memref.shm = shm;
++ param[1].u.memref.size = bytes;
++
++ shm_buf = tee_shm_get_va(shm, 0);
++ if (IS_ERR(shm_buf)) {
++ ret = PTR_ERR(shm_buf);
++ pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
++ tee_shm_free(shm);
++
++ goto out_tee_session;
++ }
++
++ memcpy(shm_buf, buf, bytes);
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ pr_debug("Write OTPs %d to %zu, ret=%d\n", offset / 4, (offset + bytes) / 4, ret);
++
++ /* Lock the upper OTPs with ECC protection, word programming only */
++ if (!ret && ((offset + bytes) >= (lower * 4))) {
++ u32 start, nb_lock;
++ u32 *lock = (u32 *)shm_buf;
++ int i;
++
++ /*
++ * don't lock the lower OTPs, no ECC protection and incremental
++ * bit programming, a second write is allowed
++ */
++ start = max_t(u32, offset, lower * 4);
++ nb_lock = (offset + bytes - start) / 4;
++
++ param[0].u.value.a = start;
++ param[0].u.value.b = LOCK_ACCESS;
++ param[1].u.memref.size = nb_lock * 4;
++
++ for (i = 0; i < nb_lock; i++)
++ lock[i] = LOCK_PERM;
++
++ ret = tee_client_invoke_func(ctx, &arg, param);
++ if (ret < 0 || arg.ret != 0) {
++ pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
++ if (!ret)
++ ret = -EIO;
++ }
++ pr_debug("Lock upper OTPs %d to %d, ret=%d\n",
++ start / 4, start / 4 + nb_lock, ret);
++ }
++
++ tee_shm_free(shm);
++
++out_tee_session:
++ stm32_bsec_ta_close_session(ctx, session_id);
++
++ return ret;
++}
+--- /dev/null
++++ b/drivers/nvmem/stm32-bsec-optee-ta.h
+@@ -0,0 +1,80 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++/*
++ * OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
++ *
++ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
++ */
++
++#if IS_ENABLED(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA)
++/**
++ * stm32_bsec_optee_ta_open() - initialize the STM32 BSEC TA
++ * @ctx: the OP-TEE context on success
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_open(struct tee_context **ctx);
++
++/**
++ * stm32_bsec_optee_ta_close() - release the STM32 BSEC TA
++ * @ctx: the OP-TEE context
++ *
++ * This function used to clean the OP-TEE resources initialized in
++ * stm32_bsec_optee_ta_open(); it can be used as callback to
++ * devm_add_action_or_reset()
++ */
++void stm32_bsec_optee_ta_close(void *ctx);
++
++/**
++ * stm32_bsec_optee_ta_read() - nvmem read access using TA client driver
++ * @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
++ * @offset: nvmem offset
++ * @buf: buffer to fill with nvem values
++ * @bytes: number of bytes to read
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
++ void *buf, size_t bytes);
++
++/**
++ * stm32_bsec_optee_ta_write() - nvmem write access using TA client driver
++ * @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
++ * @lower: number of lower OTP, not protected by ECC
++ * @offset: nvmem offset
++ * @buf: buffer with nvem values
++ * @bytes: number of bytes to write
++ *
++ * Return:
++ * On success, 0. On failure, -errno.
++ */
++int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
++ unsigned int offset, void *buf, size_t bytes);
++
++#else
++
++static inline int stm32_bsec_optee_ta_open(struct tee_context **ctx)
++{
++ return -EOPNOTSUPP;
++}
++
++static inline void stm32_bsec_optee_ta_close(void *ctx)
++{
++}
++
++static inline int stm32_bsec_optee_ta_read(struct tee_context *ctx,
++ unsigned int offset, void *buf,
++ size_t bytes)
++{
++ return -EOPNOTSUPP;
++}
++
++static inline int stm32_bsec_optee_ta_write(struct tee_context *ctx,
++ unsigned int lower,
++ unsigned int offset, void *buf,
++ size_t bytes)
++{
++ return -EOPNOTSUPP;
++}
++#endif /* CONFIG_NVMEM_STM32_BSEC_OPTEE_TA */
+--- a/drivers/nvmem/stm32-romem.c
++++ b/drivers/nvmem/stm32-romem.c
+@@ -11,6 +11,9 @@
+ #include <linux/module.h>
+ #include <linux/nvmem-provider.h>
+ #include <linux/of_device.h>
++#include <linux/tee_drv.h>
++
++#include "stm32-bsec-optee-ta.h"
+
+ /* BSEC secure service access from non-secure */
+ #define STM32_SMC_BSEC 0x82001003
+@@ -25,12 +28,14 @@
+ struct stm32_romem_cfg {
+ int size;
+ u8 lower;
++ bool ta;
+ };
+
+ struct stm32_romem_priv {
+ void __iomem *base;
+ struct nvmem_config cfg;
+ u8 lower;
++ struct tee_context *ctx;
+ };
+
+ static int stm32_romem_read(void *context, unsigned int offset, void *buf,
+@@ -138,12 +143,29 @@ static int stm32_bsec_write(void *contex
+ return 0;
+ }
+
++static int stm32_bsec_pta_read(void *context, unsigned int offset, void *buf,
++ size_t bytes)
++{
++ struct stm32_romem_priv *priv = context;
++
++ return stm32_bsec_optee_ta_read(priv->ctx, offset, buf, bytes);
++}
++
++static int stm32_bsec_pta_write(void *context, unsigned int offset, void *buf,
++ size_t bytes)
++{
++ struct stm32_romem_priv *priv = context;
++
++ return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes);
++}
++
+ static int stm32_romem_probe(struct platform_device *pdev)
+ {
+ const struct stm32_romem_cfg *cfg;
+ struct device *dev = &pdev->dev;
+ struct stm32_romem_priv *priv;
+ struct resource *res;
++ int rc;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+@@ -173,15 +195,31 @@ static int stm32_romem_probe(struct plat
+ } else {
+ priv->cfg.size = cfg->size;
+ priv->lower = cfg->lower;
+- priv->cfg.reg_read = stm32_bsec_read;
+- priv->cfg.reg_write = stm32_bsec_write;
++ if (cfg->ta) {
++ rc = stm32_bsec_optee_ta_open(&priv->ctx);
++ /* wait for OP-TEE client driver to be up and ready */
++ if (rc)
++ return rc;
++ }
++ if (priv->ctx) {
++ rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx);
++ if (rc) {
++ dev_err(dev, "devm_add_action_or_reset() failed (%d)\n", rc);
++ return rc;
++ }
++ priv->cfg.reg_read = stm32_bsec_pta_read;
++ priv->cfg.reg_write = stm32_bsec_pta_write;
++ } else {
++ priv->cfg.reg_read = stm32_bsec_read;
++ priv->cfg.reg_write = stm32_bsec_write;
++ }
+ }
+
+ return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg));
+ }
+
+ /*
+- * STM32MP15 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
++ * STM32MP15/13 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
+ * => 96 x 32-bits data words
+ * - Lower: 1K bits, 2:1 redundancy, incremental bit programming
+ * => 32 (x 32-bits) lower shadow registers = words 0 to 31
+@@ -191,6 +229,13 @@ static int stm32_romem_probe(struct plat
+ static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
+ .size = 384,
+ .lower = 32,
++ .ta = false,
++};
++
++static const struct stm32_romem_cfg stm32mp13_bsec_cfg = {
++ .size = 384,
++ .lower = 32,
++ .ta = true,
+ };
+
+ static const struct of_device_id stm32_romem_of_match[] = {
+@@ -198,7 +243,10 @@ static const struct of_device_id stm32_r
+ .compatible = "st,stm32mp15-bsec",
+ .data = (void *)&stm32mp15_bsec_cfg,
+ }, {
++ .compatible = "st,stm32mp13-bsec",
++ .data = (void *)&stm32mp13_bsec_cfg,
+ },
++ { /* sentinel */ },
+ };
+ MODULE_DEVICE_TABLE(of, stm32_romem_of_match);
+
--- /dev/null
+From df2f34ef1d924125ffaf29dfdaf7cdbd3183c321 Mon Sep 17 00:00:00 2001
+From: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Date: Mon, 6 Feb 2023 13:43:52 +0000
+Subject: [PATCH] nvmem: stm32: detect bsec pta presence for STM32MP15x
+
+On STM32MP15x SoC, the SMC backend is optional when OP-TEE is used;
+the PTA BSEC should be used as it is done on STM32MP13x platform,
+but the BSEC SMC can be also used: it is a legacy mode in OP-TEE,
+not recommended but used in previous OP-TEE firmware.
+
+The presence of OP-TEE is dynamically detected in STM32MP15x device tree
+and the supported NVMEM backend is dynamically detected:
+- PTA with stm32_bsec_pta_find
+- SMC with stm32_bsec_check
+
+With OP-TEE but without PTA and SMC detection, the probe is deferred for
+STM32MP15x devices.
+
+On STM32MP13x platform, only the PTA is supported with cfg->ta = true
+and this detection is skipped.
+
+Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
+Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-19-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/stm32-romem.c | 38 +++++++++++++++++++++++++++++++++----
+ 1 file changed, 34 insertions(+), 4 deletions(-)
+
+--- a/drivers/nvmem/stm32-romem.c
++++ b/drivers/nvmem/stm32-romem.c
+@@ -159,6 +159,31 @@ static int stm32_bsec_pta_write(void *co
+ return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes);
+ }
+
++static bool stm32_bsec_smc_check(void)
++{
++ u32 val;
++ int ret;
++
++ /* check that the OP-TEE support the BSEC SMC (legacy mode) */
++ ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, 0, 0, &val);
++
++ return !ret;
++}
++
++static bool optee_presence_check(void)
++{
++ struct device_node *np;
++ bool tee_detected = false;
++
++ /* check that the OP-TEE node is present and available. */
++ np = of_find_compatible_node(NULL, NULL, "linaro,optee-tz");
++ if (np && of_device_is_available(np))
++ tee_detected = true;
++ of_node_put(np);
++
++ return tee_detected;
++}
++
+ static int stm32_romem_probe(struct platform_device *pdev)
+ {
+ const struct stm32_romem_cfg *cfg;
+@@ -195,11 +220,16 @@ static int stm32_romem_probe(struct plat
+ } else {
+ priv->cfg.size = cfg->size;
+ priv->lower = cfg->lower;
+- if (cfg->ta) {
++ if (cfg->ta || optee_presence_check()) {
+ rc = stm32_bsec_optee_ta_open(&priv->ctx);
+- /* wait for OP-TEE client driver to be up and ready */
+- if (rc)
+- return rc;
++ if (rc) {
++ /* wait for OP-TEE client driver to be up and ready */
++ if (rc == -EPROBE_DEFER)
++ return -EPROBE_DEFER;
++ /* BSEC PTA is required or SMC not supported */
++ if (cfg->ta || !stm32_bsec_smc_check())
++ return rc;
++ }
+ }
+ if (priv->ctx) {
+ rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx);
--- /dev/null
+From 3e5ac22aa564026e99defc3a8e02082521a5b231 Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Mon, 6 Feb 2023 13:43:53 +0000
+Subject: [PATCH] nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
+
+Convert an empty line to " *" to avoid a kernel-doc warning:
+
+drivers/nvmem/rave-sp-eeprom.c:48: warning: bad line:
+
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Cc: Andrey Vostrikov <andrey.vostrikov@cogentembedded.com>
+Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
+Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-20-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/rave-sp-eeprom.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/rave-sp-eeprom.c
++++ b/drivers/nvmem/rave-sp-eeprom.c
+@@ -45,7 +45,7 @@ enum rave_sp_eeprom_header_size {
+ * @type: Access type (see enum rave_sp_eeprom_access_type)
+ * @success: Success flag (Success = 1, Failure = 0)
+ * @data: Read data
+-
++ *
+ * Note this structure corresponds to RSP_*_EEPROM payload from RAVE
+ * SP ICD
+ */
--- /dev/null
+From eb7dda20f42a9137e9ee53d5ed3b743d49338cb5 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Mon, 6 Feb 2023 13:43:54 +0000
+Subject: [PATCH] nvmem: qcom-spmi-sdam: register at device init time
+
+There are currently no in-tree users of the Qualcomm SDAM nvmem driver
+and there is generally no point in registering a driver that can be
+built as a module at subsys init time.
+
+Register the driver at the normal device init time instead and let
+driver core sort out the probe order.
+
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-21-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/qcom-spmi-sdam.c | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+--- a/drivers/nvmem/qcom-spmi-sdam.c
++++ b/drivers/nvmem/qcom-spmi-sdam.c
+@@ -175,18 +175,7 @@ static struct platform_driver sdam_drive
+ },
+ .probe = sdam_probe,
+ };
+-
+-static int __init sdam_init(void)
+-{
+- return platform_driver_register(&sdam_driver);
+-}
+-subsys_initcall(sdam_init);
+-
+-static void __exit sdam_exit(void)
+-{
+- return platform_driver_unregister(&sdam_driver);
+-}
+-module_exit(sdam_exit);
++module_platform_driver(sdam_driver);
+
+ MODULE_DESCRIPTION("QCOM SPMI SDAM driver");
+ MODULE_LICENSE("GPL v2");
--- /dev/null
+From 1dc7e37bb0ec1c997fac82031332a38c7610352f Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Mon, 6 Feb 2023 13:43:56 +0000
+Subject: [PATCH] nvmem: stm32: fix OPTEE dependency
+
+The stm32 nvmem driver fails to link as built-in when OPTEE
+is a loadable module:
+
+aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec:
+stm32-bsec-optee-ta.c:(.text+0xc8): undefined reference to `tee_client_open_session'
+aarch64-linux-ld: drivers/nvmem/stm32-bsec-optee-ta.o: in function `stm32_bsec:
+stm32-bsec-optee-ta.c:(.text+0x1fc): undefined reference to `tee_client_open_context'
+
+Change the CONFIG_NVMEM_STM32_ROMEM definition so it can only
+be built-in if OPTEE is either built-in or disabled, and
+make NVMEM_STM32_BSEC_OPTEE_TA a hidden symbol instead.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Link: https://lore.kernel.org/r/20230206134356.839737-23-srinivas.kandagatla@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/nvmem/Kconfig | 5 ++---
+ 1 file changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/nvmem/Kconfig
++++ b/drivers/nvmem/Kconfig
+@@ -291,8 +291,7 @@ config NVMEM_SPRD_EFUSE
+ will be called nvmem-sprd-efuse.
+
+ config NVMEM_STM32_BSEC_OPTEE_TA
+- bool "STM32MP BSEC OP-TEE TA support for nvmem-stm32-romem driver"
+- depends on OPTEE
++ def_bool NVMEM_STM32_ROMEM && OPTEE
+ help
+ Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
+ trusted application STM32MP BSEC.
+@@ -303,7 +302,7 @@ config NVMEM_STM32_BSEC_OPTEE_TA
+ config NVMEM_STM32_ROMEM
+ tristate "STMicroelectronics STM32 factory-programmed memory support"
+ depends on ARCH_STM32 || COMPILE_TEST
+- imply NVMEM_STM32_BSEC_OPTEE_TA
++ depends on OPTEE || !OPTEE
+ help
+ Say y here to enable read-only access for STMicroelectronics STM32
+ factory-programmed memory area.
--- /dev/null
+From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Thu, 13 Oct 2022 00:51:33 +0900
+Subject: [PATCH] nvmem: u-boot-env: align endianness of crc32 values
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch fixes crc32 error on Big-Endianness system by conversion of
+calculated crc32 value.
+
+Little-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Little
+
+Big-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Big
+
+log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
+
+[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
+[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
+
+Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
+
+Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Tested-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ drivers/nvmem/u-boot-env.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/u-boot-env.c
++++ b/drivers/nvmem/u-boot-env.c
+@@ -156,7 +156,7 @@ static int u_boot_env_parse(struct u_boo
+ crc32_data_len = priv->mtd->size - crc32_data_offset;
+ data_len = priv->mtd->size - data_offset;
+
+- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
++ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
+ if (calc != crc32) {
+ dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
+ err = -EINVAL;
--- /dev/null
+From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
+From: INAGAKI Hiroshi <musashino.open@gmail.com>
+Date: Thu, 13 Oct 2022 00:51:33 +0900
+Subject: [PATCH] nvmem: u-boot-env: align endianness of crc32 values
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This patch fixes crc32 error on Big-Endianness system by conversion of
+calculated crc32 value.
+
+Little-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Little
+
+Big-Endianness system:
+
+ obtained crc32: Little
+calculated crc32: Big
+
+log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
+
+[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
+[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
+
+Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
+
+Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
+Acked-by: Rafał Miłecki <rafal@milecki.pl>
+Tested-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+---
+ drivers/nvmem/u-boot-env.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/nvmem/u-boot-env.c
++++ b/drivers/nvmem/u-boot-env.c
+@@ -156,7 +156,7 @@ static int u_boot_env_parse(struct u_boo
+ crc32_data_len = priv->mtd->size - crc32_data_offset;
+ data_len = priv->mtd->size - data_offset;
+
+- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
++ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
+ if (calc != crc32) {
+ dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
+ err = -EINVAL;
projects / openwrt / staging / thess.git / commitdiff