ASoC: meson: axg-frddr: add sm1 support
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 5 Sep 2019 12:01:18 +0000 (14:01 +0200)
committerMark Brown <broonie@kernel.org>
Thu, 5 Sep 2019 17:17:31 +0000 (18:17 +0100)
On sm1, the output routing bits have moved to CTRL2 register

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20190905120120.31752-7-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/meson/axg-fifo.c
sound/soc/meson/axg-fifo.h
sound/soc/meson/axg-frddr.c

index 80a3dde35b5c6c8665e9d255ce28713a07d51107..5a3749938900fa7f1bbb33169f8d8c8847524d52 100644 (file)
@@ -306,7 +306,7 @@ static const struct regmap_config axg_fifo_regmap_cfg = {
        .reg_bits       = 32,
        .val_bits       = 32,
        .reg_stride     = 4,
-       .max_register   = FIFO_INIT_ADDR,
+       .max_register   = FIFO_CTRL2,
 };
 
 int axg_fifo_probe(struct platform_device *pdev)
index 5caf81241dfee6df2c96b737f001a555851c87fa..bb1e2ce50256719de70d55f6fa716ba825a9424e 100644 (file)
@@ -61,6 +61,7 @@ struct snd_soc_pcm_runtime;
 #define  STATUS1_INT_STS(x)            ((x) << 0)
 #define FIFO_STATUS2                   0x18
 #define FIFO_INIT_ADDR                 0x24
+#define FIFO_CTRL2                     0x28
 
 struct axg_fifo {
        struct regmap *map;
index 0968e8375000d524d2896ff31b3a98f3dd3ab85b..6ab111c31b284419906710d490eda04cf6a2917a 100644 (file)
 #define CTRL0_SEL3_SHIFT               8
 #define CTRL0_SEL3_EN_SHIFT            11
 #define CTRL1_FRDDR_FORCE_FINISH       BIT(12)
+#define CTRL2_SEL1_SHIFT               0
+#define CTRL2_SEL1_EN_SHIFT            4
+#define CTRL2_SEL2_SHIFT               8
+#define CTRL2_SEL2_EN_SHIFT            12
+#define CTRL2_SEL3_SHIFT               16
+#define CTRL2_SEL3_EN_SHIFT            20
 
 static int g12a_frddr_dai_prepare(struct snd_pcm_substream *substream,
                                  struct snd_soc_dai *dai)
@@ -269,6 +275,70 @@ static const struct axg_fifo_match_data g12a_frddr_match_data = {
        .dai_drv        = &g12a_frddr_dai_drv
 };
 
+/* On SM1, the output selection in on CTRL2 */
+static const struct snd_kcontrol_new sm1_frddr_out1_enable =
+       SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL2,
+                                   CTRL2_SEL1_EN_SHIFT, 1, 0);
+static const struct snd_kcontrol_new sm1_frddr_out2_enable =
+       SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL2,
+                                   CTRL2_SEL2_EN_SHIFT, 1, 0);
+static const struct snd_kcontrol_new sm1_frddr_out3_enable =
+       SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL2,
+                                   CTRL2_SEL3_EN_SHIFT, 1, 0);
+
+static SOC_ENUM_SINGLE_DECL(sm1_frddr_sel1_enum, FIFO_CTRL2, CTRL2_SEL1_SHIFT,
+                           axg_frddr_sel_texts);
+static SOC_ENUM_SINGLE_DECL(sm1_frddr_sel2_enum, FIFO_CTRL2, CTRL2_SEL2_SHIFT,
+                           axg_frddr_sel_texts);
+static SOC_ENUM_SINGLE_DECL(sm1_frddr_sel3_enum, FIFO_CTRL2, CTRL2_SEL3_SHIFT,
+                           axg_frddr_sel_texts);
+
+static const struct snd_kcontrol_new sm1_frddr_out1_demux =
+       SOC_DAPM_ENUM("Output Src 1", sm1_frddr_sel1_enum);
+static const struct snd_kcontrol_new sm1_frddr_out2_demux =
+       SOC_DAPM_ENUM("Output Src 2", sm1_frddr_sel2_enum);
+static const struct snd_kcontrol_new sm1_frddr_out3_demux =
+       SOC_DAPM_ENUM("Output Src 3", sm1_frddr_sel3_enum);
+
+static const struct snd_soc_dapm_widget sm1_frddr_dapm_widgets[] = {
+       SND_SOC_DAPM_AIF_OUT("SRC 1", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("SRC 2", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("SRC 3", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_SWITCH("SRC 1 EN", SND_SOC_NOPM, 0, 0,
+                           &sm1_frddr_out1_enable),
+       SND_SOC_DAPM_SWITCH("SRC 2 EN", SND_SOC_NOPM, 0, 0,
+                           &sm1_frddr_out2_enable),
+       SND_SOC_DAPM_SWITCH("SRC 3 EN", SND_SOC_NOPM, 0, 0,
+                           &sm1_frddr_out3_enable),
+       SND_SOC_DAPM_DEMUX("SINK 1 SEL", SND_SOC_NOPM, 0, 0,
+                          &sm1_frddr_out1_demux),
+       SND_SOC_DAPM_DEMUX("SINK 2 SEL", SND_SOC_NOPM, 0, 0,
+                          &sm1_frddr_out2_demux),
+       SND_SOC_DAPM_DEMUX("SINK 3 SEL", SND_SOC_NOPM, 0, 0,
+                          &sm1_frddr_out3_demux),
+       SND_SOC_DAPM_AIF_OUT("OUT 0", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 1", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 2", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 3", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 4", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 5", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 6", NULL, 0, SND_SOC_NOPM, 0, 0),
+       SND_SOC_DAPM_AIF_OUT("OUT 7", NULL, 0, SND_SOC_NOPM, 0, 0),
+};
+
+static const struct snd_soc_component_driver sm1_frddr_component_drv = {
+       .dapm_widgets           = sm1_frddr_dapm_widgets,
+       .num_dapm_widgets       = ARRAY_SIZE(sm1_frddr_dapm_widgets),
+       .dapm_routes            = g12a_frddr_dapm_routes,
+       .num_dapm_routes        = ARRAY_SIZE(g12a_frddr_dapm_routes),
+       .ops                    = &g12a_fifo_pcm_ops
+};
+
+static const struct axg_fifo_match_data sm1_frddr_match_data = {
+       .component_drv  = &sm1_frddr_component_drv,
+       .dai_drv        = &g12a_frddr_dai_drv
+};
+
 static const struct of_device_id axg_frddr_of_match[] = {
        {
                .compatible = "amlogic,axg-frddr",
@@ -276,6 +346,9 @@ static const struct of_device_id axg_frddr_of_match[] = {
        }, {
                .compatible = "amlogic,g12a-frddr",
                .data = &g12a_frddr_match_data,
+       }, {
+               .compatible = "amlogic,sm1-frddr",
+               .data = &sm1_frddr_match_data,
        }, {}
 };
 MODULE_DEVICE_TABLE(of, axg_frddr_of_match);