crypto: qat - fix block size for aes ctr mode
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Mon, 29 Apr 2019 15:43:18 +0000 (16:43 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 23 May 2019 06:01:02 +0000 (14:01 +0800)
The block size for aes counter mode was improperly set to AES_BLOCK_SIZE.
This sets it to 1 as it is a stream cipher.

This problem was found with by the new extra run-time crypto self test.

Reviewed-by: Conor Mcloughlin <conor.mcloughlin@intel.com>
Tested-by: Sergey Portnoy <sergey.portnoy@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_common/qat_algs.c

index 6be3e7413beb04c838ee7a9712bed19551a9e6d5..5ca5cf9f6be5327a8d3436e7fcee104420c2d00a 100644 (file)
@@ -1273,7 +1273,7 @@ static struct crypto_alg qat_algs[] = { {
        .cra_driver_name = "qat_aes_ctr",
        .cra_priority = 4001,
        .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
-       .cra_blocksize = AES_BLOCK_SIZE,
+       .cra_blocksize = 1,
        .cra_ctxsize = sizeof(struct qat_alg_ablkcipher_ctx),
        .cra_alignmask = 0,
        .cra_type = &crypto_ablkcipher_type,