-LINUX_VERSION-6.6 = .63
-LINUX_KERNEL_HASH-6.6.63 = d1054ab4803413efe2850f50f1a84349c091631ec50a1cf9e891d1b1f9061835
+LINUX_VERSION-6.6 = .64
+LINUX_KERNEL_HASH-6.6.64 = 065fd93fa6cb422f650fb563f15d3e0107c85009f766405993d795fd39796ab1
static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
{
-@@ -1346,6 +1347,7 @@ static int spinand_probe(struct spi_mem
+@@ -1347,6 +1348,7 @@ static int spinand_probe(struct spi_mem
if (ret)
return ret;
ret = mtd_device_register(mtd, NULL, 0);
if (ret)
goto err_spinand_cleanup;
-@@ -1353,6 +1355,7 @@ static int spinand_probe(struct spi_mem
+@@ -1354,6 +1356,7 @@ static int spinand_probe(struct spi_mem
return 0;
err_spinand_cleanup:
spinand_cleanup(spinand);
return ret;
-@@ -1371,6 +1374,7 @@ static int spinand_remove(struct spi_mem
+@@ -1372,6 +1375,7 @@ static int spinand_remove(struct spi_mem
if (ret)
return ret;
struct vc4_hang_state *hang_state;
-@@ -963,6 +967,9 @@ extern struct platform_driver vc4_dsi_dr
+@@ -964,6 +968,9 @@ extern struct platform_driver vc4_dsi_dr
/* vc4_fence.c */
extern const struct dma_fence_ops vc4_fence_ops;
struct drm_device;
struct drm_gem_object;
-@@ -494,6 +495,17 @@ struct drm_encoder *vc4_find_encoder_by_
+@@ -495,6 +496,17 @@ struct drm_encoder *vc4_find_encoder_by_
return NULL;
}
struct vc4_crtc_data {
const char *name;
-@@ -538,9 +550,19 @@ struct vc4_crtc {
+@@ -539,9 +551,19 @@ struct vc4_crtc {
/* Timestamp at start of vblank irq - unaffected by lock delays. */
ktime_t t_vblank;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -243,7 +243,8 @@ static void vc4_hvs_lut_load(struct vc4_
+@@ -248,7 +248,8 @@ static void vc4_hvs_lut_load(struct vc4_
static void vc4_hvs_update_gamma_lut(struct vc4_hvs *hvs,
struct vc4_crtc *vc4_crtc)
{
struct drm_color_lut *lut = crtc_state->gamma_lut->data;
u32 length = drm_color_lut_size(crtc_state->gamma_lut);
u32 i;
-@@ -257,6 +258,81 @@ static void vc4_hvs_update_gamma_lut(str
+@@ -262,6 +263,81 @@ static void vc4_hvs_update_gamma_lut(str
vc4_hvs_lut_load(hvs, vc4_crtc);
}
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
{
struct drm_device *drm = &hvs->vc4->base;
-@@ -400,7 +476,10 @@ static int vc4_hvs_init_channel(struct v
+@@ -405,7 +481,10 @@ static int vc4_hvs_init_channel(struct v
/* Reload the LUT, since the SRAMs would have been disabled if
* all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
*/
drm_dev_exit(idx);
-@@ -646,7 +725,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -649,7 +728,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -143,6 +143,85 @@ static int vc4_hvs_debugfs_dlist(struct
+@@ -145,6 +145,85 @@ static int vc4_hvs_debugfs_dlist(struct
return 0;
}
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
-@@ -850,11 +929,15 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -854,11 +933,15 @@ int vc4_hvs_debugfs_init(struct drm_mino
if (!vc4->hvs)
return -ENODEV;
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -613,6 +613,9 @@ vc4_crtc_to_vc4_pv_data(const struct vc4
+@@ -614,6 +614,9 @@ vc4_crtc_to_vc4_pv_data(const struct vc4
return container_of_const(data, struct vc4_pv_data, base);
}
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -596,6 +596,36 @@ out:
+@@ -599,6 +599,36 @@ out:
drm_dev_exit(idx);
}
int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
-@@ -626,7 +656,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -629,7 +659,7 @@ int vc4_hvs_atomic_check(struct drm_crtc
if (ret)
return ret;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -548,8 +548,11 @@ static int vc4_hvs_init_channel(struct v
+@@ -553,8 +553,11 @@ static int vc4_hvs_init_channel(struct v
dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
(interlace ? SCALER_DISPBKGND_INTERLACE : 0));
/* Reload the LUT, since the SRAMs would have been disabled if
-@@ -834,18 +837,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -837,18 +840,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -614,6 +614,16 @@ static int vc4_hvs_gamma_check(struct dr
+@@ -617,6 +617,16 @@ static int vc4_hvs_gamma_check(struct dr
if (!crtc_state->color_mgmt_changed)
return 0;
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -408,7 +408,7 @@ struct vc4_plane_state {
+@@ -409,7 +409,7 @@ struct vc4_plane_state {
/* Clipped coordinates of the plane on the display. */
int crtc_x, crtc_y, crtc_w, crtc_h;
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -626,12 +626,7 @@ struct vc4_crtc_state {
+@@ -627,12 +627,7 @@ struct vc4_crtc_state {
bool txp_armed;
unsigned int assigned_channel;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -976,6 +976,9 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -980,6 +980,9 @@ int vc4_hvs_debugfs_init(struct drm_mino
struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_hvs *hvs = vc4->hvs;
static const char * const output_format_str[] = {
[VC4_HDMI_OUTPUT_RGB] = "RGB",
[VC4_HDMI_OUTPUT_YUV420] = "YUV 4:2:0",
-@@ -478,7 +484,9 @@ static int vc4_hdmi_connector_detect_ctx
+@@ -482,7 +488,9 @@ static int vc4_hdmi_connector_detect_ctx
return connector_status_unknown;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2400,7 +2400,7 @@ static int vc4_hdmi_audio_startup(struct
+@@ -2404,7 +2404,7 @@ static int vc4_hdmi_audio_startup(struct
}
if (!vc4_hdmi_audio_can_stream(vc4_hdmi)) {
}
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -332,6 +332,9 @@ struct vc4_hvs {
+@@ -333,6 +333,9 @@ struct vc4_hvs {
struct drm_mm lbm_mm;
spinlock_t mm_lock;
struct drm_mm_node mitchell_netravali_filter;
struct debugfs_regset32 regset;
-@@ -619,10 +622,16 @@ struct drm_connector *vc4_get_crtc_conne
+@@ -620,10 +623,16 @@ struct drm_connector *vc4_get_crtc_conne
struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc,
struct drm_crtc_state *state);
bool txp_armed;
unsigned int assigned_channel;
-@@ -1032,6 +1041,8 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1033,6 +1042,8 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output);
int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output);
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -412,6 +412,152 @@ static void vc5_hvs_update_gamma_lut(str
+@@ -417,6 +417,152 @@ static void vc5_hvs_update_gamma_lut(str
vc5_hvs_lut_load(hvs, vc4_crtc);
}
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
{
struct drm_device *drm = &hvs->vc4->base;
-@@ -643,13 +789,12 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -646,13 +792,12 @@ int vc4_hvs_atomic_check(struct drm_crtc
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
/* The pixelvalve can only feed one encoder (and encoders are
* 1:1 with connectors.)
-@@ -662,12 +807,11 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -665,12 +810,11 @@ int vc4_hvs_atomic_check(struct drm_crtc
dlist_count++; /* Account for SCALER_CTL0_END. */
return vc4_hvs_gamma_check(crtc, state);
}
-@@ -683,8 +827,9 @@ static void vc4_hvs_install_dlist(struct
+@@ -686,8 +830,9 @@ static void vc4_hvs_install_dlist(struct
if (!drm_dev_enter(dev, &idx))
return;
drm_dev_exit(idx);
}
-@@ -711,8 +856,10 @@ static void vc4_hvs_update_dlist(struct
+@@ -714,8 +859,10 @@ static void vc4_hvs_update_dlist(struct
spin_unlock_irqrestore(&dev->event_lock, flags);
}
spin_unlock_irqrestore(&vc4_crtc->irq_lock, flags);
}
-@@ -769,8 +916,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -772,8 +919,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
struct vc4_plane_state *vc4_plane_state;
bool debug_dump_regs = false;
bool enable_bg_fill = false;
unsigned int zpos = 0;
bool found = false;
int idx;
-@@ -788,6 +934,9 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -791,6 +937,9 @@ void vc4_hvs_atomic_flush(struct drm_crt
vc4_hvs_dump_state(hvs);
}
/* Copy all the active planes' dlist contents to the hardware dlist. */
do {
found = false;
-@@ -821,7 +970,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -824,7 +973,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
writel(SCALER_CTL0_END, dlist_next);
dlist_next++;
if (enable_bg_fill)
/* This sets a black background color fill, as is the case
-@@ -960,6 +1110,11 @@ static irqreturn_t vc4_hvs_irq_handler(i
+@@ -964,6 +1114,11 @@ static irqreturn_t vc4_hvs_irq_handler(i
irqret = IRQ_HANDLED;
}
}
/* Clear every per-channel interrupt flag. */
-@@ -1014,6 +1169,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1018,6 +1173,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
spin_lock_init(&hvs->mm_lock);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -452,6 +452,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -457,6 +457,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
if (!alloc)
return ERR_PTR(-ENOMEM);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -466,6 +466,18 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -471,6 +471,18 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
return alloc;
}
void vc4_hvs_mark_dlist_entry_stale(struct vc4_hvs *hvs,
struct vc4_hvs_dlist_allocation *alloc)
{
-@@ -553,9 +565,7 @@ static void vc4_hvs_dlist_free_work(stru
+@@ -558,9 +570,7 @@ static void vc4_hvs_dlist_free_work(stru
if (!vc4_hvs_frcnt_lte(cur->target_frame_count, frcnt))
continue;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -490,6 +490,18 @@ void vc4_hvs_mark_dlist_entry_stale(stru
+@@ -495,6 +495,18 @@ void vc4_hvs_mark_dlist_entry_stale(stru
if (!drm_mm_node_allocated(&alloc->mm_node))
return;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2132,7 +2132,7 @@ vc4_hdmi_encoder_compute_config(const st
+@@ -2136,7 +2136,7 @@ vc4_hdmi_encoder_compute_config(const st
{
struct drm_device *dev = vc4_hdmi->connector.dev;
struct drm_connector_state *conn_state = &vc4_state->base;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1363,6 +1363,17 @@ static int vc4_hvs_bind(struct device *d
+@@ -1368,6 +1368,17 @@ static int vc4_hvs_bind(struct device *d
dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1);
dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1958,9 +1958,6 @@ vc4_hdmi_sink_supports_format_bpc(const
+@@ -1962,9 +1962,6 @@ vc4_hdmi_sink_supports_format_bpc(const
case VC4_HDMI_OUTPUT_RGB:
drm_dbg(dev, "RGB Format, checking the constraints.\n");
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -762,7 +762,6 @@ static int vc4_hdmi_connector_init(struc
+@@ -766,7 +766,6 @@ static int vc4_hdmi_connector_init(struc
drm_connector_attach_colorspace_property(connector);
drm_connector_attach_tv_margin_properties(connector);
connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
DRM_CONNECTOR_POLL_DISCONNECT);
-@@ -771,8 +770,12 @@ static int vc4_hdmi_connector_init(struc
+@@ -775,8 +774,12 @@ static int vc4_hdmi_connector_init(struc
connector->doublescan_allowed = 0;
connector->stereo_allowed = 1;
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
-@@ -225,9 +225,9 @@ static void __init request_standard_reso
+@@ -229,9 +229,9 @@ static void __init request_standard_reso
size_t res_size;
kernel_code.start = __pa_symbol(_stext);
--- a/kernel/cgroup/cgroup.c
+++ b/kernel/cgroup/cgroup.c
-@@ -6060,6 +6060,9 @@ int __init cgroup_init_early(void)
+@@ -6063,6 +6063,9 @@ int __init cgroup_init_early(void)
return 0;
}
/**
* cgroup_init - cgroup initialization
*
-@@ -6093,6 +6096,12 @@ int __init cgroup_init(void)
+@@ -6096,6 +6099,12 @@ int __init cgroup_init(void)
cgroup_unlock();
for_each_subsys(ss, ssid) {
if (ss->early_init) {
struct cgroup_subsys_state *css =
-@@ -6733,6 +6742,10 @@ static int __init cgroup_disable(char *s
+@@ -6736,6 +6745,10 @@ static int __init cgroup_disable(char *s
strcmp(token, ss->legacy_name))
continue;
static_branch_disable(cgroup_subsys_enabled_key[i]);
pr_info("Disabling %s control group subsystem\n",
ss->name);
-@@ -6751,6 +6764,31 @@ static int __init cgroup_disable(char *s
+@@ -6754,6 +6767,31 @@ static int __init cgroup_disable(char *s
}
__setup("cgroup_disable=", cgroup_disable);
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -2883,6 +2883,11 @@ static int lan78xx_reset(struct lan78xx_
+@@ -2884,6 +2884,11 @@ static int lan78xx_reset(struct lan78xx_
int ret;
u32 buf;
u8 sig;
ret = lan78xx_read_reg(dev, HW_CFG, &buf);
if (ret < 0)
-@@ -2947,6 +2952,10 @@ static int lan78xx_reset(struct lan78xx_
+@@ -2948,6 +2953,10 @@ static int lan78xx_reset(struct lan78xx_
buf |= HW_CFG_MEF_;
ret = lan78xx_write_reg(dev, HW_CFG, buf);
if (ret < 0)
return ret;
-@@ -3046,6 +3055,9 @@ static int lan78xx_reset(struct lan78xx_
+@@ -3047,6 +3056,9 @@ static int lan78xx_reset(struct lan78xx_
buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
}
}
* For devices with more than one control interface, we assume the
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
-@@ -2197,6 +2197,8 @@ static const struct usb_audio_quirk_flag
+@@ -2212,6 +2212,8 @@ static const struct usb_audio_quirk_flag
QUIRK_FLAG_ALIGN_TRANSFER),
DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
QUIRK_FLAG_ALIGN_TRANSFER),
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -3111,6 +3111,22 @@ static int lan78xx_open(struct net_devic
+@@ -3112,6 +3112,22 @@ static int lan78xx_open(struct net_devic
netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
{
u32 *buf;
-@@ -3471,8 +3480,14 @@ static int lan78xx_bind(struct lan78xx_n
+@@ -3472,8 +3481,14 @@ static int lan78xx_bind(struct lan78xx_n
if (DEFAULT_RX_CSUM_ENABLE)
dev->net->features |= NETIF_F_RXCSUM;
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -2419,6 +2419,22 @@ static int lan78xx_phy_init(struct lan78
+@@ -2420,6 +2420,22 @@ static int lan78xx_phy_init(struct lan78
mii_adv_to_linkmode_adv_t(fc, mii_adv);
linkmode_or(phydev->advertising, fc, phydev->advertising);
if (phydev->mdio.dev.of_node) {
u32 reg;
int len;
-@@ -3120,22 +3136,6 @@ static int lan78xx_open(struct net_devic
+@@ -3121,22 +3137,6 @@ static int lan78xx_open(struct net_devic
netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
-@@ -773,6 +773,8 @@ static bool sc16is7xx_port_irq(struct sc
+@@ -777,6 +777,8 @@ static bool sc16is7xx_port_irq(struct sc
if (rxlen)
sc16is7xx_handle_rx(port, rxlen, iir);
static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
{
u32 *buf;
-@@ -4455,7 +4460,13 @@ static int lan78xx_probe(struct usb_inte
+@@ -4458,7 +4463,13 @@ static int lan78xx_probe(struct usb_inte
if (ret < 0)
goto out4;
+ netif_notice(dev, probe, netdev, "int urb period %d\n", period);
+
maxp = usb_maxpacket(dev->udev, dev->pipe_intr);
- buf = kmalloc(maxp, GFP_KERNEL);
- if (!buf) {
+
+ dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -2424,7 +2424,7 @@ static int lan78xx_phy_init(struct lan78
+@@ -2425,7 +2425,7 @@ static int lan78xx_phy_init(struct lan78
mii_adv_to_linkmode_adv_t(fc, mii_adv);
linkmode_or(phydev->advertising, fc, phydev->advertising);
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -3740,6 +3740,7 @@ static int spi_set_cs_timing(struct spi_
+@@ -3747,6 +3747,7 @@ static int spi_set_cs_timing(struct spi_
*/
int spi_setup(struct spi_device *spi)
{
unsigned bad_bits, ugly_bits;
int status = 0;
-@@ -3760,6 +3761,14 @@ int spi_setup(struct spi_device *spi)
+@@ -3767,6 +3768,14 @@ int spi_setup(struct spi_device *spi)
(SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
return -EINVAL;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2527,6 +2527,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -2531,6 +2531,7 @@ static int vc4_hdmi_audio_prepare(struct
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_device *drm = vc4_hdmi->connector.dev;
struct drm_encoder *encoder = &vc4_hdmi->encoder.base;
unsigned int sample_rate = params->sample_rate;
unsigned int channels = params->channels;
-@@ -2585,11 +2586,18 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -2589,11 +2590,18 @@ static int vc4_hdmi_audio_prepare(struct
VC4_HDMI_AUDIO_PACKET_CEA_MASK);
/* Set the MAI threshold */
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
-@@ -1206,6 +1206,9 @@ static int sc16is7xx_startup(struct uart
+@@ -1210,6 +1210,9 @@ static int sc16is7xx_startup(struct uart
SC16IS7XX_IER_MSI_BIT;
sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val);
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
-@@ -3671,6 +3671,48 @@ static int xhci_align_td(struct xhci_hcd
+@@ -3679,6 +3679,48 @@ static int xhci_align_td(struct xhci_hcd
return 1;
}
/* This is very similar to what ehci-q.c qtd_fill() does */
int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
struct urb *urb, int slot_id, unsigned int ep_index)
-@@ -3827,6 +3869,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3835,6 +3877,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
}
check_trb_math(urb, enqd_len);
giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
start_cycle, start_trb);
return 0;
-@@ -3962,6 +4006,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -3970,6 +4014,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
/* Event on completion */
field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -3595,6 +3595,7 @@ static int vc4_hdmi_runtime_suspend(stru
+@@ -3599,6 +3599,7 @@ static int vc4_hdmi_runtime_suspend(stru
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
clk_disable_unprepare(vc4_hdmi->hsm_clock);
return 0;
-@@ -3627,6 +3628,10 @@ static int vc4_hdmi_runtime_resume(struc
+@@ -3631,6 +3632,10 @@ static int vc4_hdmi_runtime_resume(struc
goto err_disable_clk;
}
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -826,11 +826,22 @@ int vc4_hvs_atomic_check(struct drm_crtc
+@@ -829,11 +829,22 @@ int vc4_hvs_atomic_check(struct drm_crtc
if (hweight32(crtc_state->connector_mask) > 1)
return -EINVAL;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -441,6 +441,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -446,6 +446,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
unsigned int channel,
size_t dlist_count)
{
struct vc4_hvs_dlist_allocation *alloc;
unsigned long flags;
int ret;
-@@ -458,8 +460,10 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -463,8 +465,10 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
ret = drm_mm_insert_node(&hvs->dlist_mm, &alloc->mm_node,
dlist_count);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
drivers/gpu/drm/vc4/vc4_drv.h | 7 ++-
drivers/gpu/drm/vc4/vc4_gem.c | 24 +++++------
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
- drivers/gpu/drm/vc4/vc4_hvs.c | 50 ++++++++++++----------
+ drivers/gpu/drm/vc4/vc4_hvs.c | 52 ++++++++++++----------
drivers/gpu/drm/vc4/vc4_irq.c | 10 ++---
drivers/gpu/drm/vc4/vc4_kms.c | 14 +++---
drivers/gpu/drm/vc4/vc4_perfmon.c | 20 ++++-----
drivers/gpu/drm/vc4/vc4_v3d.c | 10 ++---
drivers/gpu/drm/vc4/vc4_validate.c | 8 ++--
drivers/gpu/drm/vc4/vc4_validate_shaders.c | 2 +-
- 16 files changed, 126 insertions(+), 111 deletions(-)
+ 16 files changed, 127 insertions(+), 112 deletions(-)
--- a/drivers/gpu/drm/vc4/tests/vc4_mock.c
+++ b/drivers/gpu/drm/vc4/tests/vc4_mock.c
switch (args->madv) {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2586,7 +2586,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -2590,7 +2590,7 @@ static int vc4_hdmi_audio_prepare(struct
VC4_HDMI_AUDIO_PACKET_CEA_MASK);
/* Set the MAI threshold */
VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -416,7 +416,7 @@ static void vc4_hvs_irq_enable_eof(const
+@@ -303,7 +303,7 @@ static void vc4_hvs_lut_load(struct vc4_
+ if (!drm_dev_enter(drm, &idx))
+ return;
+
+- if (hvs->vc4->is_vc5)
++ if (hvs->vc4->gen == VC4_GEN_5)
+ return;
+
+ /* The LUT memory is laid out with each HVS channel in order,
+@@ -421,7 +421,7 @@ static void vc4_hvs_irq_enable_eof(const
unsigned int channel)
{
struct vc4_dev *vc4 = hvs->vc4;
SCALER5_DISPCTRL_DSPEIEOF(channel) :
SCALER_DISPCTRL_DSPEIEOF(channel);
-@@ -428,7 +428,7 @@ static void vc4_hvs_irq_clear_eof(const
+@@ -433,7 +433,7 @@ static void vc4_hvs_irq_clear_eof(const
unsigned int channel)
{
struct vc4_dev *vc4 = hvs->vc4;
SCALER5_DISPCTRL_DSPEIEOF(channel) :
SCALER_DISPCTRL_DSPEIEOF(channel);
-@@ -620,7 +620,7 @@ int vc4_hvs_get_fifo_from_output(struct
+@@ -625,7 +625,7 @@ int vc4_hvs_get_fifo_from_output(struct
u32 reg;
int ret;
return output;
/*
-@@ -701,7 +701,7 @@ static int vc4_hvs_init_channel(struct v
+@@ -706,7 +706,7 @@ static int vc4_hvs_init_channel(struct v
dispctrl = SCALER_DISPCTRLX_ENABLE;
dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
dispctrl |= VC4_SET_FIELD(mode->hdisplay,
SCALER_DISPCTRLX_WIDTH) |
VC4_SET_FIELD(mode->vdisplay,
-@@ -732,7 +732,7 @@ static int vc4_hvs_init_channel(struct v
+@@ -737,7 +737,7 @@ static int vc4_hvs_init_channel(struct v
/* Reload the LUT, since the SRAMs would have been disabled if
* all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
*/
vc4_hvs_lut_load(hvs, vc4_crtc);
else
vc5_hvs_lut_load(hvs, vc4_crtc);
-@@ -782,7 +782,7 @@ static int vc4_hvs_gamma_check(struct dr
+@@ -785,7 +785,7 @@ static int vc4_hvs_gamma_check(struct dr
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev);
return 0;
if (!crtc_state->color_mgmt_changed)
-@@ -1036,7 +1036,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1039,7 +1039,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
dispbkgndx |= SCALER_DISPBKGND_GAMMA;
} else {
-@@ -1053,7 +1053,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1056,7 +1056,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
* should already be disabling/enabling the pipeline
* when gamma changes.
*/
dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
}
HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx);
-@@ -1069,7 +1069,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1073,7 +1073,8 @@ exit:
void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel)
{
u32 dispctrl;
int idx;
-@@ -1077,8 +1078,9 @@ void vc4_hvs_mask_underrun(struct vc4_hv
+@@ -1081,8 +1082,9 @@ void vc4_hvs_mask_underrun(struct vc4_hv
return;
dispctrl = HVS_READ(SCALER_DISPCTRL);
HVS_WRITE(SCALER_DISPCTRL, dispctrl);
-@@ -1087,7 +1089,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
+@@ -1091,7 +1093,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel)
{
u32 dispctrl;
int idx;
-@@ -1095,8 +1098,9 @@ void vc4_hvs_unmask_underrun(struct vc4_
+@@ -1099,8 +1102,9 @@ void vc4_hvs_unmask_underrun(struct vc4_
return;
dispctrl = HVS_READ(SCALER_DISPCTRL);
HVS_WRITE(SCALER_DISPSTAT,
SCALER_DISPSTAT_EUFLOW(channel));
-@@ -1139,8 +1143,10 @@ static irqreturn_t vc4_hvs_irq_handler(i
+@@ -1143,8 +1147,10 @@ static irqreturn_t vc4_hvs_irq_handler(i
control = HVS_READ(SCALER_DISPCTRL);
for (channel = 0; channel < SCALER_CHANNELS_COUNT; channel++) {
/* Interrupt masking is not always honored, so check it here. */
if (status & SCALER_DISPSTAT_EUFLOW(channel) &&
control & dspeislur) {
-@@ -1176,7 +1182,7 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -1180,7 +1186,7 @@ int vc4_hvs_debugfs_init(struct drm_mino
if (!vc4->hvs)
return -ENODEV;
debugfs_create_bool("hvs_load_tracker", S_IRUGO | S_IWUSR,
minor->debugfs_root,
&vc4->load_tracker_enabled);
-@@ -1225,7 +1231,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1230,7 +1236,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
* between planes when they don't overlap on the screen, but
* for now we just allocate globally.
*/
/* 48k words of 2x12-bit pixels */
drm_mm_init(&hvs->lbm_mm, 0, 48 * 1024);
else
-@@ -1259,7 +1265,7 @@ static int vc4_hvs_bind(struct device *d
+@@ -1264,7 +1270,7 @@ static int vc4_hvs_bind(struct device *d
hvs->regset.regs = hvs_regs;
hvs->regset.nregs = ARRAY_SIZE(hvs_regs);
struct rpi_firmware *firmware;
struct device_node *node;
unsigned int max_rate;
-@@ -1297,7 +1303,7 @@ static int vc4_hvs_bind(struct device *d
+@@ -1302,7 +1308,7 @@ static int vc4_hvs_bind(struct device *d
}
}
hvs->dlist = hvs->regs + SCALER_DLIST_START;
else
hvs->dlist = hvs->regs + SCALER5_DLIST_START;
-@@ -1338,7 +1344,7 @@ static int vc4_hvs_bind(struct device *d
+@@ -1343,7 +1349,7 @@ static int vc4_hvs_bind(struct device *d
SCALER_DISPCTRL_DISPEIRQ(1) |
SCALER_DISPCTRL_DISPEIRQ(2);
dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ |
SCALER_DISPCTRL_SLVWREIRQ |
SCALER_DISPCTRL_SLVRDEIRQ |
-@@ -1393,7 +1399,7 @@ static int vc4_hvs_bind(struct device *d
+@@ -1398,7 +1404,7 @@ static int vc4_hvs_bind(struct device *d
/* Recompute Composite Output Buffer (COB) allocations for the displays
*/
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -620,57 +620,63 @@ int vc4_hvs_get_fifo_from_output(struct
+@@ -625,57 +625,63 @@ int vc4_hvs_get_fifo_from_output(struct
u32 reg;
int ret;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -416,24 +416,46 @@ static void vc4_hvs_irq_enable_eof(const
+@@ -421,24 +421,46 @@ static void vc4_hvs_irq_enable_eof(const
unsigned int channel)
{
struct vc4_dev *vc4 = hvs->vc4;
struct vc4_hvs {
struct vc4_dev *vc4;
struct platform_device *pdev;
-@@ -327,6 +329,10 @@ struct vc4_hvs {
+@@ -328,6 +330,10 @@ struct vc4_hvs {
struct clk *core_clk;
unsigned long max_core_rate;
/* Memory manager for CRTCs to allocate space in the display
-@@ -359,8 +365,6 @@ struct vc4_hvs {
+@@ -360,8 +366,6 @@ struct vc4_hvs {
bool vc5_hdmi_enable_4096by2160;
};
unsigned long core_clock_rate;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -412,11 +412,14 @@ static void vc5_hvs_update_gamma_lut(str
+@@ -417,11 +417,14 @@ static void vc5_hvs_update_gamma_lut(str
vc5_hvs_lut_load(hvs, vc4_crtc);
}
switch (vc4->gen) {
case VC4_GEN_4:
HVS_WRITE(SCALER_DISPCTRL,
-@@ -433,13 +436,18 @@ static void vc4_hvs_irq_enable_eof(const
+@@ -438,13 +441,18 @@ static void vc4_hvs_irq_enable_eof(const
default:
break;
}
switch (vc4->gen) {
case VC4_GEN_4:
HVS_WRITE(SCALER_DISPCTRL,
-@@ -456,6 +464,8 @@ static void vc4_hvs_irq_clear_eof(const
+@@ -461,6 +469,8 @@ static void vc4_hvs_irq_clear_eof(const
default:
break;
}
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1281,79 +1281,10 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1286,79 +1286,10 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
return hvs;
}
reg = HVS_READ(SCALER_DISPECTRL);
reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK;
-@@ -1435,6 +1366,86 @@ static int vc4_hvs_bind(struct device *d
+@@ -1440,6 +1371,86 @@ static int vc4_hvs_bind(struct device *d
HVS_WRITE(SCALER_DISPCTRL, dispctrl);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1369,6 +1369,77 @@ static int vc4_hvs_hw_init(struct vc4_hv
+@@ -1374,6 +1374,77 @@ static int vc4_hvs_hw_init(struct vc4_hv
return 0;
}
static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
-@@ -1376,7 +1447,6 @@ static int vc4_hvs_bind(struct device *d
+@@ -1381,7 +1452,6 @@ static int vc4_hvs_bind(struct device *d
struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_hvs *hvs = NULL;
int ret;
hvs = __vc4_hvs_alloc(vc4, NULL);
if (IS_ERR(hvs))
-@@ -1446,59 +1516,9 @@ static int vc4_hvs_bind(struct device *d
+@@ -1451,59 +1521,9 @@ static int vc4_hvs_bind(struct device *d
if (ret)
return ret;
VC4_REG32(SCALER_DISPCTRL),
VC4_REG32(SCALER_DISPSTAT),
VC4_REG32(SCALER_DISPID),
-@@ -1457,8 +1457,8 @@ static int vc4_hvs_bind(struct device *d
+@@ -1462,8 +1462,8 @@ static int vc4_hvs_bind(struct device *d
return PTR_ERR(hvs->regs);
hvs->regset.base = hvs->regs;
#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_managed.h>
#include <drm/drm_mm.h>
-@@ -410,7 +411,7 @@ struct vc4_plane_state {
+@@ -411,7 +412,7 @@ struct vc4_plane_state {
*/
u32 pos0_offset;
u32 pos2_offset;
drm = &vc4->base;
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -1047,7 +1047,9 @@ void vc4_irq_reset(struct drm_device *de
+@@ -1048,7 +1048,9 @@ void vc4_irq_reset(struct drm_device *de
/* vc4_hvs.c */
extern struct platform_driver vc4_hvs_driver;
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1238,7 +1238,9 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -1242,7 +1242,9 @@ int vc4_hvs_debugfs_init(struct drm_mino
return 0;
}
{
struct drm_device *drm = &vc4->base;
struct vc4_hvs *hvs;
-@@ -1248,6 +1250,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1252,6 +1254,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
return ERR_PTR(-ENOMEM);
hvs->vc4 = vc4;
hvs->pdev = pdev;
spin_lock_init(&hvs->mm_lock);
-@@ -1446,16 +1449,17 @@ static int vc4_hvs_bind(struct device *d
+@@ -1451,16 +1454,17 @@ static int vc4_hvs_bind(struct device *d
struct drm_device *drm = dev_get_drvdata(master);
struct vc4_dev *vc4 = to_vc4_dev(drm);
struct vc4_hvs *hvs = NULL;
+++ /dev/null
-From db41506f785ad84895a31b01e8bd7c07bceabb3d Mon Sep 17 00:00:00 2001
-From: Dom Cobley <popcornmix@gmail.com>
-Date: Tue, 5 Sep 2023 19:38:24 +0100
-Subject: [PATCH 0597/1085] drm/vc4: hdmi: Avoid hang with debug registers when
- suspended
-
-Trying to read /sys/kernel/debug/dri/1/hdmi1_regs
-when the hdmi is disconnected results in a fatal system hang.
-
-This is due to the pm suspend code disabling the dvp clock.
-That is just a gate of the 108MHz clock in DVP_HT_RPI_MISC_CONFIG,
-which results in accesses hanging AXI bus.
-
-Protect against this.
-
-Signed-off-by: Dom Cobley <popcornmix@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -185,6 +185,8 @@ static int vc4_hdmi_debugfs_regs(struct
- if (!drm_dev_enter(drm, &idx))
- return -ENODEV;
-
-+ WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
-+
- drm_print_regset32(&p, &vc4_hdmi->hdmi_regset);
- drm_print_regset32(&p, &vc4_hdmi->hd_regset);
- drm_print_regset32(&p, &vc4_hdmi->cec_regset);
-@@ -194,6 +196,8 @@ static int vc4_hdmi_debugfs_regs(struct
- drm_print_regset32(&p, &vc4_hdmi->ram_regset);
- drm_print_regset32(&p, &vc4_hdmi->rm_regset);
-
-+ pm_runtime_put(&vc4_hdmi->pdev->dev);
-+
- drm_dev_exit(idx);
-
- return 0;
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -431,11 +431,6 @@ struct vc4_plane_state {
+@@ -432,11 +432,6 @@ struct vc4_plane_state {
bool is_unity;
bool is_yuv;
+++ /dev/null
-From d64998e5fc5894eb37f142b7259fa3bec091abbc Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 24 Aug 2023 15:36:21 +0100
-Subject: [PATCH 0599/1085] drm/vc4: Fix dlist debug not resetting the next
- entry pointer
-
-The debug function to display the dlists didn't reset next_entry_start
-when starting each display, so resulting in not stopping the
-list at the correct place.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_hvs.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -110,7 +110,7 @@ static int vc4_hvs_debugfs_dlist(struct
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct vc4_hvs *hvs = vc4->hvs;
- struct drm_printer p = drm_seq_file_printer(m);
-- unsigned int next_entry_start = 0;
-+ unsigned int next_entry_start;
- unsigned int i, j;
- u32 dlist_word, dispstat;
-
-@@ -124,6 +124,7 @@ static int vc4_hvs_debugfs_dlist(struct
- }
-
- drm_printf(&p, "HVS chan %u:\n", i);
-+ next_entry_start = 0;
-
- for (j = HVS_READ(SCALER_DISPLISTX(i)); j < 256; j++) {
- dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j);
+++ /dev/null
-From 480184600be75fd78dcff1502092901d32530cc6 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Fri, 1 Sep 2023 13:45:08 +0100
-Subject: [PATCH 0600/1085] drm: vc4: Remove incorrect limit from hvs_dlist
- debugfs function
-
-The debugfs function to dump dlists aborted at 256 bytes,
-when actually the dlist memory is generally significantly
-larger but varies based on SoC.
-
-We already have the correct limit in __vc4_hvs_alloc, so
-store it for use in the debugfs dlist function.
-
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_drv.h | 1 +
- drivers/gpu/drm/vc4/vc4_hvs.c | 5 ++++-
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -327,6 +327,7 @@ struct vc4_hvs {
- struct platform_device *pdev;
- void __iomem *regs;
- u32 __iomem *dlist;
-+ unsigned int dlist_mem_size;
-
- struct clk *core_clk;
-
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -110,6 +110,7 @@ static int vc4_hvs_debugfs_dlist(struct
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct vc4_hvs *hvs = vc4->hvs;
- struct drm_printer p = drm_seq_file_printer(m);
-+ unsigned int dlist_mem_size = hvs->dlist_mem_size;
- unsigned int next_entry_start;
- unsigned int i, j;
- u32 dlist_word, dispstat;
-@@ -126,7 +127,7 @@ static int vc4_hvs_debugfs_dlist(struct
- drm_printf(&p, "HVS chan %u:\n", i);
- next_entry_start = 0;
-
-- for (j = HVS_READ(SCALER_DISPLISTX(i)); j < 256; j++) {
-+ for (j = HVS_READ(SCALER_DISPLISTX(i)); j < dlist_mem_size; j++) {
- dlist_word = readl((u32 __iomem *)vc4->hvs->dlist + j);
- drm_printf(&p, "dlist: %02d: 0x%08x\n", j,
- dlist_word);
-@@ -1268,6 +1269,8 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
- HVS_BOOTLOADER_DLIST_END,
- (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
-
-+ hvs->dlist_mem_size = dlist_size;
-+
- /* Set up the HVS LBM memory manager. We could have some more
- * complicated data structure that allowed reuse of LBM areas
- * between planes when they don't overlap on the screen, but
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1293,6 +1293,10 @@ static int vc4_hvs_hw_init(struct vc4_hv
+@@ -1294,6 +1294,10 @@ static int vc4_hvs_hw_init(struct vc4_hv
struct vc4_dev *vc4 = hvs->vc4;
u32 dispctrl, reg;
reg = HVS_READ(SCALER_DISPECTRL);
reg &= ~SCALER_DISPECTRL_DSP2_MUX_MASK;
HVS_WRITE(SCALER_DISPECTRL,
-@@ -1314,8 +1318,6 @@ static int vc4_hvs_hw_init(struct vc4_hv
+@@ -1315,8 +1319,6 @@ static int vc4_hvs_hw_init(struct vc4_hv
reg | VC4_SET_FIELD(3, SCALER_DISPDITHER_DSP5_MUX));
dispctrl = HVS_READ(SCALER_DISPCTRL);
dispctrl |= SCALER_DISPCTRL_DISPEIRQ(0) |
SCALER_DISPCTRL_DISPEIRQ(1) |
SCALER_DISPCTRL_DISPEIRQ(2);
-@@ -1511,6 +1513,10 @@ static int vc4_hvs_bind(struct device *d
+@@ -1512,6 +1514,10 @@ static int vc4_hvs_bind(struct device *d
else
hvs->dlist = hvs->regs + SCALER5_DLIST_START;
/* Upload filter kernels. We only have the one for now, so we
* keep it around for the lifetime of the driver.
*/
-@@ -1520,10 +1526,6 @@ static int vc4_hvs_bind(struct device *d
+@@ -1521,10 +1527,6 @@ static int vc4_hvs_bind(struct device *d
if (ret)
return ret;
static int vc5_hvs_debugfs_gamma(struct seq_file *m, void *data)
{
struct drm_info_node *node = m->private;
-@@ -435,6 +558,10 @@ static void vc4_hvs_irq_enable_eof(struc
+@@ -438,6 +561,10 @@ static void vc4_hvs_irq_enable_eof(struc
SCALER5_DISPCTRL_DSPEIEOF(channel));
break;
default:
break;
}
-@@ -463,6 +590,10 @@ static void vc4_hvs_irq_clear_eof(struct
+@@ -466,6 +593,10 @@ static void vc4_hvs_irq_clear_eof(struct
~SCALER5_DISPCTRL_DSPEIEOF(channel));
break;
default:
break;
}
-@@ -622,26 +753,32 @@ static void vc4_hvs_dlist_free_work(stru
+@@ -625,26 +756,32 @@ static void vc4_hvs_dlist_free_work(stru
u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
{
}
drm_dev_exit(idx);
-@@ -708,6 +845,23 @@ int vc4_hvs_get_fifo_from_output(struct
+@@ -711,6 +848,23 @@ int vc4_hvs_get_fifo_from_output(struct
default:
return -EPIPE;
}
}
return -EPIPE;
-@@ -782,7 +936,41 @@ static int vc4_hvs_init_channel(struct v
+@@ -785,7 +939,41 @@ static int vc4_hvs_init_channel(struct v
return 0;
}
{
struct drm_device *drm = &hvs->vc4->base;
int idx;
-@@ -813,6 +1001,42 @@ out:
+@@ -814,6 +1002,42 @@ out:
drm_dev_exit(idx);
}
static int vc4_hvs_gamma_check(struct drm_crtc *crtc,
struct drm_atomic_state *state)
{
-@@ -907,8 +1131,14 @@ static void vc4_hvs_install_dlist(struct
+@@ -908,8 +1132,14 @@ static void vc4_hvs_install_dlist(struct
return;
WARN_ON(!vc4_state->mm);
drm_dev_exit(idx);
}
-@@ -965,7 +1195,11 @@ void vc4_hvs_atomic_enable(struct drm_cr
+@@ -966,7 +1196,11 @@ void vc4_hvs_atomic_enable(struct drm_cr
vc4_hvs_install_dlist(crtc);
vc4_hvs_update_dlist(crtc);
}
void vc4_hvs_atomic_disable(struct drm_crtc *crtc,
-@@ -1052,13 +1286,28 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1053,13 +1287,28 @@ void vc4_hvs_atomic_flush(struct drm_crt
WARN_ON(!vc4_state->mm);
WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm->mm_node.size);
/* Only update DISPLIST if the CRTC was already running and is not
* being disabled.
-@@ -1210,6 +1459,27 @@ static irqreturn_t vc4_hvs_irq_handler(i
+@@ -1212,6 +1461,27 @@ static irqreturn_t vc4_hvs_irq_handler(i
return irqret;
}
int vc4_hvs_debugfs_init(struct drm_minor *minor)
{
struct drm_device *drm = minor->dev;
-@@ -1231,7 +1501,10 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -1233,7 +1503,10 @@ int vc4_hvs_debugfs_init(struct drm_mino
NULL);
}
drm_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun, NULL);
-@@ -1246,6 +1519,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1248,6 +1521,9 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
{
struct drm_device *drm = &vc4->base;
struct vc4_hvs *hvs;
hvs = drmm_kzalloc(drm, sizeof(*hvs), GFP_KERNEL);
if (!hvs)
-@@ -1260,14 +1536,39 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1262,27 +1538,87 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
INIT_LIST_HEAD(&hvs->stale_dlist_entries);
INIT_WORK(&hvs->free_dlist_work, vc4_hvs_dlist_free_work);
- * our 16K), since we don't want to scramble the screen when
- * transitioning from the firmware's boot setup to runtime.
- */
+- hvs->dlist_mem_size = (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END;
- drm_mm_init(&hvs->dlist_mm,
- HVS_BOOTLOADER_DLIST_END,
-- (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
+- hvs->dlist_mem_size);
+ switch (vc4->gen) {
+ case VC4_GEN_4:
+ case VC4_GEN_5:
+ }
+
+ drm_mm_init(&hvs->dlist_mm, dlist_start, dlist_size);
++
++ hvs->dlist_mem_size = dlist_size;
- hvs->dlist_mem_size = dlist_size;
-
-@@ -1276,12 +1577,46 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+ /* Set up the HVS LBM memory manager. We could have some more
+ * complicated data structure that allowed reuse of LBM areas
* between planes when they don't overlap on the screen, but
* for now we just allocate globally.
*/
vc4->hvs = hvs;
-@@ -1378,10 +1713,124 @@ static int vc4_hvs_hw_init(struct vc4_hv
+@@ -1379,10 +1715,124 @@ static int vc4_hvs_hw_init(struct vc4_hv
return 0;
}
/*
* Recompute Composite Output Buffer (COB) allocations for the
-@@ -1442,6 +1891,31 @@ static int vc4_hvs_cob_init(struct vc4_h
+@@ -1443,6 +1893,31 @@ static int vc4_hvs_cob_init(struct vc4_h
HVS_WRITE(SCALER_DISPBASE0, reg);
break;
default:
return -EINVAL;
}
-@@ -1467,10 +1941,16 @@ static int vc4_hvs_bind(struct device *d
+@@ -1468,10 +1943,16 @@ static int vc4_hvs_bind(struct device *d
return PTR_ERR(hvs);
hvs->regset.base = hvs->regs;
struct rpi_firmware *firmware;
struct device_node *node;
unsigned int max_rate;
-@@ -1484,12 +1964,20 @@ static int vc4_hvs_bind(struct device *d
+@@ -1485,12 +1966,20 @@ static int vc4_hvs_bind(struct device *d
if (!firmware)
return -EPROBE_DEFER;
max_rate = rpi_firmware_clk_get_max_rate(firmware,
RPI_FIRMWARE_CORE_CLK_ID);
rpi_firmware_put(firmware);
-@@ -1506,14 +1994,51 @@ static int vc4_hvs_bind(struct device *d
+@@ -1507,14 +1996,51 @@ static int vc4_hvs_bind(struct device *d
dev_err(&pdev->dev, "Couldn't enable the core clock\n");
return ret;
}
if (ret)
return ret;
-@@ -1530,10 +2055,12 @@ static int vc4_hvs_bind(struct device *d
+@@ -1531,10 +2057,12 @@ static int vc4_hvs_bind(struct device *d
if (ret)
return ret;
return 0;
}
-@@ -1558,6 +2085,7 @@ static void vc4_hvs_unbind(struct device
+@@ -1559,6 +2087,7 @@ static void vc4_hvs_unbind(struct device
drm_mm_remove_node(node);
drm_mm_takedown(&vc4->hvs->lbm_mm);
clk_disable_unprepare(hvs->core_clk);
vc4->hvs = NULL;
-@@ -1580,6 +2108,7 @@ static void vc4_hvs_dev_remove(struct pl
+@@ -1581,6 +2110,7 @@ static void vc4_hvs_dev_remove(struct pl
static const struct of_device_id vc4_hvs_dt_match[] = {
{ .compatible = "brcm,bcm2711-hvs" },
if (!drm_dev_enter(drm, &idx))
return;
-@@ -758,6 +761,8 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
+@@ -761,6 +764,8 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
u8 field = 0;
int idx;
if (!drm_dev_enter(drm, &idx))
return 0;
-@@ -791,6 +796,8 @@ int vc4_hvs_get_fifo_from_output(struct
+@@ -794,6 +799,8 @@ int vc4_hvs_get_fifo_from_output(struct
u32 reg;
int ret;
switch (vc4->gen) {
case VC4_GEN_4:
return output;
-@@ -880,6 +887,8 @@ static int vc4_hvs_init_channel(struct v
+@@ -883,6 +890,8 @@ static int vc4_hvs_init_channel(struct v
u32 dispctrl;
int idx;
if (!drm_dev_enter(drm, &idx))
return -ENODEV;
-@@ -947,6 +956,8 @@ static int vc6_hvs_init_channel(struct v
+@@ -950,6 +959,8 @@ static int vc6_hvs_init_channel(struct v
u32 disp_ctrl1;
int idx;
if (!drm_dev_enter(drm, &idx))
return -ENODEV;
-@@ -972,9 +983,12 @@ static int vc6_hvs_init_channel(struct v
+@@ -975,9 +986,12 @@ static int vc6_hvs_init_channel(struct v
static void __vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int chan)
{
if (!drm_dev_enter(drm, &idx))
return;
-@@ -1007,6 +1021,8 @@ static void __vc6_hvs_stop_channel(struc
+@@ -1008,6 +1022,8 @@ static void __vc6_hvs_stop_channel(struc
struct drm_device *drm = &vc4->base;
int idx;
if (!drm_dev_enter(drm, &idx))
return;
-@@ -1234,6 +1250,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1235,6 +1251,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
bool found = false;
int idx;
if (!drm_dev_enter(dev, &idx)) {
vc4_crtc_send_vblank(crtc);
return;
-@@ -1324,6 +1342,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1325,6 +1343,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
if (crtc->state->color_mgmt_changed) {
u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
if (crtc->state->gamma_lut) {
if (vc4->gen == VC4_GEN_4) {
vc4_hvs_update_gamma_lut(hvs, vc4_crtc);
-@@ -1363,6 +1383,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
+@@ -1365,6 +1385,8 @@ void vc4_hvs_mask_underrun(struct vc4_hv
u32 dispctrl;
int idx;
if (!drm_dev_enter(drm, &idx))
return;
-@@ -1383,6 +1405,8 @@ void vc4_hvs_unmask_underrun(struct vc4_
+@@ -1385,6 +1407,8 @@ void vc4_hvs_unmask_underrun(struct vc4_
u32 dispctrl;
int idx;
if (!drm_dev_enter(drm, &idx))
return;
-@@ -1417,6 +1441,8 @@ static irqreturn_t vc4_hvs_irq_handler(i
+@@ -1419,6 +1443,8 @@ static irqreturn_t vc4_hvs_irq_handler(i
u32 status;
u32 dspeislur;
/*
* NOTE: We don't need to protect the register access using
* drm_dev_enter() there because the interrupt handler lifetime
-@@ -1466,6 +1492,8 @@ static irqreturn_t vc6_hvs_eof_irq_handl
+@@ -1468,6 +1494,8 @@ static irqreturn_t vc6_hvs_eof_irq_handl
struct vc4_hvs *hvs = vc4->hvs;
unsigned int i;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1304,27 +1304,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1305,27 +1305,25 @@ void vc4_hvs_atomic_flush(struct drm_crt
WARN_ON(!vc4_state->mm);
WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm->mm_node.size);
+++ /dev/null
-From 48016174777294ea86103946f71e25bb04f647a1 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Thu, 26 Oct 2023 17:46:13 +0100
-Subject: [PATCH 0708/1085] drm/vc4: Correct logic on stopping an HVS channel
-
-When factoring out __vc4_hvs_stop_channel, the logic got inverted from
- if (condition)
- // stop channel
-to
- if (condition)
- goto out
- //stop channel
- out:
-and also changed the exact register writes used to stop the channel.
-
-Correct the logic so that the channel is actually stopped, and revert
-to the original register writes.
-
-Fixes: 6d01a106b4c8 ("drm/vc4: crtc: Move HVS init and close to a function")
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/gpu/drm/vc4/vc4_hvs.c | 10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -992,13 +992,11 @@ static void __vc4_hvs_stop_channel(struc
- if (!drm_dev_enter(drm, &idx))
- return;
-
-- if (HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_ENABLE)
-+ if (!(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_ENABLE))
- goto out;
-
-- HVS_WRITE(SCALER_DISPCTRLX(chan),
-- HVS_READ(SCALER_DISPCTRLX(chan)) | SCALER_DISPCTRLX_RESET);
-- HVS_WRITE(SCALER_DISPCTRLX(chan),
-- HVS_READ(SCALER_DISPCTRLX(chan)) & ~SCALER_DISPCTRLX_ENABLE);
-+ HVS_WRITE(SCALER_DISPCTRLX(chan), SCALER_DISPCTRLX_RESET);
-+ HVS_WRITE(SCALER_DISPCTRLX(chan), 0);
-
- /* Once we leave, the scaler should be disabled and its fifo empty. */
- WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
-@@ -1026,7 +1024,7 @@ static void __vc6_hvs_stop_channel(struc
- if (!drm_dev_enter(drm, &idx))
- return;
-
-- if (HVS_READ(SCALER6_DISPX_CTRL0(chan)) & SCALER6_DISPX_CTRL0_ENB)
-+ if (!(HVS_READ(SCALER6_DISPX_CTRL0(chan)) & SCALER6_DISPX_CTRL0_ENB))
- goto out;
-
- HVS_WRITE(SCALER6_DISPX_CTRL0(chan),
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1005,10 +1005,6 @@ static void __vc4_hvs_stop_channel(struc
+@@ -1008,10 +1008,6 @@ static void __vc4_hvs_stop_channel(struc
SCALER_DISPSTATX_MODE) !=
SCALER_DISPSTATX_MODE_DISABLED);
* someone was waiting it.
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -697,7 +697,8 @@ static void vc4_hvs_schedule_dlist_sweep
+@@ -700,7 +700,8 @@ static void vc4_hvs_schedule_dlist_sweep
if (!list_empty(&hvs->stale_dlist_entries))
queue_work(system_unbound_wq, &hvs->free_dlist_work);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
}
-@@ -712,6 +713,27 @@ static bool vc4_hvs_frcnt_lte(u8 cnt1, u
+@@ -715,6 +716,27 @@ static bool vc4_hvs_frcnt_lte(u8 cnt1, u
return (s8)((cnt1 << 2) - (cnt2 << 2)) <= 0;
}
/*
* Some atomic commits (legacy cursor updates, mostly) will not wait for
* the next vblank and will just return once the commit has been pushed
-@@ -746,7 +768,8 @@ static void vc4_hvs_dlist_free_work(stru
+@@ -749,7 +771,8 @@ static void vc4_hvs_dlist_free_work(stru
u8 frcnt;
frcnt = vc4_hvs_get_fifo_frame_count(hvs, cur->channel);
/* The filter kernel is composed of dwords each containing 3 9-bit
* signed integers packed next to each other.
*/
-@@ -1551,6 +1581,8 @@ int vc4_hvs_debugfs_init(struct drm_mino
+@@ -1555,6 +1585,8 @@ int vc4_hvs_debugfs_init(struct drm_mino
drm_debugfs_add_file(drm, "hvs_underrun", vc4_hvs_debugfs_underrun, NULL);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -659,7 +659,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -662,7 +662,8 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
dlist_count);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
if (ret) {
struct vc4_crtc_state {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -697,8 +697,11 @@ void vc4_hvs_mark_dlist_entry_stale(stru
+@@ -700,8 +700,11 @@ void vc4_hvs_mark_dlist_entry_stale(stru
* Kunit tests run with a mock device and we consider any hardware
* access a test failure. Let's free the dlist allocation right away if
* we're running under kunit, we won't risk a dlist corruption anyway.
spin_lock_irqsave(&hvs->mm_lock, flags);
vc4_hvs_free_dlist_entry_locked(hvs, alloc);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
-@@ -1195,6 +1198,7 @@ static void vc4_hvs_install_dlist(struct
+@@ -1198,6 +1201,7 @@ static void vc4_hvs_install_dlist(struct
return;
WARN_ON(!vc4_state->mm);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -823,10 +823,28 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
+@@ -826,10 +826,28 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
if (!drm_dev_enter(drm, &idx))
return 0;
switch (fifo) {
case 0:
field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
-@@ -841,6 +859,7 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
+@@ -844,6 +862,7 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
SCALER_DISPSTAT2_FRCNT2);
break;
}
next_entry_start = 0;
for (j = active_dlist; j < dlist_mem_size; j++) {
-@@ -760,7 +819,7 @@ bool vc4_hvs_check_channel_active(struct
+@@ -763,7 +822,7 @@ bool vc4_hvs_check_channel_active(struct
return 0;
if (vc4->gen >= VC4_GEN_6)
else
enabled = HVS_READ(SCALER_DISPCTRLX(fifo)) & SCALER_DISPCTRLX_ENABLE;
-@@ -825,8 +884,8 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
+@@ -828,8 +887,8 @@ u8 vc4_hvs_get_fifo_frame_count(struct v
switch (vc4->gen) {
case VC4_GEN_6:
break;
case VC4_GEN_5:
switch (fifo) {
-@@ -1037,20 +1096,20 @@ static int vc6_hvs_init_channel(struct v
+@@ -1040,20 +1099,20 @@ static int vc6_hvs_init_channel(struct v
if (!drm_dev_enter(drm, &idx))
return -ENODEV;
drm_dev_exit(idx);
-@@ -1096,18 +1155,18 @@ static void __vc6_hvs_stop_channel(struc
- if (!drm_dev_enter(drm, &idx))
- return;
-
-- if (!(HVS_READ(SCALER6_DISPX_CTRL0(chan)) & SCALER6_DISPX_CTRL0_ENB))
-+ if (!(HVS_READ(SCALER6_DISPX_CTRL0(chan)) & SCALER6(DISPX_CTRL0_ENB)))
+@@ -1103,14 +1162,14 @@ static void __vc6_hvs_stop_channel(struc
goto out;
HVS_WRITE(SCALER6_DISPX_CTRL0(chan),
out:
drm_dev_exit(idx);
-@@ -1221,8 +1280,8 @@ static void vc4_hvs_install_dlist(struct
+@@ -1224,8 +1283,8 @@ static void vc4_hvs_install_dlist(struct
if (vc4->gen >= VC4_GEN_6)
HVS_WRITE(SCALER6_DISPX_LPTRS(vc4_state->assigned_channel),
else
HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel),
vc4_state->mm->mm_node.start);
-@@ -1382,11 +1441,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1385,11 +1444,11 @@ void vc4_hvs_atomic_flush(struct drm_crt
if (enable_bg_fill)
HVS_WRITE(SCALER6_DISPX_CTRL1(channel),
HVS_READ(SCALER6_DISPX_CTRL1(channel)) |
} else {
/* we can actually run with a lower core clock when background
* fill is enabled on VC4_GEN_5 so leave it enabled always.
-@@ -1656,7 +1715,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
+@@ -1660,7 +1719,7 @@ struct vc4_hvs *__vc4_hvs_alloc(struct v
* access a register. Use a plausible size then.
*/
if (!kunit_get_current_test())
else
dlist_size = 4096;
-@@ -1890,14 +1949,17 @@ static int vc6_hvs_hw_init(struct vc4_hv
+@@ -1894,14 +1953,17 @@ static int vc6_hvs_hw_init(struct vc4_hv
const struct vc6_csc_coeff_entry *coeffs;
unsigned int i;
for (i = 0; i < 6; i++) {
coeffs = &csc_coeffs[i / 3][i % 3];
-@@ -1996,21 +2058,21 @@ static int vc4_hvs_cob_init(struct vc4_h
+@@ -2000,21 +2062,21 @@ static int vc4_hvs_cob_init(struct vc4_h
reg = 0;
top = 3840;
VC4_SET_FIELD(top, SCALER6_DISPX_COB_TOP) |
VC4_SET_FIELD(base, SCALER6_DISPX_COB_BASE));
break;
-@@ -2041,7 +2103,10 @@ static int vc4_hvs_bind(struct device *d
+@@ -2045,7 +2107,10 @@ static int vc4_hvs_bind(struct device *d
hvs->regset.base = hvs->regs;
hvs->regset.regs = vc6_hvs_regs;
hvs->regset.nregs = ARRAY_SIZE(vc6_hvs_regs);
} else {
-@@ -2208,6 +2273,7 @@ static void vc4_hvs_dev_remove(struct pl
+@@ -2212,6 +2277,7 @@ static void vc4_hvs_dev_remove(struct pl
static const struct of_device_id vc4_hvs_dt_match[] = {
{ .compatible = "brcm,bcm2711-hvs" },
{ .compatible = "brcm,bcm2712-hvs" },
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1888,6 +1888,17 @@ static int vc4_hvs_hw_init(struct vc4_hv
+@@ -1892,6 +1892,17 @@ static int vc4_hvs_hw_init(struct vc4_hv
#define CFC1_N_MA_CSC_COEFF_C23(x) (0xa03c + ((x) * 0x3000))
#define CFC1_N_MA_CSC_COEFF_C24(x) (0xa040 + ((x) * 0x3000))
/* 4 S2.22 multiplication factors, and 1 S9.15 addititive element for each of 3
* output components
*/
-@@ -1958,31 +1969,43 @@ static int vc6_hvs_hw_init(struct vc4_hv
+@@ -1962,31 +1973,43 @@ static int vc6_hvs_hw_init(struct vc4_hv
HVS_WRITE(SCALER6(PRI_MAP0), 0xffffffff);
HVS_WRITE(SCALER6(PRI_MAP1), 0xffffffff);
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -855,14 +855,19 @@ static void vc4_hvs_dlist_free_work(stru
+@@ -858,14 +858,19 @@ static void vc4_hvs_dlist_free_work(stru
struct vc4_hvs *hvs = container_of(work, struct vc4_hvs, free_dlist_work);
struct vc4_hvs_dlist_allocation *cur, *next;
unsigned long flags;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -693,6 +693,9 @@ static void vc4_hvs_irq_clear_eof(struct
+@@ -696,6 +696,9 @@ static void vc4_hvs_irq_clear_eof(struct
hvs->eof_irq[channel].enabled = false;
}
static struct vc4_hvs_dlist_allocation *
vc4_hvs_alloc_dlist_entry(struct vc4_hvs *hvs,
unsigned int channel,
-@@ -701,6 +704,7 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -704,6 +707,7 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
struct vc4_dev *vc4 = hvs->vc4;
struct drm_device *dev = &vc4->base;
struct vc4_hvs_dlist_allocation *alloc;
unsigned long flags;
int ret;
-@@ -718,9 +722,26 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
+@@ -721,9 +725,26 @@ vc4_hvs_alloc_dlist_entry(struct vc4_hvs
dlist_count);
spin_unlock_irqrestore(&hvs->mm_lock, flags);
if (ret) {
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -1400,7 +1400,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
+@@ -1403,7 +1403,7 @@ void vc4_hvs_atomic_flush(struct drm_crt
struct drm_plane *plane;
struct vc4_plane_state *vc4_plane_state;
bool debug_dump_regs = false;
static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
struct drm_mm_node *space,
-@@ -2255,14 +2258,19 @@ static int vc4_hvs_bind(struct device *d
+@@ -2259,14 +2262,19 @@ static int vc4_hvs_bind(struct device *d
if (ret)
return ret;
ret = vc4_hvs_cob_init(hvs);
if (ret)
-@@ -2288,6 +2296,8 @@ static void vc4_hvs_unbind(struct device
+@@ -2292,6 +2300,8 @@ static void vc4_hvs_unbind(struct device
if (drm_mm_node_allocated(&vc4->hvs->mitchell_netravali_filter))
drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
return 0;
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -2308,7 +2308,10 @@ static void vc4_hvs_unbind(struct device
+@@ -2312,7 +2312,10 @@ static void vc4_hvs_unbind(struct device
drm_mm_remove_node(node);
drm_mm_takedown(&vc4->hvs->lbm_mm);
--- a/kernel/cgroup/cgroup.c
+++ b/kernel/cgroup/cgroup.c
-@@ -6060,9 +6060,6 @@ int __init cgroup_init_early(void)
+@@ -6063,9 +6063,6 @@ int __init cgroup_init_early(void)
return 0;
}
/**
* cgroup_init - cgroup initialization
*
-@@ -6096,12 +6093,6 @@ int __init cgroup_init(void)
+@@ -6099,12 +6096,6 @@ int __init cgroup_init(void)
cgroup_unlock();
for_each_subsys(ss, ssid) {
if (ss->early_init) {
struct cgroup_subsys_state *css =
-@@ -6742,10 +6733,6 @@ static int __init cgroup_disable(char *s
+@@ -6745,10 +6736,6 @@ static int __init cgroup_disable(char *s
strcmp(token, ss->legacy_name))
continue;
static_branch_disable(cgroup_subsys_enabled_key[i]);
pr_info("Disabling %s control group subsystem\n",
ss->name);
-@@ -6779,7 +6766,7 @@ static int __init cgroup_enable(char *st
+@@ -6782,7 +6769,7 @@ static int __init cgroup_enable(char *st
strcmp(token, ss->legacy_name))
continue;
if (err)
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
-@@ -1693,7 +1693,9 @@ static void read_symbols(const char *mod
+@@ -1666,7 +1666,9 @@ static void read_symbols(const char *mod
symname = remove_dot(info.strtab + sym->st_name);
handle_symbol(mod, &info, sym, symname);
}
check_sec_ref(mod, &info);
-@@ -1866,8 +1868,10 @@ static void add_header(struct buffer *b,
+@@ -1839,8 +1841,10 @@ static void add_header(struct buffer *b,
buf_printf(b, "BUILD_SALT;\n");
buf_printf(b, "BUILD_LTO_INFO;\n");
buf_printf(b, "\n");
buf_printf(b, "\n");
buf_printf(b, "__visible struct module __this_module\n");
buf_printf(b, "__section(\".gnu.linkonce.this_module\") = {\n");
-@@ -1881,8 +1885,10 @@ static void add_header(struct buffer *b,
+@@ -1854,8 +1858,10 @@ static void add_header(struct buffer *b,
buf_printf(b, "\t.arch = MODULE_ARCH_INIT,\n");
buf_printf(b, "};\n");
buf_printf(b,
"\n"
-@@ -1890,8 +1896,10 @@ static void add_header(struct buffer *b,
+@@ -1863,8 +1869,10 @@ static void add_header(struct buffer *b,
"MODULE_INFO(retpoline, \"Y\");\n"
"#endif\n");
if (strstarts(mod->name, "tools/testing"))
buf_printf(b, "\nMODULE_INFO(test, \"Y\");\n");
-@@ -2001,11 +2009,13 @@ static void add_depends(struct buffer *b
+@@ -1974,11 +1982,13 @@ static void add_depends(struct buffer *b
static void add_srcversion(struct buffer *b, struct module *mod)
{
}
static void write_buf(struct buffer *b, const char *fname)
-@@ -2088,7 +2098,9 @@ static void write_mod_c_file(struct modu
+@@ -2061,7 +2071,9 @@ static void write_mod_c_file(struct modu
add_exported_symbols(&buf, mod);
add_versions(&buf, mod);
add_depends(&buf, mod);
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1993,7 +1993,7 @@ config PADATA
+@@ -2002,7 +2002,7 @@ config PADATA
bool
config ASN1
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
-@@ -1084,12 +1084,18 @@ static const struct usb_device_id produc
+@@ -1084,6 +1084,11 @@ static const struct usb_device_id produc
USB_DEVICE_AND_INTERFACE_INFO(0x03f0, 0x581d, USB_CLASS_VENDOR_SPEC, 1, 7),
.driver_info = (unsigned long)&qmi_wwan_info,
},
+ .driver_info = (unsigned long)&qmi_wwan_info,
+ },
+
+ {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0122)}, /* Quectel RG650V */
{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0125)}, /* Quectel EC25, EC20 R2.0 Mini PCIe */
{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0306)}, /* Quectel EP06/EG06/EM06 */
- {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0512)}, /* Quectel EG12/EM12 */
+@@ -1091,6 +1096,7 @@ static const struct usb_device_id produc
{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)}, /* Quectel EM160R-GL */
{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)}, /* Quectel RM500Q-GL */
{QMI_MATCH_FF_FF_FF(0x2c7c, 0x0801)}, /* Quectel RM520N */
#include <linux/inet_diag.h>
#include <linux/sock_diag.h>
-@@ -21,23 +20,6 @@ static int (*inet_rcv_compat)(struct sk_
- static DEFINE_MUTEX(sock_diag_table_mutex);
+@@ -22,23 +21,6 @@ static const struct sock_diag_inet_compa
+
static struct workqueue_struct *broadcast_wq;
-DEFINE_COOKIE(sock_cookie);
&vmalloc_op,
--- a/mm/vmstat.c
+++ b/mm/vmstat.c
-@@ -2135,10 +2135,12 @@ void __init init_mm_internals(void)
+@@ -2136,10 +2136,12 @@ void __init init_mm_internals(void)
start_shepherd_timer();
#endif
#ifdef CONFIG_PROC_FS
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1185,6 +1185,9 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1186,6 +1186,9 @@ int __init early_init_dt_scan_chosen(cha
p = of_get_flat_dt_prop(node, "bootargs", &l);
if (p != NULL && l > 0)
strscpy(cmdline, p, min(l, COMMAND_LINE_SIZE));
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1451,6 +1451,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
+@@ -1460,6 +1460,17 @@ config SYSCTL_ARCH_UNALIGN_ALLOW
the unaligned access emulation.
see arch/parisc/kernel/unaligned.c for reference
static inline const char *rtn_type(char *buf, size_t len, unsigned int t)
--- a/net/ipv4/ipmr.c
+++ b/net/ipv4/ipmr.c
-@@ -180,6 +180,7 @@ static int ipmr_rule_action(struct fib_r
+@@ -190,6 +190,7 @@ static int ipmr_rule_action(struct fib_r
case FR_ACT_UNREACHABLE:
return -ENETUNREACH;
case FR_ACT_PROHIBIT:
tb_id = fib_rule_get_table(rule, arg);
--- a/net/ipv6/ip6mr.c
+++ b/net/ipv6/ip6mr.c
-@@ -170,6 +170,8 @@ static int ip6mr_rule_action(struct fib_
+@@ -180,6 +180,8 @@ static int ip6mr_rule_action(struct fib_
return -ENETUNREACH;
case FR_ACT_PROHIBIT:
return -EACCES;
static const struct rt6_info ip6_blk_hole_entry_template = {
.dst = {
.__rcuref = RCUREF_INIT(1),
-@@ -1040,6 +1054,7 @@ static const int fib6_prop[RTN_MAX + 1]
+@@ -1043,6 +1057,7 @@ static const int fib6_prop[RTN_MAX + 1]
[RTN_BLACKHOLE] = -EINVAL,
[RTN_UNREACHABLE] = -EHOSTUNREACH,
[RTN_PROHIBIT] = -EACCES,
[RTN_THROW] = -EAGAIN,
[RTN_NAT] = -EINVAL,
[RTN_XRESOLVE] = -EINVAL,
-@@ -1075,6 +1090,10 @@ static void ip6_rt_init_dst_reject(struc
+@@ -1078,6 +1093,10 @@ static void ip6_rt_init_dst_reject(struc
rt->dst.output = ip6_pkt_prohibit_out;
rt->dst.input = ip6_pkt_prohibit;
break;
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -8377,7 +8377,7 @@ static int nft_register_flowtable_net_ho
+@@ -8417,7 +8417,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);
--- a/init/Kconfig
+++ b/init/Kconfig
-@@ -1811,6 +1811,15 @@ config DEBUG_RSEQ
+@@ -1820,6 +1820,15 @@ config DEBUG_RSEQ
If unsure, say N.
default ""
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1189,6 +1189,17 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1190,6 +1190,17 @@ int __init early_init_dt_scan_chosen(cha
if (p != NULL && l > 0)
strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
-@@ -798,8 +798,8 @@ static const struct flash_info spansion_
+@@ -799,8 +799,8 @@ static const struct flash_info spansion_
MFR_FLAGS(USE_CLSR)
},
{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -1370,6 +1370,70 @@ static int spi_transfer_wait(struct spi_
+@@ -1380,6 +1380,70 @@ static int spi_transfer_wait(struct spi_
return 0;
}
static void _spi_transfer_delay_ns(u32 ns)
{
if (!ns)
-@@ -2215,6 +2279,75 @@ void spi_flush_queue(struct spi_controll
+@@ -2225,6 +2289,75 @@ void spi_flush_queue(struct spi_controll
/*-------------------------------------------------------------------------*/
#if defined(CONFIG_OF)
static void of_spi_parse_dt_cs_delay(struct device_node *nc,
struct spi_delay *delay, const char *prop)
{
-@@ -2354,6 +2487,10 @@ of_register_spi_device(struct spi_contro
+@@ -2364,6 +2497,10 @@ of_register_spi_device(struct spi_contro
if (rc)
goto err_out;
default ""
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1189,6 +1189,17 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1190,6 +1190,17 @@ int __init early_init_dt_scan_chosen(cha
if (p != NULL && l > 0)
strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
help
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -1189,6 +1189,17 @@ int __init early_init_dt_scan_chosen(cha
+@@ -1190,6 +1190,17 @@ int __init early_init_dt_scan_chosen(cha
if (p != NULL && l > 0)
strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
-TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
-@@ -732,4 +732,13 @@ config GOLDFISH_TIMER
+@@ -733,4 +733,13 @@ config GOLDFISH_TIMER
help
Support for the timer/counter of goldfish-rtc
+++ /dev/null
-From 33239152305567b3e9bf052f71fd4baecd626341 Mon Sep 17 00:00:00 2001
-From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
-Date: Tue, 10 Sep 2024 06:40:22 +0200
-Subject: [PATCH 1/3] clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
-
-Clock plan for Ralink SoC RT3883 needs an extra 'periph' clock to properly
-set some peripherals that has this clock as their parent. When this driver
-was mainlined we could not find any active users of this SoC so we cannot
-perform any real tests for it. Now, one user of a Belkin f9k1109 version 1
-device which uses this SoC appear and reported some issues in openWRT:
-- https://github.com/openwrt/openwrt/issues/16054
-The peripherals that are wrong are 'uart', 'i2c', 'i2s' and 'uartlite' which
-has a not defined 'periph' clock as parent. Hence, introduce it to have a
-properly working clock plan for this SoC.
-
-Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
-Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
-Link: https://lore.kernel.org/r/20240910044024.120009-2-sergio.paracuellos@gmail.com
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/ralink/clk-mtmips.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/ralink/clk-mtmips.c
-+++ b/drivers/clk/ralink/clk-mtmips.c
-@@ -267,6 +267,11 @@ static struct mtmips_clk_fixed rt305x_fi
- CLK_FIXED("xtal", NULL, 40000000)
- };
-
-+static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
-+ CLK_FIXED("xtal", NULL, 40000000),
-+ CLK_FIXED("periph", "xtal", 40000000)
-+};
-+
- static struct mtmips_clk_fixed rt3352_fixed_clocks[] = {
- CLK_FIXED("periph", "xtal", 40000000)
- };
-@@ -779,8 +784,8 @@ static const struct mtmips_clk_data rt33
- static const struct mtmips_clk_data rt3883_clk_data = {
- .clk_base = rt3883_clks_base,
- .num_clk_base = ARRAY_SIZE(rt3883_clks_base),
-- .clk_fixed = rt305x_fixed_clocks,
-- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
-+ .clk_fixed = rt3883_fixed_clocks,
-+ .num_clk_fixed = ARRAY_SIZE(rt3883_fixed_clocks),
- .clk_factor = NULL,
- .num_clk_factor = 0,
- .clk_periph = rt5350_pherip_clks,
+++ /dev/null
-From d34db686a3d74bd564bfce2ada15011c556269fc Mon Sep 17 00:00:00 2001
-From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
-Date: Tue, 10 Sep 2024 06:40:23 +0200
-Subject: [PATCH 2/3] clk: ralink: mtmips: fix clocks probe order in oldest
- ralink SoCs
-
-Base clocks are the first in being probed and are real dependencies of the
-rest of fixed, factor and peripheral clocks. For old ralink SoCs RT2880,
-RT305x and RT3883 'xtal' must be defined first since in any other case,
-when fixed clocks are probed they are delayed until 'xtal' is probed so the
-following warning appears:
-
- WARNING: CPU: 0 PID: 0 at drivers/clk/ralink/clk-mtmips.c:499 rt3883_bus_recalc_rate+0x98/0x138
- Modules linked in:
- CPU: 0 PID: 0 Comm: swapper Not tainted 6.6.43 #0
- Stack : 805e58d0 00000000 00000004 8004f950 00000000 00000004 00000000 00000000
- 80669c54 80830000 80700000 805ae570 80670068 00000001 80669bf8 00000000
- 00000000 00000000 805ae570 80669b38 00000020 804db7dc 00000000 00000000
- 203a6d6d 80669b78 80669e48 70617773 00000000 805ae570 00000000 00000009
- 00000000 00000001 00000004 00000001 00000000 00000000 83fe43b0 00000000
- ...
- Call Trace:
- [<800065d0>] show_stack+0x64/0xf4
- [<804bca14>] dump_stack_lvl+0x38/0x60
- [<800218ac>] __warn+0x94/0xe4
- [<8002195c>] warn_slowpath_fmt+0x60/0x94
- [<80259ff8>] rt3883_bus_recalc_rate+0x98/0x138
- [<80254530>] __clk_register+0x568/0x688
- [<80254838>] of_clk_hw_register+0x18/0x2c
- [<8070b910>] rt2880_clk_of_clk_init_driver+0x18c/0x594
- [<8070b628>] of_clk_init+0x1c0/0x23c
- [<806fc448>] plat_time_init+0x58/0x18c
- [<806fdaf0>] time_init+0x10/0x6c
- [<806f9bc4>] start_kernel+0x458/0x67c
-
- ---[ end trace 0000000000000000 ]---
-
-When this driver was mainlined we could not find any active users of old
-ralink SoCs so we cannot perform any real tests for them. Now, one user
-of a Belkin f9k1109 version 1 device which uses RT3883 SoC appeared and
-reported some issues in openWRT:
-- https://github.com/openwrt/openwrt/issues/16054
-
-Thus, define a 'rt2880_xtal_recalc_rate()' just returning the expected
-frequency 40Mhz and use it along the old ralink SoCs to have a correct
-boot trace with no warnings and a working clock plan from the beggining.
-
-Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
-Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
-Link: https://lore.kernel.org/r/20240910044024.120009-3-sergio.paracuellos@gmail.com
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/ralink/clk-mtmips.c | 21 +++++++++++++--------
- 1 file changed, 13 insertions(+), 8 deletions(-)
-
---- a/drivers/clk/ralink/clk-mtmips.c
-+++ b/drivers/clk/ralink/clk-mtmips.c
-@@ -263,10 +263,6 @@ err_clk_unreg:
- .rate = _rate \
- }
-
--static struct mtmips_clk_fixed rt305x_fixed_clocks[] = {
-- CLK_FIXED("xtal", NULL, 40000000)
--};
--
- static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
- CLK_FIXED("xtal", NULL, 40000000),
- CLK_FIXED("periph", "xtal", 40000000)
-@@ -371,6 +367,12 @@ static inline struct mtmips_clk *to_mtmi
- return container_of(hw, struct mtmips_clk, hw);
- }
-
-+static unsigned long rt2880_xtal_recalc_rate(struct clk_hw *hw,
-+ unsigned long parent_rate)
-+{
-+ return 40000000;
-+}
-+
- static unsigned long rt5350_xtal_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
- {
-@@ -682,10 +684,12 @@ static unsigned long mt76x8_cpu_recalc_r
- }
-
- static struct mtmips_clk rt2880_clks_base[] = {
-+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
- { CLK_BASE("cpu", "xtal", rt2880_cpu_recalc_rate) }
- };
-
- static struct mtmips_clk rt305x_clks_base[] = {
-+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
- { CLK_BASE("cpu", "xtal", rt305x_cpu_recalc_rate) }
- };
-
-@@ -695,6 +699,7 @@ static struct mtmips_clk rt3352_clks_bas
- };
-
- static struct mtmips_clk rt3883_clks_base[] = {
-+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
- { CLK_BASE("cpu", "xtal", rt3883_cpu_recalc_rate) },
- { CLK_BASE("bus", "cpu", rt3883_bus_recalc_rate) }
- };
-@@ -751,8 +756,8 @@ err_clk_unreg:
- static const struct mtmips_clk_data rt2880_clk_data = {
- .clk_base = rt2880_clks_base,
- .num_clk_base = ARRAY_SIZE(rt2880_clks_base),
-- .clk_fixed = rt305x_fixed_clocks,
-- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
-+ .clk_fixed = NULL,
-+ .num_clk_fixed = 0,
- .clk_factor = rt2880_factor_clocks,
- .num_clk_factor = ARRAY_SIZE(rt2880_factor_clocks),
- .clk_periph = rt2880_pherip_clks,
-@@ -762,8 +767,8 @@ static const struct mtmips_clk_data rt28
- static const struct mtmips_clk_data rt305x_clk_data = {
- .clk_base = rt305x_clks_base,
- .num_clk_base = ARRAY_SIZE(rt305x_clks_base),
-- .clk_fixed = rt305x_fixed_clocks,
-- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
-+ .clk_fixed = NULL,
-+ .num_clk_fixed = 0,
- .clk_factor = rt305x_factor_clocks,
- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks),
- .clk_periph = rt305x_pherip_clks,
}
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
-@@ -731,10 +731,15 @@ config GOLDFISH_TIMER
+@@ -732,10 +732,15 @@ config GOLDFISH_TIMER
depends on RTC_DRV_GOLDFISH
help
Support for the timer/counter of goldfish-rtc
--- a/drivers/media/usb/uvc/uvc_driver.c
+++ b/drivers/media/usb/uvc/uvc_driver.c
-@@ -3183,6 +3183,18 @@ static const struct usb_device_id uvc_id
+@@ -3229,6 +3229,18 @@ static const struct usb_device_id uvc_id
.bInterfaceSubClass = 1,
.bInterfaceProtocol = 0,
.driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) },
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
-@@ -641,6 +641,17 @@ config RISCV_TIMER
+@@ -642,6 +642,17 @@ config RISCV_TIMER
is accessed via both the SBI and the rdcycle instruction. This is
required for all RISC-V systems.
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
-@@ -19,6 +19,22 @@
+@@ -22,6 +22,22 @@
*/
#define PCIE_PME_TO_L2_TIMEOUT_US 10000
#include "trace.h"
#include "nvme.h"
-@@ -1062,6 +1063,15 @@ static inline int nvme_poll_cq(struct nv
+@@ -1058,6 +1059,15 @@ static inline int nvme_poll_cq(struct nv
{
int found = 0;
}
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
-@@ -3664,7 +3664,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3672,7 +3672,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
full_len = urb->transfer_buffer_length;
/* If we have scatter/gather list, we use it. */
projects / openwrt / staging / wigyori.git / commitdiff