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Fix the disable_mmu code
author
Vikram Kanigiri
<vikram.kanigiri@arm.com>
Thu, 20 Mar 2014 12:23:21 +0000
(12:23 +0000)
committer
Dan Handley
<dan.handley@arm.com>
Fri, 21 Mar 2014 17:17:48 +0000
(17:17 +0000)
Remove the hard coding of all the MMU related registers with 0 and disable MMU
by clearing the M and C bit in SCTLR_ELx
Change-Id: I4a0b1bb14a604734b74c32eb31315d8504a7b8d8
plat/fvp/aarch64/plat_common.c
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diff --git
a/plat/fvp/aarch64/plat_common.c
b/plat/fvp/aarch64/plat_common.c
index 9dbcb8ff9d4828c1828fa885681d4d855fa90f78..1de6c03ea0a7a2a6c06ddaa4d65a82cbbc53e7fb 100644
(file)
--- a/
plat/fvp/aarch64/plat_common.c
+++ b/
plat/fvp/aarch64/plat_common.c
@@
-91,11
+91,11
@@
void enable_mmu()
void disable_mmu(void)
{
- /* Zero out the MMU related registers */
- write_mair(0);
-
write_tcr(0
);
-
write_ttbr0(0
);
- write_sctlr(
0
);
+ unsigned long sctlr;
+
+
sctlr = read_sctlr(
);
+
sctlr = sctlr & ~(SCTLR_M_BIT | SCTLR_C_BIT
);
+ write_sctlr(
sctlr
);
/* Flush the caches */
dcsw_op_all(DCCISW);