This commit finally adds support for the built in SD/MMC controller in IPQ4019 SoC.
Controller is supported by the upstream SDHCI-MSM driver with a minor clock setting patch.
Patch is special to the IPQ4019 and cannot be upstreamed.
LDO and SDHCI node are upstreamed, and LDO node is awaiting to be accepted.
Signed-off-by: Robert Marko <robimarko@gmail.com>
drivers/iio/chemical/Kconfig | 2 ++
1 file changed, 2 insertions(+)
-diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
-index 0b91de4df8f4..a7e65a59bf42 100644
--- a/drivers/iio/chemical/Kconfig
+++ b/drivers/iio/chemical/Kconfig
@@ -91,6 +91,8 @@ config SPS30
create mode 100644 drivers/iio/imu/fxos8700_i2c.c
create mode 100644 drivers/iio/imu/fxos8700_spi.c
-diff --git a/drivers/iio/imu/Kconfig b/drivers/iio/imu/Kconfig
-index f3c7282..60bb102 100644
--- a/drivers/iio/imu/Kconfig
+++ b/drivers/iio/imu/Kconfig
@@ -40,6 +40,33 @@ config ADIS16480
config KMX61
tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
depends on I2C
-diff --git a/drivers/iio/imu/Makefile b/drivers/iio/imu/Makefile
-index 4a69588..5237fd4 100644
--- a/drivers/iio/imu/Makefile
+++ b/drivers/iio/imu/Makefile
-@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) += adis_buffer.o
+@@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) +
obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
obj-y += bmi160/
obj-y += inv_mpu6050/
obj-$(CONFIG_KMX61) += kmx61.o
-diff --git a/drivers/iio/imu/fxos8700.h b/drivers/iio/imu/fxos8700.h
-new file mode 100644
-index 00000000..6dfb8d7
--- /dev/null
+++ b/drivers/iio/imu/fxos8700.h
@@ -0,0 +1,10 @@
+ const char *name, bool use_spi);
+
+#endif /* FXOS8700_H_ */
-diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
-new file mode 100644
-index 00000000..7b47be4
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -0,0 +1,649 @@
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
+MODULE_LICENSE("GPL v2");
-diff --git a/drivers/iio/imu/fxos8700_i2c.c b/drivers/iio/imu/fxos8700_i2c.c
-new file mode 100644
-index 00000000..3ceb763
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_i2c.c
@@ -0,0 +1,71 @@
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 I2C driver");
+MODULE_LICENSE("GPL v2");
-diff --git a/drivers/iio/imu/fxos8700_spi.c b/drivers/iio/imu/fxos8700_spi.c
-new file mode 100644
-index 00000000..57e7bb6
--- /dev/null
+++ b/drivers/iio/imu/fxos8700_spi.c
@@ -0,0 +1,59 @@
+MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
+MODULE_DESCRIPTION("FXOS8700 SPI driver");
+MODULE_LICENSE("GPL v2");
---
-2.7.4
-
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGHT_HAVE_PCI=y
CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_MSM=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
CONFIG_NET_DSA=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_TAG_QCA=y
-# CONFIG_NET_DSA_VITESSE_VSC73XX is not set
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SWITCHDEV=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
-# CONFIG_PCI_V3_SEMI is not set
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_QCOM_SPMI is not set
CONFIG_REGULATOR_VCTRL=y
+CONFIG_REGULATOR_VQMMC_IPQ4019=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
CONFIG_RFS_ACCEL=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
# CONFIG_ARCH_MDM9615 is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-# CONFIG_ARCH_MILBEAUT is not set
# CONFIG_ARCH_MSM8960 is not set
# CONFIG_ARCH_MSM8974 is not set
# CONFIG_ARCH_MSM8X60 is not set
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_QCOM=y
-# CONFIG_ARCH_RDA is not set
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARM_CPU_SUSPEND=y
# CONFIG_ARM_CPU_TOPOLOGY is not set
CONFIG_ARM_CRYPTO=y
-# CONFIG_ARM_ERRATA_814220 is not set
-# CONFIG_ARM_ERRATA_857271 is not set
-# CONFIG_ARM_ERRATA_857272 is not set
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
# CONFIG_CACHE_L2X0 is not set
+CONFIG_CC_HAS_KASAN_GENERIC=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_QCOM=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CRYPTO_AES_ARM=y
CONFIG_CRYPTO_AES_ARM_BS=y
CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER=y
+CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
CONFIG_CRYPTO_DEV_QCOM_RNG=y
CONFIG_CRYPTO_DRBG=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
-# CONFIG_ENERGY_MODEL is not set
CONFIG_ESSEDMA=y
CONFIG_EXTCON=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
-# CONFIG_FSL_QDMA is not set
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_MEMFD_CREATE=y
# CONFIG_MFD_QCOM_RPM is not set
# CONFIG_MFD_SPMI_PMIC is not set
-# CONFIG_MFD_STPMIC1 is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_MSM=y
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=y
+# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
-# CONFIG_NVMEM_REBOOT_MODE is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
-# CONFIG_PCI_MESON is not set
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
-CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_QCOM_SPMI is not set
CONFIG_REGULATOR_VCTRL=y
+CONFIG_REGULATOR_VQMMC_IPQ4019=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
# CONFIG_RESET_QCOM_PDC is not set
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
-# CONFIG_SPI_QCOM_QSPI is not set
CONFIG_SPI_QUP=y
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
-# CONFIG_TRUSTED_FOUNDATIONS is not set
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
--- /dev/null
+From 97043d292365ae39d62b54a6d79dff98d048b501 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 22 Jan 2020 12:44:14 +0100
+Subject: [PATCH] From ebf652b408200504194be32ad0a3f5bb49d6000a Mon Sep 17
+ 00:00:00 2001 From: Robert Marko <robert.marko@sartura.hr> Date: Sun, 12 Jan
+ 2020 12:30:01 +0100 Subject: [PATCH] regulator: add IPQ4019 SDHCI VQMMC LDO
+ driver
+
+This introduces the IPQ4019 VQMMC LDO driver needed for
+the SD/EMMC driver I/O level operation.
+This will enable introducing SD/EMMC support for the built-in controller.
+
+Signed-off-by: Mantas Pucka <mantas@8devices.com>
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Link: https://lore.kernel.org/r/20200112113003.11110-1-robert.marko@sartura.hr
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/regulator/Kconfig | 7 ++
+ drivers/regulator/Makefile | 1 +
+ drivers/regulator/vqmmc-ipq4019-regulator.c | 101 ++++++++++++++++++++
+ 3 files changed, 109 insertions(+)
+ create mode 100644 drivers/regulator/vqmmc-ipq4019-regulator.c
+
+--- a/drivers/regulator/Kconfig
++++ b/drivers/regulator/Kconfig
+@@ -981,6 +981,13 @@ config REGULATOR_VEXPRESS
+ This driver provides support for voltage regulators available
+ on the ARM Ltd's Versatile Express platform.
+
++config REGULATOR_VQMMC_IPQ4019
++ tristate "IPQ4019 VQMMC SD LDO regulator support"
++ depends on ARCH_QCOM
++ help
++ This driver provides support for the VQMMC LDO I/0
++ voltage regulator of the IPQ4019 SD/EMMC controller.
++
+ config REGULATOR_WM831X
+ tristate "Wolfson Microelectronics WM831x PMIC regulators"
+ depends on MFD_WM831X
+--- a/drivers/regulator/Makefile
++++ b/drivers/regulator/Makefile
+@@ -122,6 +122,7 @@ obj-$(CONFIG_REGULATOR_TWL4030) += twl-r
+ obj-$(CONFIG_REGULATOR_UNIPHIER) += uniphier-regulator.o
+ obj-$(CONFIG_REGULATOR_VCTRL) += vctrl-regulator.o
+ obj-$(CONFIG_REGULATOR_VEXPRESS) += vexpress-regulator.o
++obj-$(CONFIG_REGULATOR_VQMMC_IPQ4019) += vqmmc-ipq4019-regulator.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
+--- /dev/null
++++ b/drivers/regulator/vqmmc-ipq4019-regulator.c
+@@ -0,0 +1,101 @@
++// SPDX-License-Identifier: GPL-2.0+
++//
++// Copyright (c) 2019 Mantas Pucka <mantas@8devices.com>
++// Copyright (c) 2019 Robert Marko <robert.marko@sartura.hr>
++//
++// Driver for IPQ4019 SD/MMC controller's I/O LDO voltage regulator
++
++#include <linux/io.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++#include <linux/regulator/driver.h>
++#include <linux/regulator/machine.h>
++#include <linux/regulator/of_regulator.h>
++
++static const unsigned int ipq4019_vmmc_voltages[] = {
++ 1500000, 1800000, 2500000, 3000000,
++};
++
++static const struct regulator_ops ipq4019_regulator_voltage_ops = {
++ .list_voltage = regulator_list_voltage_table,
++ .map_voltage = regulator_map_voltage_ascend,
++ .get_voltage_sel = regulator_get_voltage_sel_regmap,
++ .set_voltage_sel = regulator_set_voltage_sel_regmap,
++};
++
++static const struct regulator_desc vmmc_regulator = {
++ .name = "vmmcq",
++ .ops = &ipq4019_regulator_voltage_ops,
++ .type = REGULATOR_VOLTAGE,
++ .owner = THIS_MODULE,
++ .volt_table = ipq4019_vmmc_voltages,
++ .n_voltages = ARRAY_SIZE(ipq4019_vmmc_voltages),
++ .vsel_reg = 0,
++ .vsel_mask = 0x3,
++};
++
++static const struct regmap_config ipq4019_vmmcq_regmap_config = {
++ .reg_bits = 32,
++ .reg_stride = 4,
++ .val_bits = 32,
++};
++
++static int ipq4019_regulator_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct regulator_init_data *init_data;
++ struct regulator_config cfg = {};
++ struct regulator_dev *rdev;
++ struct resource *res;
++ struct regmap *rmap;
++ void __iomem *base;
++
++ init_data = of_get_regulator_init_data(dev, dev->of_node,
++ &vmmc_regulator);
++ if (!init_data)
++ return -EINVAL;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ base = devm_ioremap_resource(dev, res);
++ if (IS_ERR(base))
++ return PTR_ERR(base);
++
++ rmap = devm_regmap_init_mmio(dev, base, &ipq4019_vmmcq_regmap_config);
++ if (IS_ERR(rmap))
++ return PTR_ERR(rmap);
++
++ cfg.dev = dev;
++ cfg.init_data = init_data;
++ cfg.of_node = dev->of_node;
++ cfg.regmap = rmap;
++
++ rdev = devm_regulator_register(dev, &vmmc_regulator, &cfg);
++ if (IS_ERR(rdev)) {
++ dev_err(dev, "Failed to register regulator: %ld\n",
++ PTR_ERR(rdev));
++ return PTR_ERR(rdev);
++ }
++ platform_set_drvdata(pdev, rdev);
++
++ return 0;
++}
++
++static const struct of_device_id regulator_ipq4019_of_match[] = {
++ { .compatible = "qcom,vqmmc-ipq4019-regulator", },
++ {},
++};
++
++static struct platform_driver ipq4019_regulator_driver = {
++ .probe = ipq4019_regulator_probe,
++ .driver = {
++ .name = "vqmmc-ipq4019-regulator",
++ .of_match_table = of_match_ptr(regulator_ipq4019_of_match),
++ },
++};
++module_platform_driver(ipq4019_regulator_driver);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Mantas Pucka <mantas@8devices.com>");
++MODULE_DESCRIPTION("IPQ4019 VQMMC voltage regulator");
--- /dev/null
+From 04b3b72b5b8fdb883bfdc619cb29b03641b1cc6a Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Thu, 15 Aug 2019 19:28:23 +0200
+Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
+
+IPQ4019 has a built in SD/eMMC controller which is supported by the
+SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
+So lets add the appropriate node for it.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -214,6 +214,18 @@
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ sdhci: sdhci@7824900 {
++ compatible = "qcom,sdhci-msm-v4";
++ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
++ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "hc_irq", "pwr_irq";
++ bus-width = <8>;
++ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
++ <&gcc GCC_DCD_XO_CLK>;
++ clock-names = "core", "iface", "xo";
++ status = "disabled";
++ };
++
+ blsp_dma: dma@7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07884000 0x23000>;
--- /dev/null
+From 77d9b11ae7269dcf376c3b9493209f712524e986 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 22 Jan 2020 12:56:35 +0100
+Subject: [PATCH] arm: dts: IPQ4019: add SDHCI VQMMC LDO node
+
+Since we now have driver for the SDHCI VQMMC LDO needed
+for I/0 voltage levels lets introduce the necessary node for it.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -214,6 +214,16 @@
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ vqmmc: regulator@1948000 {
++ compatible = "qcom,vqmmc-ipq4019-regulator";
++ reg = <0x01948000 0x4>;
++ regulator-name = "vqmmc";
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-always-on;
++ status = "disabled";
++ };
++
+ sdhci: sdhci@7824900 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
--- /dev/null
+From 0e28623a11f3916c1fe5b7e789c7ab8ca932a929 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Wed, 22 Jan 2020 13:02:13 +0100
+Subject: [PATCH] mmc: sdhci: sdhci-msm: use sdhci_set_clock instead of
+ sdhci_msm_set_clock
+
+When using sdhci_msm_set_clock clock setting will fail, so lets
+use the generic sdhci_set_clock.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/mmc/host/sdhci-msm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-msm.c
++++ b/drivers/mmc/host/sdhci-msm.c
+@@ -1688,7 +1688,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
+
+ static const struct sdhci_ops sdhci_msm_ops = {
+ .reset = sdhci_reset,
+- .set_clock = sdhci_msm_set_clock,
++ .set_clock = sdhci_set_clock,
+ .get_min_clock = sdhci_msm_get_min_clock,
+ .get_max_clock = sdhci_msm_get_max_clock,
+ .set_bus_width = sdhci_set_bus_width,
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -571,6 +571,34 @@
+@@ -593,6 +593,34 @@
status = "disabled";
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -599,6 +599,29 @@
+@@ -621,6 +621,29 @@
};
};
};
cpus {
-@@ -622,6 +624,64 @@
+@@ -644,6 +646,64 @@
status = "disabled";
};
--- /dev/null
+From 97043d292365ae39d62b54a6d79dff98d048b501 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 22 Jan 2020 12:44:14 +0100
+Subject: [PATCH] From ebf652b408200504194be32ad0a3f5bb49d6000a Mon Sep 17
+ 00:00:00 2001 From: Robert Marko <robert.marko@sartura.hr> Date: Sun, 12 Jan
+ 2020 12:30:01 +0100 Subject: [PATCH] regulator: add IPQ4019 SDHCI VQMMC LDO
+ driver
+
+This introduces the IPQ4019 VQMMC LDO driver needed for
+the SD/EMMC driver I/O level operation.
+This will enable introducing SD/EMMC support for the built-in controller.
+
+Signed-off-by: Mantas Pucka <mantas@8devices.com>
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Link: https://lore.kernel.org/r/20200112113003.11110-1-robert.marko@sartura.hr
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/regulator/Kconfig | 7 ++
+ drivers/regulator/Makefile | 1 +
+ drivers/regulator/vqmmc-ipq4019-regulator.c | 101 ++++++++++++++++++++
+ 3 files changed, 109 insertions(+)
+ create mode 100644 drivers/regulator/vqmmc-ipq4019-regulator.c
+
+--- a/drivers/regulator/Kconfig
++++ b/drivers/regulator/Kconfig
+@@ -1077,6 +1077,13 @@ config REGULATOR_VEXPRESS
+ This driver provides support for voltage regulators available
+ on the ARM Ltd's Versatile Express platform.
+
++config REGULATOR_VQMMC_IPQ4019
++ tristate "IPQ4019 VQMMC SD LDO regulator support"
++ depends on ARCH_QCOM
++ help
++ This driver provides support for the VQMMC LDO I/0
++ voltage regulator of the IPQ4019 SD/EMMC controller.
++
+ config REGULATOR_WM831X
+ tristate "Wolfson Microelectronics WM831x PMIC regulators"
+ depends on MFD_WM831X
+--- a/drivers/regulator/Makefile
++++ b/drivers/regulator/Makefile
+@@ -132,6 +132,7 @@ obj-$(CONFIG_REGULATOR_TWL4030) += twl-r
+ obj-$(CONFIG_REGULATOR_UNIPHIER) += uniphier-regulator.o
+ obj-$(CONFIG_REGULATOR_VCTRL) += vctrl-regulator.o
+ obj-$(CONFIG_REGULATOR_VEXPRESS) += vexpress-regulator.o
++obj-$(CONFIG_REGULATOR_VQMMC_IPQ4019) += vqmmc-ipq4019-regulator.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
+ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
+--- /dev/null
++++ b/drivers/regulator/vqmmc-ipq4019-regulator.c
+@@ -0,0 +1,101 @@
++// SPDX-License-Identifier: GPL-2.0+
++//
++// Copyright (c) 2019 Mantas Pucka <mantas@8devices.com>
++// Copyright (c) 2019 Robert Marko <robert.marko@sartura.hr>
++//
++// Driver for IPQ4019 SD/MMC controller's I/O LDO voltage regulator
++
++#include <linux/io.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++#include <linux/regulator/driver.h>
++#include <linux/regulator/machine.h>
++#include <linux/regulator/of_regulator.h>
++
++static const unsigned int ipq4019_vmmc_voltages[] = {
++ 1500000, 1800000, 2500000, 3000000,
++};
++
++static const struct regulator_ops ipq4019_regulator_voltage_ops = {
++ .list_voltage = regulator_list_voltage_table,
++ .map_voltage = regulator_map_voltage_ascend,
++ .get_voltage_sel = regulator_get_voltage_sel_regmap,
++ .set_voltage_sel = regulator_set_voltage_sel_regmap,
++};
++
++static const struct regulator_desc vmmc_regulator = {
++ .name = "vmmcq",
++ .ops = &ipq4019_regulator_voltage_ops,
++ .type = REGULATOR_VOLTAGE,
++ .owner = THIS_MODULE,
++ .volt_table = ipq4019_vmmc_voltages,
++ .n_voltages = ARRAY_SIZE(ipq4019_vmmc_voltages),
++ .vsel_reg = 0,
++ .vsel_mask = 0x3,
++};
++
++static const struct regmap_config ipq4019_vmmcq_regmap_config = {
++ .reg_bits = 32,
++ .reg_stride = 4,
++ .val_bits = 32,
++};
++
++static int ipq4019_regulator_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct regulator_init_data *init_data;
++ struct regulator_config cfg = {};
++ struct regulator_dev *rdev;
++ struct resource *res;
++ struct regmap *rmap;
++ void __iomem *base;
++
++ init_data = of_get_regulator_init_data(dev, dev->of_node,
++ &vmmc_regulator);
++ if (!init_data)
++ return -EINVAL;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ base = devm_ioremap_resource(dev, res);
++ if (IS_ERR(base))
++ return PTR_ERR(base);
++
++ rmap = devm_regmap_init_mmio(dev, base, &ipq4019_vmmcq_regmap_config);
++ if (IS_ERR(rmap))
++ return PTR_ERR(rmap);
++
++ cfg.dev = dev;
++ cfg.init_data = init_data;
++ cfg.of_node = dev->of_node;
++ cfg.regmap = rmap;
++
++ rdev = devm_regulator_register(dev, &vmmc_regulator, &cfg);
++ if (IS_ERR(rdev)) {
++ dev_err(dev, "Failed to register regulator: %ld\n",
++ PTR_ERR(rdev));
++ return PTR_ERR(rdev);
++ }
++ platform_set_drvdata(pdev, rdev);
++
++ return 0;
++}
++
++static const struct of_device_id regulator_ipq4019_of_match[] = {
++ { .compatible = "qcom,vqmmc-ipq4019-regulator", },
++ {},
++};
++
++static struct platform_driver ipq4019_regulator_driver = {
++ .probe = ipq4019_regulator_probe,
++ .driver = {
++ .name = "vqmmc-ipq4019-regulator",
++ .of_match_table = of_match_ptr(regulator_ipq4019_of_match),
++ },
++};
++module_platform_driver(ipq4019_regulator_driver);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Mantas Pucka <mantas@8devices.com>");
++MODULE_DESCRIPTION("IPQ4019 VQMMC voltage regulator");
--- /dev/null
+From 04b3b72b5b8fdb883bfdc619cb29b03641b1cc6a Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Thu, 15 Aug 2019 19:28:23 +0200
+Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
+
+IPQ4019 has a built in SD/eMMC controller which is supported by the
+SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
+So lets add the appropriate node for it.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -209,6 +209,18 @@
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ sdhci: sdhci@7824900 {
++ compatible = "qcom,sdhci-msm-v4";
++ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
++ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "hc_irq", "pwr_irq";
++ bus-width = <8>;
++ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
++ <&gcc GCC_DCD_XO_CLK>;
++ clock-names = "core", "iface", "xo";
++ status = "disabled";
++ };
++
+ blsp_dma: dma@7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07884000 0x23000>;
--- /dev/null
+From 77d9b11ae7269dcf376c3b9493209f712524e986 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Wed, 22 Jan 2020 12:56:35 +0100
+Subject: [PATCH] arm: dts: IPQ4019: add SDHCI VQMMC LDO node
+
+Since we now have driver for the SDHCI VQMMC LDO needed
+for I/0 voltage levels lets introduce the necessary node for it.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -209,6 +209,16 @@
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ vqmmc: regulator@1948000 {
++ compatible = "qcom,vqmmc-ipq4019-regulator";
++ reg = <0x01948000 0x4>;
++ regulator-name = "vqmmc";
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-always-on;
++ status = "disabled";
++ };
++
+ sdhci: sdhci@7824900 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
--- /dev/null
+From 0e28623a11f3916c1fe5b7e789c7ab8ca932a929 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Wed, 22 Jan 2020 13:02:13 +0100
+Subject: [PATCH] mmc: sdhci: sdhci-msm: use sdhci_set_clock instead of
+ sdhci_msm_set_clock
+
+When using sdhci_msm_set_clock clock setting will fail, so lets
+use the generic sdhci_set_clock.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+---
+ drivers/mmc/host/sdhci-msm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/mmc/host/sdhci-msm.c
++++ b/drivers/mmc/host/sdhci-msm.c
+@@ -1724,7 +1724,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
+
+ static const struct sdhci_ops sdhci_msm_ops = {
+ .reset = sdhci_reset,
+- .set_clock = sdhci_msm_set_clock,
++ .set_clock = sdhci_set_clock,
+ .get_min_clock = sdhci_msm_get_min_clock,
+ .get_max_clock = sdhci_msm_get_max_clock,
+ .set_bus_width = sdhci_set_bus_width,
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -566,6 +566,34 @@
+@@ -588,6 +588,34 @@
status = "disabled";
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -594,6 +594,29 @@
+@@ -616,6 +616,29 @@
};
};
};
cpus {
-@@ -617,6 +619,64 @@
+@@ -639,6 +641,64 @@
status = "disabled";
};
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -677,6 +677,53 @@
+@@ -699,6 +699,53 @@
};
};
projects / openwrt / staging / neocturne.git / commitdiff