drm/amdgpu: rename amdgpu_gfx_compute_mqd_sw_init
authorHawking Zhang <Hawking.Zhang@amd.com>
Wed, 1 Aug 2018 04:03:20 +0000 (12:03 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Jun 2019 02:20:51 +0000 (21:20 -0500)
The function now will create mqd bos for both gfx queue and compute queue

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 827eb53c9649cdb11a6987b4e1c9f593e3ecdc98..15e9f120ff842f06b713f5b65c244d6cf4573ea6 100644 (file)
@@ -360,9 +360,9 @@ int amdgpu_gfx_kiq_init(struct amdgpu_device *adev,
        return 0;
 }
 
-/* create MQD for each compute queue */
-int amdgpu_gfx_compute_mqd_sw_init(struct amdgpu_device *adev,
-                                  unsigned mqd_size)
+/* create MQD for each compute/gfx queue */
+int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
+                          unsigned mqd_size)
 {
        struct amdgpu_ring *ring = NULL;
        int r, i;
@@ -411,7 +411,7 @@ int amdgpu_gfx_compute_mqd_sw_init(struct amdgpu_device *adev,
        return 0;
 }
 
-void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev)
+void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev)
 {
        struct amdgpu_ring *ring = NULL;
        int i;
index ce543bb969ad4147e63929f367bfbd36ad225a29..f2441c02f9db100c59e3ae3c84ec97917609ec1b 100644 (file)
@@ -330,9 +330,9 @@ void amdgpu_gfx_kiq_fini(struct amdgpu_device *adev);
 int amdgpu_gfx_kiq_init(struct amdgpu_device *adev,
                        unsigned hpd_size);
 
-int amdgpu_gfx_compute_mqd_sw_init(struct amdgpu_device *adev,
-                                  unsigned mqd_size);
-void amdgpu_gfx_compute_mqd_sw_fini(struct amdgpu_device *adev);
+int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
+                          unsigned mqd_size);
+void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev);
 
 void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev);
 void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev);
index 173c3d070ef5bdebc43163efd5b70e3867a9e7cf..c9cc7a25d3cfb861ee3a94aa34c45d5d46aa7c00 100644 (file)
@@ -2042,7 +2042,7 @@ static int gfx_v8_0_sw_init(void *handle)
                return r;
 
        /* create MQD for all compute queues as well as KIQ for SRIOV case */
-       r = amdgpu_gfx_compute_mqd_sw_init(adev, sizeof(struct vi_mqd_allocation));
+       r = amdgpu_gfx_mqd_sw_init(adev, sizeof(struct vi_mqd_allocation));
        if (r)
                return r;
 
@@ -2065,7 +2065,7 @@ static int gfx_v8_0_sw_fini(void *handle)
        for (i = 0; i < adev->gfx.num_compute_rings; i++)
                amdgpu_ring_fini(&adev->gfx.compute_ring[i]);
 
-       amdgpu_gfx_compute_mqd_sw_fini(adev);
+       amdgpu_gfx_mqd_sw_fini(adev);
        amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq);
        amdgpu_gfx_kiq_fini(adev);
 
index e71e0970faeb8339d64ec1a5c1d5834ba47c4302..76a1211ad9eb786abf88e31a3ee1467ca775d5a4 100644 (file)
@@ -1757,7 +1757,7 @@ static int gfx_v9_0_sw_init(void *handle)
                return r;
 
        /* create MQD for all compute queues as wel as KIQ for SRIOV case */
-       r = amdgpu_gfx_compute_mqd_sw_init(adev, sizeof(struct v9_mqd_allocation));
+       r = amdgpu_gfx_mqd_sw_init(adev, sizeof(struct v9_mqd_allocation));
        if (r)
                return r;
 
@@ -1799,7 +1799,7 @@ static int gfx_v9_0_sw_fini(void *handle)
        for (i = 0; i < adev->gfx.num_compute_rings; i++)
                amdgpu_ring_fini(&adev->gfx.compute_ring[i]);
 
-       amdgpu_gfx_compute_mqd_sw_fini(adev);
+       amdgpu_gfx_mqd_sw_fini(adev);
        amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring, &adev->gfx.kiq.irq);
        amdgpu_gfx_kiq_fini(adev);