Manually refresh tsens, PCI and CPR patches to apply and compile.
Then run automatic refresh on rest of the patches.
Signed-off-by: Robert Marko <robimarko@gmail.com>
.max_sensors = 16,
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -531,6 +531,27 @@ static irqreturn_t tsens_irq_thread(int
+@@ -532,6 +532,27 @@ static irqreturn_t tsens_irq_thread(int
return IRQ_HANDLED;
}
+ return tsens_irq_thread(irq, data);
+}
+
- static int tsens_set_trips(void *_sensor, int low, int high)
+ static int tsens_set_trips(struct thermal_zone_device *tz, int low, int high)
{
- struct tsens_sensor *s = _sensor;
-@@ -1081,13 +1102,18 @@ static int tsens_register(struct tsens_p
+ struct tsens_sensor *s = tz->devdata;
+@@ -1074,13 +1095,18 @@ static int tsens_register(struct tsens_p
tsens_mC_to_hw(priv->sensor, 0));
}
}
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
-@@ -495,6 +495,7 @@ enum regfield_ids {
+@@ -493,6 +493,7 @@ enum regfield_ids {
* struct tsens_features - Features supported by the IP
* @ver_major: Major number of IP version
* @crit_int: does the IP support critical interrupts?
* @adc: do the sensors only output adc code (instead of temperature)?
* @srot_split: does the IP neatly splits the register space into SROT and TM,
* with SROT only being available to secure boot firmware?
-@@ -504,6 +505,7 @@ enum regfield_ids {
+@@ -502,6 +503,7 @@ enum regfield_ids {
struct tsens_features {
unsigned int ver_major;
unsigned int crit_int:1;
static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -572,8 +572,8 @@ static int tsens_set_trips(void *_sensor
+@@ -573,8 +573,8 @@ static int tsens_set_trips(struct therma
dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
hw_id, __func__, low, high);
low_val = tsens_mC_to_hw(s, cl_low);
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
-@@ -501,6 +501,8 @@ enum regfield_ids {
+@@ -499,6 +499,8 @@ enum regfield_ids {
* with SROT only being available to secure boot firmware?
* @has_watchdog: does this IP support watchdog functionality?
* @max_sensors: maximum sensors supported by this version of the IP
*/
struct tsens_features {
unsigned int ver_major;
-@@ -510,6 +512,8 @@ struct tsens_features {
+@@ -508,6 +510,8 @@ struct tsens_features {
unsigned int srot_split:1;
unsigned int has_watchdog:1;
unsigned int max_sensors;
.num_sensors = 13,
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
-@@ -991,6 +991,9 @@ static const struct of_device_id tsens_t
+@@ -981,6 +981,9 @@ static const struct of_device_id tsens_t
.compatible = "qcom,ipq8064-tsens",
.data = &data_8960,
}, {
}, {
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
-@@ -599,6 +599,6 @@ extern struct tsens_plat_data data_8916,
+@@ -597,6 +597,6 @@ extern struct tsens_plat_data data_8916,
extern struct tsens_plat_data data_tsens_v1, data_8976, data_8956;
/* TSENS v2 targets */
/ {
model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
-@@ -82,6 +83,7 @@
+@@ -84,6 +85,7 @@
&sdhc_1 {
status = "okay";
/ {
model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
-@@ -50,12 +51,12 @@
+@@ -52,12 +53,12 @@
&pcie0 {
status = "okay";
-From 76893579a74e7e5c79f0c717d95d13f4cbbb5f4d Mon Sep 17 00:00:00 2001
+From f356132229b18ceef5d5ef9103bbaa9bdeb84c8d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
-Date: Sat, 24 Dec 2022 17:11:16 +0100
-Subject: [PATCH] PCI: qcom: Add support for IPQ8074 Gen3 port
+Date: Fri, 13 Jan 2023 17:44:47 +0100
+Subject: [PATCH] PCI: qcom: Add IPQ8074 Gen3 port support
IPQ8074 has one Gen2 and one Gen3 port, with Gen2 port already supported.
Add compatible for Gen3 port which uses the same controller as IPQ6018.
+Link: https://lore.kernel.org/r/20230113164449.906002-7-robimarko@gmail.com
Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -1733,6 +1733,7 @@ static const struct of_device_id qcom_pc
- { .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg },
- { .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg },
- { .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg },
-+ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &ipq6018_cfg },
- { .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg },
- { .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },
- { .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
+@@ -1745,6 +1745,7 @@ static const struct of_device_id qcom_pc
+ { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 },
+ { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },
+ { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 },
++ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 },
+ { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 },
+ { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 },
+ { .compatible = "qcom,pcie-sa8540p", .data = &cfg_1_9_0 },
if (ret)
goto free_rproc;
}
-@@ -1086,6 +1112,7 @@ static int q6v5_wcss_remove(struct platf
+@@ -1087,6 +1113,7 @@ static int q6v5_wcss_remove(struct platf
}
static const struct wcss_data wcss_ipq8074_res_init = {
.firmware_name = "IPQ8074/q6_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
-@@ -1095,6 +1122,8 @@ static const struct wcss_data wcss_ipq80
+@@ -1096,6 +1123,8 @@ static const struct wcss_data wcss_ipq80
};
static const struct wcss_data wcss_qcs404_res_init = {
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
-@@ -1119,6 +1155,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1120,6 +1156,7 @@ static const struct wcss_data wcss_ipq80
.wcss_q6_reset_required = true,
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
-@@ -1149,7 +1173,8 @@ static int q6v5_wcss_remove(struct platf
+@@ -1150,7 +1174,8 @@ static int q6v5_wcss_remove(struct platf
static const struct wcss_data wcss_ipq8074_res_init = {
.init_clock = ipq8074_init_clock,
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
-@@ -1162,7 +1187,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1163,7 +1188,7 @@ static const struct wcss_data wcss_qcs40
.init_clock = qcs404_init_clock,
.init_regulator = qcs404_init_regulator,
.crash_reason_smem = WCSS_CRASH_REASON,
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
-@@ -1178,6 +1178,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1179,6 +1179,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
return 0;
}
-@@ -1178,6 +1182,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1179,6 +1183,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
.ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
-@@ -1192,6 +1197,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1193,6 +1198,7 @@ static const struct wcss_data wcss_qcs40
.version = WCSS_QCS404,
.aon_reset_required = false,
.wcss_q6_reset_required = false,
};
static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
-@@ -1151,6 +1152,7 @@ static int q6v5_wcss_probe(struct platfo
+@@ -1150,6 +1151,7 @@ static int q6v5_wcss_probe(struct platfo
desc->sysmon_name,
desc->ssctl_id);
ret = rproc_add(rproc);
if (ret)
goto free_rproc;
-@@ -1187,6 +1189,7 @@ static const struct wcss_data wcss_ipq80
+@@ -1188,6 +1190,7 @@ static const struct wcss_data wcss_ipq80
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
.need_mem_protection = true,
};
static const struct wcss_data wcss_qcs404_res_init = {
-@@ -1203,6 +1206,7 @@ static const struct wcss_data wcss_qcs40
+@@ -1204,6 +1207,7 @@ static const struct wcss_data wcss_qcs40
.ssctl_id = 0x12,
.ops = &q6v5_wcss_qcs404_ops,
.requires_force_stop = false,
#ifdef CONFIG_DEBUG_FS
#define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
#define SMEM_IMAGE_VERSION_SIZE 4096
-@@ -105,54 +97,6 @@ static const char *const pmic_models[] =
+@@ -116,54 +108,6 @@ static const char *const pmic_models[] =
};
#endif /* CONFIG_DEBUG_FS */
enum _msm_id {
MSM8996V3 = 0xF6ul,
-@@ -145,17 +144,14 @@ static void get_krait_bin_format_b(struc
+@@ -143,17 +142,14 @@ static void get_krait_bin_format_b(struc
static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
{
size_t len;
enum _msm8996_version {
MSM8996_V3,
-@@ -152,12 +147,12 @@ static enum _msm8996_version qcom_cpufre
+@@ -150,12 +145,12 @@ static enum _msm8996_version qcom_cpufre
return NUM_OF_MSM8996_VERSIONS;
switch (info->id) {
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
-@@ -136,30 +130,16 @@ static void get_krait_bin_format_b(struc
+@@ -134,30 +128,16 @@ static void get_krait_bin_format_b(struc
dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver);
}
}
static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
-@@ -168,25 +148,25 @@ static int qcom_cpufreq_kryo_name_versio
+@@ -166,25 +146,25 @@ static int qcom_cpufreq_kryo_name_versio
struct qcom_cpufreq_drv *drv)
{
size_t len;
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -159,6 +159,7 @@ static const struct of_device_id blockli
+@@ -164,6 +164,7 @@ static const struct of_device_id blockli
{ .compatible = "ti,omap3", },
{ .compatible = "qcom,ipq8064", },
struct qcom_cpufreq_drv;
struct qcom_cpufreq_match_data {
-@@ -218,6 +221,37 @@ len_error:
+@@ -216,6 +219,37 @@ len_error:
return ret;
}
static const struct qcom_cpufreq_match_data match_data_kryo = {
.get_version = qcom_cpufreq_kryo_name_version,
};
-@@ -232,6 +266,10 @@ static const struct qcom_cpufreq_match_d
+@@ -230,6 +264,10 @@ static const struct qcom_cpufreq_match_d
.genpd_names = qcs404_genpd_names,
};
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
-@@ -431,6 +469,7 @@ static const struct of_device_id qcom_cp
+@@ -375,6 +413,7 @@ static const struct of_device_id qcom_cp
{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
-From 303fb163bb86f04432c93325ff8b9638c9e50641 Mon Sep 17 00:00:00 2001
+From c9df32c057e43e38c8113199e64f7a64f8d341df Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 11 Apr 2022 14:35:36 +0200
Subject: [PATCH] regulator: add Qualcomm CPR regulators
-Add Qualcomm CPR driver, which allows using the CPR HW to calculate the
-correct OPP point voltage dynamically based on the system load.
+Allow building Qualcomm CPR regulators.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/regulator/Kconfig | 33 +
drivers/regulator/Makefile | 3 +
drivers/regulator/cpr3-npu-regulator.c | 695 +++
- drivers/regulator/cpr3-regulator.c | 5112 +++++++++++++++++++++++
+ drivers/regulator/cpr3-regulator.c | 5111 +++++++++++++++++++++++
drivers/regulator/cpr3-regulator.h | 1211 ++++++
drivers/regulator/cpr3-util.c | 2750 ++++++++++++
drivers/regulator/cpr4-apss-regulator.c | 1819 ++++++++
include/soc/qcom/socinfo.h | 463 ++
- 8 files changed, 12086 insertions(+)
+ 8 files changed, 12085 insertions(+)
create mode 100644 drivers/regulator/cpr3-npu-regulator.c
create mode 100644 drivers/regulator/cpr3-regulator.c
create mode 100644 drivers/regulator/cpr3-regulator.h
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
-@@ -1423,5 +1423,38 @@ config REGULATOR_QCOM_LABIBB
+@@ -1524,4 +1524,37 @@ config REGULATOR_QCOM_LABIBB
boost regulator and IBB can be used as a negative boost regulator
for LCD display panel.
+ voltage and CPR target quotient values out of hardware fuses.
+
endif
-
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
-@@ -105,6 +105,9 @@ obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qco
+@@ -110,6 +110,9 @@ obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qco
obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o
obj-$(CONFIG_REGULATOR_QCOM_SPMI) += qcom_spmi-regulator.o
obj-$(CONFIG_REGULATOR_QCOM_USB_VBUS) += qcom_usb_vbus-regulator.o
+MODULE_ALIAS("platform:npu-ipq807x");
--- /dev/null
+++ b/drivers/regulator/cpr3-regulator.c
-@@ -0,0 +1,5112 @@
+@@ -0,0 +1,5111 @@
+/*
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ config.init_data = init_data;
+ config.of_node = vreg->of_node;
+
-+ vreg->rdev = regulator_register(rdesc, &config);
++ vreg->rdev = regulator_register(vreg->thread->ctrl->dev, rdesc, &config);
+ if (IS_ERR(vreg->rdev)) {
+ rc = PTR_ERR(vreg->rdev);
+ cpr3_err(vreg, "regulator_register failed, rc=%d\n", rc);
+ .open = cpr3_debug_quot_open,
+ .release = cpr3_debug_quot_release,
+ .read = cpr3_debug_quot_read,
-+ .llseek = no_llseek,
+};
+
+/**
projects / openwrt / staging / dangole.git / commitdiff