drm/i915: apply DP bandwidth workaround for PCH eDP as well

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141 though the
workaround itself is still a bit of a mystery.

Tested-by: Adam Hill <sidepipeuk@yahoo.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c612981e6195be70c914186866172fc36aa59332..5a11a2bada37a1bb7031196ee9ba5beef38f2d7e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -534,7 +534,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
                }
        }
 
-       if (IS_eDP(intel_encoder)) {
+       if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
                /* okay we failed just pick the highest */
                dp_priv->lane_count = max_lane_count;
                dp_priv->link_bw = bws[max_clock];