#define PNL_2_PRI ((0 << PNL_2_OFFSET) | PNL_2_USAGE)
#define PNL_2_SEC ((2 << PNL_2_OFFSET) | PNL_2_USAGE)
-
/*
* primary timing & plane enable bit
* 1: 80000[8] & 80000[2] on
#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET) | PRI_TP_USAGE)
#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET) | PRI_TP_USAGE)
-
/*
* panel sequency status
* 80000[27:24]
#define CRT_2_PRI ((0x0 << CRT_2_OFFSET) | CRT_2_USAGE)
#define CRT_2_SEC ((0x2 << CRT_2_OFFSET) | CRT_2_USAGE)
-
/*
* DAC affect both DVI and DSUB
* 4[20]
#define DPMS_OFF ((3 << DPMS_OFFSET) | DPMS_USAGE)
#define DPMS_ON ((0 << DPMS_OFFSET) | DPMS_USAGE)
-
-
/*
* LCD1 means panel path TFT1 & panel path DVI (so enable DAC)
* CRT means crt path DSUB
#include "ddk750_dvi.h"
#include "ddk750_sii164.h"
-
/*
* This global variable contains all the supported driver and its corresponding
* function API. Please set the function pointer to NULL whenever the function
#endif
};
-
int dviInit(
unsigned char edgeSelect,
unsigned char busSelect,
}
#endif
-
-
return dispControl;
}
-
-
/* only timing related registers will be programed */
static int programModeRegisters(mode_parameter_t *pModeParam,
struct pll_value *pll)
((pModeParam->vertical_sync_start - 1) &
CRT_VERTICAL_SYNC_START_MASK));
-
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
if (pModeParam->vertical_sync_polarity)
tmp |= DISPLAY_CTRL_VSYNC_PHASE;
programModeRegisters(parm, &pll);
return 0;
}
-
-
}
spolarity_t;
-
typedef struct _mode_parameter_t {
/* Horizontal timing. */
unsigned long horizontal_total;
int ddk750_setModeTiming(mode_parameter_t *, clock_type_t);
-
#endif
return peek32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
}
-
/*
* SM50x can operate in one of three modes: 0, 1 or Sleep.
* On hardware reset, power mode 0 is default.
poke32(MODE0_GATE, gate);
}
-
-
/*
* This function enable/disable the 2D engine.
*/
sm750_set_current_gate(gate);
}
-
-
*/
void sm750_enable_i2c(unsigned int enable);
-
#endif
#define GPIO_INTERRUPT_STATUS_26 BIT(17)
#define GPIO_INTERRUPT_STATUS_25 BIT(16)
-
#define PANEL_DISPLAY_CTRL 0x080000
#define PANEL_DISPLAY_CTRL_RESERVED_MASK 0xc0f08000
#define PANEL_DISPLAY_CTRL_SELECT_SHIFT 28
#define I2C_DATA14 0x010052
#define I2C_DATA15 0x010053
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#define ZV0_CAPTURE_CTRL 0x090000
#define ZV0_CAPTURE_CTRL_FIELD_INPUT BIT(27)
#define ZV0_CAPTURE_CTRL_SCAN BIT(26)
#define DEFAULT_I2C_SCL 30
#define DEFAULT_I2C_SDA 31
-
#define GPIO_DATA_SM750LE 0x020018
#define GPIO_DATA_SM750LE_1 BIT(1)
#define GPIO_DATA_SM750LE_0 BIT(0)
#define GPIO_DATA_DIRECTION_SM750LE_1 BIT(1)
#define GPIO_DATA_DIRECTION_SM750LE_0 BIT(0)
-
#endif