clk: renesas: r8a7796: Add GPIO clocks
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Wed, 17 Aug 2016 11:31:50 +0000 (13:31 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 19 Aug 2016 07:38:40 +0000 (09:38 +0200)
Add GPIO clocks for the R8A7796 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c

index c0dee762ed23bfc477ae1b0523e63c8f3faaa6ba..999955c2b23ea8d39639e46abbe070f2892d5301 100644 (file)
@@ -106,6 +106,14 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("scif2",                 310,   R8A7796_CLK_S3D4),
        DEF_MOD("rwdt0",                 402,   R8A7796_CLK_R),
        DEF_MOD("intc-ap",               408,   R8A7796_CLK_S3D1),
+       DEF_MOD("gpio7",                 905,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio6",                 906,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio5",                 907,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio4",                 908,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio3",                 909,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio2",                 910,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio1",                 911,   R8A7796_CLK_S3D4),
+       DEF_MOD("gpio0",                 912,   R8A7796_CLK_S3D4),
 };
 
 static const unsigned int r8a7796_crit_mod_clks[] __initconst = {