staging: comedi: aio_aio12_8: prefer using the BIT macro

As suggested by checkpatch.pl, use the BIT macro to define the
register bits.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/aio_aio12_8.c b/drivers/staging/comedi/drivers/aio_aio12_8.c
index fbc3e5aa94cb908e6b5964a95dbc36e3864a78f4..84f8c49e31747ab52764aed32d13fcc047333099 100644 (file)
--- a/drivers/staging/comedi/drivers/aio_aio12_8.c
+++ b/drivers/staging/comedi/drivers/aio_aio12_8.c
@@ -43,39 +43,41 @@ Notes:
  * Register map
  */
 #define AIO12_8_STATUS_REG             0x00
-#define AIO12_8_STATUS_ADC_EOC         (1 << 7)
-#define AIO12_8_STATUS_PORT_C_COS      (1 << 6)
-#define AIO12_8_STATUS_IRQ_ENA         (1 << 2)
+#define AIO12_8_STATUS_ADC_EOC         BIT(7)
+#define AIO12_8_STATUS_PORT_C_COS      BIT(6)
+#define AIO12_8_STATUS_IRQ_ENA         BIT(2)
 #define AIO12_8_INTERRUPT_REG          0x01
-#define AIO12_8_INTERRUPT_ADC          (1 << 7)
-#define AIO12_8_INTERRUPT_COS          (1 << 6)
-#define AIO12_8_INTERRUPT_COUNTER1     (1 << 5)
-#define AIO12_8_INTERRUPT_PORT_C3      (1 << 4)
-#define AIO12_8_INTERRUPT_PORT_C0      (1 << 3)
-#define AIO12_8_INTERRUPT_ENA          (1 << 2)
+#define AIO12_8_INTERRUPT_ADC          BIT(7)
+#define AIO12_8_INTERRUPT_COS          BIT(6)
+#define AIO12_8_INTERRUPT_COUNTER1     BIT(5)
+#define AIO12_8_INTERRUPT_PORT_C3      BIT(4)
+#define AIO12_8_INTERRUPT_PORT_C0      BIT(3)
+#define AIO12_8_INTERRUPT_ENA          BIT(2)
 #define AIO12_8_ADC_REG                        0x02
-#define AIO12_8_ADC_MODE_NORMAL                (0 << 6)
-#define AIO12_8_ADC_MODE_INT_CLK       (1 << 6)
-#define AIO12_8_ADC_MODE_STANDBY       (2 << 6)
-#define AIO12_8_ADC_MODE_POWERDOWN     (3 << 6)
-#define AIO12_8_ADC_ACQ_3USEC          (0 << 5)
-#define AIO12_8_ADC_ACQ_PROGRAM                (1 << 5)
+#define AIO12_8_ADC_MODE(x)            (((x) & 0x3) << 6)
+#define AIO12_8_ADC_MODE_NORMAL                AIO12_8_ADC_MODE(0)
+#define AIO12_8_ADC_MODE_INT_CLK       AIO12_8_ADC_MODE(1)
+#define AIO12_8_ADC_MODE_STANDBY       AIO12_8_ADC_MODE(2)
+#define AIO12_8_ADC_MODE_POWERDOWN     AIO12_8_ADC_MODE(3)
+#define AIO12_8_ADC_ACQ(x)             (((x) & 0x1) << 5)
+#define AIO12_8_ADC_ACQ_3USEC          AIO12_8_ADC_ACQ(0)
+#define AIO12_8_ADC_ACQ_PROGRAM                AIO12_8_ADC_ACQ(1)
 #define AIO12_8_ADC_RANGE(x)           ((x) << 3)
 #define AIO12_8_ADC_CHAN(x)            ((x) << 0)
 #define AIO12_8_DAC_REG(x)             (0x04 + (x) * 2)
 #define AIO12_8_8254_BASE_REG          0x0c
 #define AIO12_8_8255_BASE_REG          0x10
 #define AIO12_8_DIO_CONTROL_REG                0x14
-#define AIO12_8_DIO_CONTROL_TST                (1 << 0)
+#define AIO12_8_DIO_CONTROL_TST                BIT(0)
 #define AIO12_8_ADC_TRIGGER_REG                0x15
 #define AIO12_8_ADC_TRIGGER_RANGE(x)   ((x) << 3)
 #define AIO12_8_ADC_TRIGGER_CHAN(x)    ((x) << 0)
 #define AIO12_8_TRIGGER_REG            0x16
-#define AIO12_8_TRIGGER_ADTRIG         (1 << 1)
-#define AIO12_8_TRIGGER_DACTRIG                (1 << 0)
+#define AIO12_8_TRIGGER_ADTRIG         BIT(1)
+#define AIO12_8_TRIGGER_DACTRIG                BIT(0)
 #define AIO12_8_COS_REG                        0x17
 #define AIO12_8_DAC_ENABLE_REG         0x18
-#define AIO12_8_DAC_ENABLE_REF_ENA     (1 << 0)
+#define AIO12_8_DAC_ENABLE_REF_ENA     BIT(0)
 
 struct aio12_8_boardtype {
        const char *name;