net/mlx5: Enable setting hairpin queue size
authorOr Gerlitz <ogerlitz@mellanox.com>
Thu, 4 Jan 2018 10:26:21 +0000 (12:26 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 19 Jan 2018 20:41:32 +0000 (22:41 +0200)
Allow to specify the size of the hairpin queues along with the
packet buffer data size from the core setup code.

If the driver doesn't provide this, the FW applies proper value that
matches the provided data size and a FW chosen RQ stride size.

Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/transobj.c
include/linux/mlx5/mlx5_ifc.h
include/linux/mlx5/transobj.h

index 6f90d1fce5c594de021f778c5edce232f6028c2a..9e38343a951f0acf910e3ae0e7be0c8f04160938 100644 (file)
@@ -413,6 +413,7 @@ static int mlx5_hairpin_create_rq(struct mlx5_core_dev *mdev,
        MLX5_SET(rqc, rqc, counter_set_id, params->q_counter);
 
        MLX5_SET(wq, wq, log_hairpin_data_sz, params->log_data_size);
+       MLX5_SET(wq, wq, log_hairpin_num_packets, params->log_num_packets);
 
        return mlx5_core_create_rq(mdev, in, MLX5_ST_SZ_BYTES(create_rq_in), rqn);
 }
@@ -430,6 +431,7 @@ static int mlx5_hairpin_create_sq(struct mlx5_core_dev *mdev,
        MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
 
        MLX5_SET(wq, wq, log_hairpin_data_sz, params->log_data_size);
+       MLX5_SET(wq, wq, log_hairpin_num_packets, params->log_num_packets);
 
        return mlx5_core_create_sq(mdev, in, MLX5_ST_SZ_BYTES(create_sq_in), sqn);
 }
index acd829d8613b70f5a6bfa2c7987eaedbc5ce9484..199bfcd2f2ce02cdc76a64d26cc2de62cf659101 100644 (file)
@@ -1031,7 +1031,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         log_max_hairpin_queues[0x5];
        u8         reserved_at_3c8[0x3];
        u8         log_max_hairpin_wq_data_sz[0x5];
-       u8         reserved_at_3d0[0xb];
+       u8         reserved_at_3d0[0x3];
+       u8         log_max_hairpin_num_packets[0x5];
+       u8         reserved_at_3d8[0x3];
        u8         log_max_wq_sz[0x5];
 
        u8         nic_vport_change_event[0x1];
@@ -1172,7 +1174,9 @@ struct mlx5_ifc_wq_bits {
        u8         reserved_at_118[0x3];
        u8         log_wq_sz[0x5];
 
-       u8         reserved_at_120[0xb];
+       u8         reserved_at_120[0x3];
+       u8         log_hairpin_num_packets[0x5];
+       u8         reserved_at_128[0x3];
        u8         log_hairpin_data_sz[0x5];
        u8         reserved_at_130[0x5];
 
index 1bcd8d5562f072e5462682f5e2ea988f97505cc5..7e8f281f8c0004c22457a18b51ce95856277e4a9 100644 (file)
@@ -77,6 +77,7 @@ void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn);
 
 struct mlx5_hairpin_params {
        u8  log_data_size;
+       u8  log_num_packets;
        u16 q_counter;
        int num_channels;
 };