poke32(CRT_AUTO_CENTERING_TL, 0);
poke32(CRT_AUTO_CENTERING_BR,
- (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) &
- CRT_AUTO_CENTERING_BR_BOTTOM_MASK) |
- ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
+ (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) &
+ CRT_AUTO_CENTERING_BR_BOTTOM_MASK) |
+ ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK));
/*
* Assume common fields in dispControl have been properly set before
}
/* only timing related registers will be programed */
-static int programModeRegisters(mode_parameter_t *pModeParam,
- struct pll_value *pll)
+static int programModeRegisters(mode_parameter_t *pModeParam, struct pll_value *pll)
{
int ret = 0;
int cnt = 0;
/* programe secondary pixel clock */
poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll));
poke32(CRT_HORIZONTAL_TOTAL,
- (((pModeParam->horizontal_total - 1) <<
- CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
- CRT_HORIZONTAL_TOTAL_TOTAL_MASK) |
- ((pModeParam->horizontal_display_end - 1) &
- CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK));
+ (((pModeParam->horizontal_total - 1) <<
+ CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) &
+ CRT_HORIZONTAL_TOTAL_TOTAL_MASK) |
+ ((pModeParam->horizontal_display_end - 1) &
+ CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK));
poke32(CRT_HORIZONTAL_SYNC,
- ((pModeParam->horizontal_sync_width <<
- CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) &
- CRT_HORIZONTAL_SYNC_WIDTH_MASK) |
- ((pModeParam->horizontal_sync_start - 1) &
- CRT_HORIZONTAL_SYNC_START_MASK));
+ ((pModeParam->horizontal_sync_width <<
+ CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) &
+ CRT_HORIZONTAL_SYNC_WIDTH_MASK) |
+ ((pModeParam->horizontal_sync_start - 1) &
+ CRT_HORIZONTAL_SYNC_START_MASK));
poke32(CRT_VERTICAL_TOTAL,
- (((pModeParam->vertical_total - 1) <<
- CRT_VERTICAL_TOTAL_TOTAL_SHIFT) &
- CRT_VERTICAL_TOTAL_TOTAL_MASK) |
- ((pModeParam->vertical_display_end - 1) &
- CRT_VERTICAL_TOTAL_DISPLAY_END_MASK));
+ (((pModeParam->vertical_total - 1) <<
+ CRT_VERTICAL_TOTAL_TOTAL_SHIFT) &
+ CRT_VERTICAL_TOTAL_TOTAL_MASK) |
+ ((pModeParam->vertical_display_end - 1) &
+ CRT_VERTICAL_TOTAL_DISPLAY_END_MASK));
poke32(CRT_VERTICAL_SYNC,
- ((pModeParam->vertical_sync_height <<
- CRT_VERTICAL_SYNC_HEIGHT_SHIFT) &
- CRT_VERTICAL_SYNC_HEIGHT_MASK) |
- ((pModeParam->vertical_sync_start - 1) &
- CRT_VERTICAL_SYNC_START_MASK));
+ ((pModeParam->vertical_sync_height <<
+ CRT_VERTICAL_SYNC_HEIGHT_SHIFT) &
+ CRT_VERTICAL_SYNC_HEIGHT_MASK) |
+ ((pModeParam->vertical_sync_start - 1) &
+ CRT_VERTICAL_SYNC_START_MASK));
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
if (pModeParam->vertical_sync_polarity)
poke32(PANEL_HORIZONTAL_TOTAL, reg);
poke32(PANEL_HORIZONTAL_SYNC,
- ((pModeParam->horizontal_sync_width <<
- PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) &
- PANEL_HORIZONTAL_SYNC_WIDTH_MASK) |
- ((pModeParam->horizontal_sync_start - 1) &
- PANEL_HORIZONTAL_SYNC_START_MASK));
+ ((pModeParam->horizontal_sync_width <<
+ PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) &
+ PANEL_HORIZONTAL_SYNC_WIDTH_MASK) |
+ ((pModeParam->horizontal_sync_start - 1) &
+ PANEL_HORIZONTAL_SYNC_START_MASK));
poke32(PANEL_VERTICAL_TOTAL,
- (((pModeParam->vertical_total - 1) <<
- PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) &
- PANEL_VERTICAL_TOTAL_TOTAL_MASK) |
- ((pModeParam->vertical_display_end - 1) &
- PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK));
+ (((pModeParam->vertical_total - 1) <<
+ PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) &
+ PANEL_VERTICAL_TOTAL_TOTAL_MASK) |
+ ((pModeParam->vertical_display_end - 1) &
+ PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK));
poke32(PANEL_VERTICAL_SYNC,
- ((pModeParam->vertical_sync_height <<
- PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) &
- PANEL_VERTICAL_SYNC_HEIGHT_MASK) |
- ((pModeParam->vertical_sync_start - 1) &
- PANEL_VERTICAL_SYNC_START_MASK));
+ ((pModeParam->vertical_sync_height <<
+ PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) &
+ PANEL_VERTICAL_SYNC_HEIGHT_MASK) |
+ ((pModeParam->vertical_sync_start - 1) &
+ PANEL_VERTICAL_SYNC_START_MASK));
tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE;
if (pModeParam->vertical_sync_polarity)