drm/amdgpu: move get_rev_id at first before load gpu_info firmware
authorHuang Rui <ray.huang@amd.com>
Fri, 15 Jun 2018 21:05:48 +0000 (16:05 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Sep 2018 14:36:04 +0000 (09:36 -0500)
Rev id is used for identifying Raven2 series of chips. So we would better to
initialize it at first.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index e338ad6d0d200f8d8c4601dcbd318917774be862..794cfe4a52d10c0b4c46f6f1c1f2dca19b0b2b3b 100644 (file)
@@ -479,6 +479,11 @@ static const struct amdgpu_ip_block_version vega10_common_ip_block =
        .funcs = &soc15_common_ip_funcs,
 };
 
+static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
+{
+       return adev->nbio_funcs->get_rev_id(adev);
+}
+
 int soc15_set_ip_blocks(struct amdgpu_device *adev)
 {
        /* Set IP register base before any HW register access */
@@ -507,6 +512,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
                adev->df_funcs = &df_v3_6_funcs;
        else
                adev->df_funcs = &df_v1_7_funcs;
+
+       adev->rev_id = soc15_get_rev_id(adev);
        adev->nbio_funcs->detect_hw_virt(adev);
 
        if (amdgpu_sriov_vf(adev))
@@ -581,11 +588,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
        return 0;
 }
 
-static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
-{
-       return adev->nbio_funcs->get_rev_id(adev);
-}
-
 static void soc15_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring)
 {
        adev->nbio_funcs->hdp_flush(adev, ring);
@@ -642,7 +644,6 @@ static int soc15_common_early_init(void *handle)
 
        adev->asic_funcs = &soc15_asic_funcs;
 
-       adev->rev_id = soc15_get_rev_id(adev);
        adev->external_rev_id = 0xFF;
        switch (adev->asic_type) {
        case CHIP_VEGA10: