Example:
- ccn@0x2000000000 {
+ ccn@2000000000 {
compatible = "arm,ccn-504";
reg = <0x20 0x00000000 0 0x1000000>;
interrupts = <0 181 4>;
interrupts = <GIC_SPI request_number interrupt_level>
Example:
- device_x@0x4a023000 {
+ device_x@4a023000 {
/* Crossbar 8 used */
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
...
- interrupts : Should contain MC General interrupt.
Example:
- memory-controller@0x7000f000 {
+ memory-controller@7000f000 {
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;
- clock-output-names : From common clock binding.
Example:
- clock@0xff000000 {
+ clock@ff000000 {
compatible = "adi,axi-clkgen";
#clock-cells = <0>;
reg = <0xff000000 0x1000>;
clocks = <&clk_osc>;
};
- aux: aux@0x7e215004 {
+ aux: aux@7e215004 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
reg = <0x7e215000 0x8>;
Example 1: An example of a clock controller node is listed below.
- clock: clock-controller@0x10030000 {
+ clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
Example 1: An example of a clock controller node is listed below.
- clock: clock-controller@0x10010000 {
+ clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
#clock-cells = <0>;
};
- clock: clock-controller@0x10010000 {
+ clock: clock-controller@10010000 {
compatible = "samsung,exynos5410-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
Example 1: An example of a clock controller node is listed below.
- clock: clock-controller@0x10010000 {
+ clock: clock-controller@10010000 {
compatible = "samsung,exynos5420-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
Example: An example of a clock controller node is listed below.
- clock: clock-controller@0x10010000 {
+ clock: clock-controller@10010000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x10000>;
#clock-cells = <1>;
Example:
-pllctrl: pll-controller@0x02310000 {
+pllctrl: pll-controller@02310000 {
compatible = "ti,keystone-pllctrl", "syscon";
reg = <0x02310000 0x200>;
};
for the full list of zx296702 clock IDs.
-topclk: topcrm@0x09800000 {
+topclk: topcrm@09800000 {
compatible = "zte,zx296702-topcrm-clk";
reg = <0x09800000 0x1000>;
#clock-cells = <1>;
};
-uart0: serial@0x09405000 {
+uart0: serial@09405000 {
compatible = "zte,zx296702-uart";
reg = <0x09405000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
Definition: this is phandle to the register map node.
EXAMPLE:
- snvs-pwrkey@0x020cc000 {
+ snvs-pwrkey@020cc000 {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <0 4 0x4>
interrupts = <93 2>;
};
- snvs-pwrkey@0x020cc000 {
+ snvs-pwrkey@020cc000 {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&sec_mon>;
interrupts = <0 4 0x4>;
- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon";
Example:
- dfi: dfi@0xff630000 {
+ dfi: dfi@ff630000 {
compatible = "rockchip,rk3399-dfi";
reg = <0x00 0xff630000 0x00 0x4000>;
rockchip,pmu = <&pmugrf>;
Example:
- fb0: fb@0x00500000 {
+ fb0: fb@00500000 {
compatible = "atmel,at91sam9g45-lcdc";
reg = <0x00500000 0x1000>;
interrupts = <23 3 0>;
Example for fixed framebuffer memory:
- fb0: fb@0x00500000 {
+ fb0: fb@00500000 {
compatible = "atmel,at91sam9263-lcdc";
reg = <0x00700000 0x1000 0x70000000 0x200000>;
[...]
max-read-transactions = <31>;
channel-reset-timeout-cycles = <0x500>;
- hidma_24: dma-controller@0x5c050000 {
+ hidma_24: dma-controller@5c050000 {
compatible = "qcom,hidma-1.0";
reg = <0 0x5c050000 0x0 0x1000>,
<0 0x5c0b0000 0x0 0x1000>;
Guest OS configuration:
- hidma_24: dma-controller@0x5c050000 {
+ hidma_24: dma-controller@5c050000 {
compatible = "qcom,hidma-1.0";
reg = <0 0x5c050000 0x0 0x1000>,
<0 0x5c0b0000 0x0 0x1000>;
Example:
Controller:
- dma: dma-controller@0x09c00000{
+ dma: dma-controller@09c00000{
compatible = "zte,zx296702-dma";
reg = <0x09c00000 0x1000>;
clocks = <&topclk ZX296702_DMA_ACLK>;
Example:
-gpio_altr: gpio@0xff200000 {
+gpio_altr: gpio@ff200000 {
compatible = "altr,pio-1.0";
reg = <0xff200000 0x10>;
interrupts = <0 45 4>;
Example
/ {
- i2c4: i2c4@0x10054000 {
+ i2c4: i2c4@10054000 {
compatible = "ingenic,jz4780-i2c";
reg = <0x10054000 0x1000>;
Example:
-hp03@0x77 {
+hp03@77 {
compatible = "hoperf,hp03";
reg = <0x77>;
xclr-gpio = <&portc 0 0x0>;
Example:
i2c@80110000 {
- bu21013_tp@0x5c {
+ bu21013_tp@5c {
compatible = "rohm,bu21013_tp";
reg = <0x5c>;
touch-gpio = <&gpio2 20 0x4>;
<0x0 0xe112f000 0 0x02000>,
<0x0 0xe1140000 0 0x10000>,
<0x0 0xe1160000 0 0x10000>;
- v2m0: v2m@0x8000 {
+ v2m0: v2m@8000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0x80000 0 0x1000>;
....
- v2mN: v2m@0x9000 {
+ v2mN: v2m@9000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0x90000 0 0x1000>;
* An interrupt generating device that is wired to a Meta external
* trigger block.
*/
- uart1: uart@0x02004c00 {
+ uart1: uart@02004c00 {
// Interrupt source '5' that is level-sensitive.
// Note that there are only two cells as specified in the
// interrupt parent's '#interrupt-cells' property.
/*
* TZ1090 PDC block
*/
- pdc: pdc@0x02006000 {
+ pdc: pdc@02006000 {
// This is an interrupt controller node.
interrupt-controller;
The following is an example from the SPEAr320 SoC dtsi file.
-shirq: interrupt-controller@0xb3000000 {
+shirq: interrupt-controller@b3000000 {
compatible = "st,spear320-shirq";
reg = <0xb3000000 0x1000>;
interrupts = <28 29 30 1>;
depends on the interrupt controller parent.
Example:
- mbox_tx: mailbox@0x100 {
+ mbox_tx: mailbox@100 {
compatible = "altr,mailbox-1.0";
reg = <0x100 0x8>;
interrupt-parent = < &gic_0 >;
#mbox-cells = <1>;
};
- mbox_rx: mailbox@0x200 {
+ mbox_rx: mailbox@200 {
compatible = "altr,mailbox-1.0";
reg = <0x200 0x8>;
interrupt-parent = < &gic_0 >;
used to give a name to the communication channel to be used by the client user.
Example:
- mclient0: mclient0@0x400 {
+ mclient0: mclient0@400 {
compatible = "client-1.0";
reg = <0x400 0x10>;
mbox-names = "mbox-tx", "mbox-rx";
- brcm,use-bcm-hdr: present if a BCM header precedes each frame.
Example:
- pdc0: iproc-pdc0@0x612c0000 {
+ pdc0: iproc-pdc0@612c0000 {
compatible = "brcm,iproc-pdc-mbox";
reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
Example:
-gsc_0: gsc@0x13e00000 {
+gsc_0: gsc@13e00000 {
compatible = "samsung,exynos5250-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;
"vdec_bus_clk_src";
};
- vcodec_enc: vcodec@0x18002000 {
+ vcodec_enc: vcodec@18002000 {
compatible = "mediatek,mt8173-vcodec-enc";
reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/
<0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/
vin0 = &vin0;
};
- vin0: vin@0xe6ef0000 {
+ vin0: vin@e6ef0000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
reg = <0 0xe6ef0000 0 0x1000>;
};
/* MIPI CSI-2 bus IF sensor */
- s5c73m3: sensor@0x1a {
+ s5c73m3: sensor@1a {
compatible = "samsung,s5c73m3";
reg = <0x1a>;
vddio-supply = <...>;
Example:
-ceu0: ceu@0xfe910000 {
+ceu0: ceu@fe910000 {
compatible = "renesas,sh-mobile-ceu";
reg = <0xfe910000 0xa0>;
interrupt-parent = <&intcs>;
'port' node which may indicate that at any time only one of the following data
pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
- ceu0: ceu@0xfe910000 {
+ ceu0: ceu@fe910000 {
compatible = "renesas,sh-mobile-ceu";
reg = <0xfe910000 0xa0>;
interrupts = <0x880>;
};
};
- i2c0: i2c@0xfff20000 {
+ i2c0: i2c@fff20000 {
...
- ov772x_1: camera@0x21 {
+ ov772x_1: camera@21 {
compatible = "ovti,ov772x";
reg = <0x21>;
vddio-supply = <®ulator1>;
};
};
- imx074: camera@0x1a {
+ imx074: camera@1a {
compatible = "sony,imx074";
reg = <0x1a>;
vddio-supply = <®ulator1>;
};
};
- csi2: csi2@0xffc90000 {
+ csi2: csi2@ffc90000 {
compatible = "renesas,sh-mobile-csi2";
reg = <0xffc90000 0x1000>;
interrupts = <0x17a0>;
Example:
-emif1: emif@0x4c000000 {
+emif1: emif@4c000000 {
compatible = "ti,emif-4d";
ti,hwmods = "emif2";
phy-type = <1>;
Example:
-devctrl: device-state-control@0x02620000 {
+devctrl: device-state-control@02620000 {
compatible = "ti,keystone-devctrl", "syscon";
reg = <0x02620000 0x1000>;
};
- reg : Location and size of bounce buffer
Example:
- smc@0x3404c000 {
+ smc@3404c000 {
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; //1 KiB in SRAM
};
Example:
-sdio2: sdio@0x3f1a0000 {
+sdio2: sdio@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
clocks = <&sdio3_clk>;
Example:
-sdhci0: sdhci@0x18041000 {
+sdhci0: sdhci@18041000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x18041000 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
[hwmod populated DMA resources]
- mmc1: mmc@0x4809c000 {
+ mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
[generic DMA request binding]
- mmc1: mmc@0x4809c000 {
+ mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
label = "bootloader-nor";
reg = <0 0x40000>;
};
- partition@0x40000 {
+ partition@40000 {
label = "params-nor";
reg = <0x40000 0x40000>;
};
- partition@0x80000 {
+ partition@80000 {
label = "kernel-nor";
reg = <0x80000 0x200000>;
};
- partition@0x280000 {
+ partition@280000 {
label = "filesystem-nor";
reg = <0x240000 0x7d80000>;
};
read-only;
reg = <0x00000000 0x00400000>;
};
- android@0x00400000 {
+ android@00400000 {
label = "android";
reg = <0x00400000 0x12c00000>;
};
Example:
- tse_sub_0_eth_tse_0: ethernet@0x1,00000000 {
+ tse_sub_0_eth_tse_0: ethernet@1,00000000 {
compatible = "altr,tse-msgdma-1.0";
reg = <0x00000001 0x00000000 0x00000400>,
<0x00000001 0x00000460 0x00000020>,
};
};
- tse_sub_1_eth_tse_0: ethernet@0x1,00001000 {
+ tse_sub_1_eth_tse_0: ethernet@1,00001000 {
compatible = "altr,tse-msgdma-1.0";
reg = <0x00000001 0x00001000 0x00000400>,
<0x00000001 0x00001460 0x00000020>,
This example shows these optional properties, plus other properties
required for the TI Davinci MDIO driver.
- davinci_mdio: ethernet@0x5c030000 {
+ davinci_mdio: ethernet@5c030000 {
compatible = "ti,davinci_mdio";
reg = <0x5c030000 0x1000>;
#address-cells = <1>;
Example:
-gmii_to_sgmii_converter: phy@0x100000240 {
+gmii_to_sgmii_converter: phy@100000240 {
compatible = "altr,gmii-to-sgmii-2.0";
reg = <0x00000001 0x00000240 0x00000008>,
<0x00000001 0x00000200 0x00000040>;
Example:
-cpu@0x0 {
+cpu@0 {
device_type = "cpu";
compatible = "altr,nios2-1.0";
reg = <0>;
- bus-range: PCI bus numbers covered
Example
- pcie_0: pcie@0xc00000000 {
+ pcie_0: pcie@c00000000 {
compatible = "altr,pcie-root-port-1.0";
reg = <0xc0000000 0x20000000>,
<0xff220000 0x00004000>;
Example:
- pcie@0x01000000 {
+ pcie@01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>;
- dma-coherent: Present if DMA operations are coherent.
Hip05 Example (note that Hip06 is the same except compatible):
- pcie@0xb0080000 {
+ pcie@b0080000 {
compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;
reg-names = "rc_dbi", "config";
- usb3_vbus-supply : regulator phandle for controller usb3 vbus
Example:
- usbphy: phy@0x01c13400 {
+ usbphy: phy@01c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-phy";
/* phy base regs, phy1 pmu reg, phy2 pmu reg */
For example:
- pinmux: pinmux@0x0301d0c8 {
+ pinmux: pinmux@0301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x1b0>;
For a specific board, if it wants to use sd1,
it can add the following to its board-specific .dts file.
-sd1: sd@0x12340000 {
+sd1: sd@12340000 {
pinctrl-names = "default";
pinctrl-0 = <&sd1_pmx0>;
}
or
-sd1: sd@0x12340000 {
+sd1: sd@12340000 {
pinctrl-names = "default";
pinctrl-0 = <&sd1_pmx1>;
}
For a specific board, if it wants to use uart2 without hardware flow control,
it can add the following to its board-specific .dts file.
-uart2: uart@0xb0070000 {
+uart2: uart@b0070000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_noflow_pins_a>;
}
#size-cells = <1>;
ranges;
- gpio0: gpio0@0x2000a000 {
+ gpio0: gpio0@2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
- gpio1: gpio1@0x2003c000 {
+ gpio1: gpio1@2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
...
};
- mmc: mmc@0x0 {
+ mmc: mmc@0 {
...
...
vmmc-supply = <&twl_reg1>;
Example:
-uart@0x4000c400 {
+uart@4000c400 {
compatible = "energymicro,efm32-uart";
reg = <0x4000c400 0x400>;
interrupts = <15>;
Example:
- ps20: ps2@0x01c2a000 {
+ ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <0 62 4>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
- pdsp0@0x2a10000 {
+ pdsp0@2a10000 {
reg = <0x2a10000 0x1000>,
<0x2a0f000 0x100>,
<0x2a0c000 0x3c8>,
Example:
- i2s: i2s@0x77600000 {
+ i2s: i2s@77600000 {
compatible = "adi,axi-i2s-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;
Example:
- spdif: spdif@0x77400000 {
+ spdif: spdif@77400000 {
compatible = "adi,axi-spdif-tx-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;
Example:
&i2c {
- ak4613: ak4613@0x10 {
+ ak4613: ak4613@10 {
compatible = "asahi-kasei,ak4613";
reg = <0x10>;
};
Example 1:
&i2c {
- ak4648: ak4648@0x12 {
+ ak4648: ak4648@12 {
compatible = "asahi-kasei,ak4642";
reg = <0x12>;
};
Example:
&i2c {
- max98371: max98371@0x31 {
+ max98371: max98371@31 {
compatible = "maxim,max98371";
reg = <0x31>;
};
Example:
&i2c {
- max9867: max9867@0x18 {
+ max9867: max9867@18 {
compatible = "maxim,max9867";
reg = <0x18>;
};
Example:
-sh_fsi2: sh_fsi2@0xec230000 {
+sh_fsi2: sh_fsi2@ec230000 {
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupts = <0 146 0x4>;
Example for the rk3188 SPDIF controller:
-spdif: spdif@0x1011e000 {
+spdif: spdif@1011e000 {
compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
reg = <0x1011e000 0x2000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
Example:
- sti_uni_player1: sti-uni-player@0x8D81000 {
+ sti_uni_player1: sti-uni-player@8D81000 {
compatible = "st,stih407-uni-player-hdmi";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
st,tdm-mode = <1>;
};
- sti_uni_player2: sti-uni-player@0x8D82000 {
+ sti_uni_player2: sti-uni-player@8D82000 {
compatible = "st,stih407-uni-player-pcm-out";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
dma-names = "tx";
};
- sti_uni_player3: sti-uni-player@0x8D85000 {
+ sti_uni_player3: sti-uni-player@8D85000 {
compatible = "st,stih407-uni-player-spdif";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
dma-names = "tx";
};
- sti_uni_reader1: sti-uni-reader@0x8D84000 {
+ sti_uni_reader1: sti-uni-reader@8D84000 {
compatible = "st,stih407-uni-reader-hdmi";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
Example:
-spi1: spi@0x4000c400 { /* USART1 */
+spi1: spi@4000c400 { /* USART1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "energymicro,efm32-spi";
* A simple fan controller which supports 10 speeds of operation
* (represented as 0-9).
*/
- fan0: fan@0x48 {
+ fan0: fan@48 {
...
cooling-min-level = <0>;
cooling-max-level = <9>;
/*
* A simple IC with a single bandgap temperature sensor.
*/
- bandgap0: bandgap@0x0000ED00 {
+ bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <0>;
};
/*
* A simple IC with several bandgap temperature sensors.
*/
- bandgap0: bandgap@0x0000ED00 {
+ bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <1>;
};
/*
* A simple IC with a single temperature sensor.
*/
- adc: sensor@0x49 {
+ adc: sensor@49 {
...
#thermal-sensor-cells = <0>;
};
/*
* A simple IC with a single bandgap temperature sensor.
*/
- bandgap0: bandgap@0x0000ED00 {
+ bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <0>;
};
/*
* An IC with several temperature sensor.
*/
- adc_dummy: sensor@0x50 {
+ adc_dummy: sensor@50 {
...
#thermal-sensor-cells = <1>; /* sensor internal ID */
};
Example:
- ufsphy1: ufsphy@0xfc597000 {
+ ufsphy1: ufsphy@fc597000 {
compatible = "qcom,ufs-phy-qmp-20nm";
reg = <0xfc597000 0x800>;
reg-names = "phy_mem";
<&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
};
- ufshc@0xfc598000 {
+ ufshc@fc598000 {
...
phys = <&ufsphy1>;
phy-names = "ufsphy";
regulators or clocks are always on.
Example:
- ufshc@0xfc598000 {
+ ufshc@fc598000 {
compatible = "jedec,ufs-1.1";
reg = <0xfc598000 0x800>;
interrupts = <0 28 0>;
Example:
- ehci1: usb@0xfe203e00 {
+ ehci1: usb@fe203e00 {
compatible = "st,st-ehci-300x";
reg = <0xfe203e00 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
Example:
- ohci0: usb@0xfe1ffc00 {
+ ohci0: usb@fe1ffc00 {
compatible = "st,st-ohci-300x";
reg = <0xfe1ffc00 0x100>;
interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
Example:
-watchdog: jz4740-watchdog@0x10002000 {
+watchdog: jz4740-watchdog@10002000 {
compatible = "ingenic,jz4740-watchdog";
reg = <0x10002000 0x100>;
};
projects / openwrt / staging / blogic.git / commitdiff