drm/amdgpu: move sdma ecc functions to generic sdma file
authorTao Zhou <tao.zhou1@amd.com>
Thu, 12 Sep 2019 06:28:18 +0000 (14:28 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 3 Oct 2019 14:11:02 +0000 (09:11 -0500)
sdma ras ecc functions can be reused among all sdma generations

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

index de27491d620d32da78d04a5bf24e98f018795662..b83b0b7d0391ed5913e71c204c699f6bb5815384 100644 (file)
@@ -135,3 +135,31 @@ free:
        adev->sdma.ras_if = NULL;
        return r;
 }
+
+int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
+               void *err_data,
+               struct amdgpu_iv_entry *entry)
+{
+       kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
+       amdgpu_ras_reset_gpu(adev, 0);
+
+       return AMDGPU_RAS_SUCCESS;
+}
+
+int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
+                                     struct amdgpu_irq_src *source,
+                                     struct amdgpu_iv_entry *entry)
+{
+       struct ras_common_if *ras_if = adev->sdma.ras_if;
+       struct ras_dispatch_if ih_data = {
+               .entry = entry,
+       };
+
+       if (!ras_if)
+               return 0;
+
+       ih_data.head = *ras_if;
+
+       amdgpu_ras_interrupt_dispatch(adev, &ih_data);
+       return 0;
+}
index 79dcb907d00dfd38dda5accf02be0ca05db1f3c4..95e01d5225370dd719a31753b8eb23a164a814c6 100644 (file)
@@ -106,4 +106,10 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index);
 uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);
 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
                              void *ras_ih_info);
+int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
+               void *err_data,
+               struct amdgpu_iv_entry *entry);
+int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
+                                     struct amdgpu_irq_src *source,
+                                     struct amdgpu_iv_entry *entry);
 #endif
index ae098e2d5dcbade1f945f11ecc3607e23b2c29e8..68a9dfe9d375f2eaf970be83503a87ec9b8f7df6 100644 (file)
@@ -1961,32 +1961,12 @@ static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev,
                        return 0;
                }
 
-               kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
-
-               amdgpu_ras_reset_gpu(adev, 0);
+               amdgpu_sdma_process_ras_data_cb(adev, err_data, entry);
        }
 
        return AMDGPU_RAS_SUCCESS;
 }
 
-static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev,
-                                     struct amdgpu_irq_src *source,
-                                     struct amdgpu_iv_entry *entry)
-{
-       struct ras_common_if *ras_if = adev->sdma.ras_if;
-       struct ras_dispatch_if ih_data = {
-               .entry = entry,
-       };
-
-       if (!ras_if)
-               return 0;
-
-       ih_data.head = *ras_if;
-
-       amdgpu_ras_interrupt_dispatch(adev, &ih_data);
-       return 0;
-}
-
 static int sdma_v4_0_process_illegal_inst_irq(struct amdgpu_device *adev,
                                              struct amdgpu_irq_src *source,
                                              struct amdgpu_iv_entry *entry)
@@ -2334,7 +2314,7 @@ static const struct amdgpu_irq_src_funcs sdma_v4_0_illegal_inst_irq_funcs = {
 
 static const struct amdgpu_irq_src_funcs sdma_v4_0_ecc_irq_funcs = {
        .set = sdma_v4_0_set_ecc_irq_state,
-       .process = sdma_v4_0_process_ecc_irq,
+       .process = amdgpu_sdma_process_ecc_irq,
 };