gpu: host1x: Add MIPI pad calibration DT bindings
authorThierry Reding <treding@nvidia.com>
Mon, 2 Dec 2013 13:22:58 +0000 (14:22 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 17 Dec 2013 17:10:08 +0000 (18:10 +0100)
Introduce device tree bindings for the MIPI pad calibration controller
found on Tegra SoCs. The controller can be used to perform calibration
of pads used for DSI and CSI peripherals.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Documentation/devicetree/bindings/mipi/nvidia,tegra114-mipi.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/mipi/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/mipi/nvidia,tegra114-mipi.txt
new file mode 100644 (file)
index 0000000..e4a25ce
--- /dev/null
@@ -0,0 +1,41 @@
+NVIDIA Tegra MIPI pad calibration controller
+
+Required properties:
+- compatible: "nvidia,tegra<chip>-mipi"
+- reg: Physical base address and length of the controller's registers.
+- clocks: Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+  - mipi-cal
+- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
+  that need to be calibrated for a given device.
+
+User nodes need to contain an nvidia,mipi-calibrate property that has a
+phandle to refer to the calibration controller node and a bitmask of the pads
+that need to be calibrated.
+
+Example:
+
+       mipi: mipi@700e3000 {
+               compatible = "nvidia,tegra114-mipi";
+               reg = <0x700e3000 0x100>;
+               clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
+               clock-names = "mipi-cal";
+               #nvidia,mipi-calibrate-cells = <1>;
+       };
+
+       ...
+
+       host1x@50000000 {
+               ...
+
+               dsi@54300000 {
+                       ...
+
+                       nvidia,mipi-calibrate = <&mipi 0x060>;
+
+                       ...
+               };
+
+               ...
+       };