Revert "drm/amd/display: add global master update lock for DCN2"
authorDavid Francis <David.Francis@amd.com>
Thu, 23 May 2019 18:06:08 +0000 (14:06 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 22 Aug 2019 22:22:22 +0000 (17:22 -0500)
This reverts commit 6c5be4ac630805d3a3b20157a0c6421ef815fe78.

This commit was accidentally promoted twice

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h
drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

index fa8a73f6c8e316e82dbb9f028a70048fe90ca2f6..e146d1d8d45ed8c6121b42c1bf360e8256f4f2a4 100644 (file)
@@ -575,10 +575,6 @@ enum dc_status dcn20_enable_stream_timing(
                        pipe_ctx->stream->signal,
                        true);
 
-       if (pipe_ctx->stream_res.tg->funcs->setup_global_lock)
-               pipe_ctx->stream_res.tg->funcs->setup_global_lock(
-                               pipe_ctx->stream_res.tg);
-
        if (odm_pipe)
                odm_pipe->stream_res.opp->funcs->opp_pipe_clock_control(
                                odm_pipe->stream_res.opp,
index 99070e93020b8ebf9ebd238779def40f6c5b404c..2137e2be2140405997f6c6a75d2b1f651ae4eb8d 100644 (file)
@@ -333,65 +333,6 @@ void optc2_triplebuffer_unlock(struct timing_generator *optc)
 
 }
 
-
-void optc2_setup_global_lock(struct timing_generator *optc)
-{
-       struct optc *optc1 = DCN10TG_FROM_TG(optc);
-       uint32_t v_blank_start = 0;
-       uint32_t h_blank_start = 0, h_total = 0;
-
-       REG_SET(OTG_GLOBAL_CONTROL1, 0, MASTER_UPDATE_LOCK_DB_EN, 1);
-
-       REG_SET(OTG_GLOBAL_CONTROL2, 0, DIG_UPDATE_LOCATION, 20);
-
-       REG_GET(OTG_V_BLANK_START_END, OTG_V_BLANK_START, &v_blank_start);
-
-       REG_GET(OTG_H_BLANK_START_END, OTG_H_BLANK_START, &h_blank_start);
-
-       REG_GET(OTG_H_TOTAL, OTG_H_TOTAL, &h_total);
-       REG_UPDATE_2(OTG_GLOBAL_CONTROL1,
-                       MASTER_UPDATE_LOCK_DB_X,
-                       h_blank_start - 200 - 1,
-                       MASTER_UPDATE_LOCK_DB_Y,
-                       v_blank_start - 1);
-}
-
-void optc2_lock_global(struct timing_generator *optc)
-{
-       struct optc *optc1 = DCN10TG_FROM_TG(optc);
-
-       REG_UPDATE(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 1);
-
-       REG_SET(OTG_GLOBAL_CONTROL0, 0,
-                       OTG_MASTER_UPDATE_LOCK_SEL, optc->inst);
-       REG_SET(OTG_MASTER_UPDATE_LOCK, 0,
-                       OTG_MASTER_UPDATE_LOCK, 1);
-
-       /* Should be fast, status does not update on maximus */
-       if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)
-               REG_WAIT(OTG_MASTER_UPDATE_LOCK,
-                               UPDATE_LOCK_STATUS, 1,
-                               1, 10);
-}
-
-void optc2_lock(struct timing_generator *optc)
-{
-       struct optc *optc1 = DCN10TG_FROM_TG(optc);
-
-       REG_UPDATE(OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, 0);
-
-       REG_SET(OTG_GLOBAL_CONTROL0, 0,
-                       OTG_MASTER_UPDATE_LOCK_SEL, optc->inst);
-       REG_SET(OTG_MASTER_UPDATE_LOCK, 0,
-                       OTG_MASTER_UPDATE_LOCK, 1);
-
-       /* Should be fast, status does not update on maximus */
-       if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)
-               REG_WAIT(OTG_MASTER_UPDATE_LOCK,
-                               UPDATE_LOCK_STATUS, 1,
-                               1, 10);
-}
-
 void optc2_lock_doublebuffer_enable(struct timing_generator *optc)
 {
        struct optc *optc1 = DCN10TG_FROM_TG(optc);
@@ -486,10 +427,8 @@ static struct timing_generator_funcs dcn20_tg_funcs = {
                .triplebuffer_lock = optc2_triplebuffer_lock,
                .triplebuffer_unlock = optc2_triplebuffer_unlock,
                .disable_reset_trigger = optc1_disable_reset_trigger,
-               .lock = optc2_lock,
+               .lock = optc1_lock,
                .unlock = optc1_unlock,
-               .lock_global = optc2_lock_global,
-               .setup_global_lock = optc2_setup_global_lock,
                .lock_doublebuffer_enable = optc2_lock_doublebuffer_enable,
                .lock_doublebuffer_disable = optc2_lock_doublebuffer_disable,
                .enable_optc_clock = optc1_enable_optc_clock,
index 47cb4de1564c11e99f044f63d3fcd06e71384950..32a58431fd0909c227b17e1369cd65e421cbff0d 100644 (file)
@@ -106,9 +106,6 @@ void optc2_get_optc_source(struct timing_generator *optc,
 
 void optc2_triplebuffer_lock(struct timing_generator *optc);
 void optc2_triplebuffer_unlock(struct timing_generator *optc);
-void optc2_lock(struct timing_generator *optc);
-void optc2_lock_global(struct timing_generator *optc);
-void optc2_setup_global_lock(struct timing_generator *optc);
 void optc2_lock_doublebuffer_disable(struct timing_generator *optc);
 void optc2_lock_doublebuffer_enable(struct timing_generator *optc);
 void optc2_program_manual_trigger(struct timing_generator *optc);
index f607ef24c766157978bcd811b9df03e80a47702f..e0713d6d6c8d51382dfc1b70024c6f3bad1e421e 100644 (file)
@@ -189,10 +189,8 @@ struct timing_generator_funcs {
        bool (*did_triggered_reset_occur)(struct timing_generator *tg);
        void (*setup_global_swap_lock)(struct timing_generator *tg,
                                                        const struct dcp_gsl_params *gsl_params);
-       void (*setup_global_lock)(struct timing_generator *tg);
        void (*unlock)(struct timing_generator *tg);
        void (*lock)(struct timing_generator *tg);
-       void (*lock_global)(struct timing_generator *tg);
        void (*lock_doublebuffer_disable)(struct timing_generator *tg);
        void (*lock_doublebuffer_enable)(struct timing_generator *tg);
 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)