MIPS: Add define for Config.VI (virtual icache) bit
authorJames Hogan <james.hogan@imgtec.com>
Wed, 15 Jun 2016 18:29:59 +0000 (19:29 +0100)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 15 Jun 2016 21:58:38 +0000 (23:58 +0200)
The Config.VI bit specifies that the instruction cache is virtually
tagged, which is checked in c-r4k.c's probe_pcache(). Add a proper
definition for it in mipsregs.h and make use of it.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/mips/include/asm/mipsregs.h
arch/mips/mm/c-r4k.c

index 8b1b37d50d158fb448537059faffce2067dd32ec..def9d8d13f6ecbb1beb85b4011fdcb9ae2016912 100644 (file)
 #define TX49_CONF_CWFON                (_ULCAST_(1) << 27)
 
 /* Bits specific to the MIPS32/64 PRA. */
+#define MIPS_CONF_VI           (_ULCAST_(1) <<  3)
 #define MIPS_CONF_MT           (_ULCAST_(7) <<  7)
 #define MIPS_CONF_MT_TLB       (_ULCAST_(1) <<  7)
 #define MIPS_CONF_MT_FTLB      (_ULCAST_(4) <<  7)
index ef7f925dd1b0285ee743587962150f1592ac22af..7a9c345e87e5d14af628ab3f2ec0d45ce29ef220 100644 (file)
@@ -1206,7 +1206,7 @@ static void probe_pcache(void)
                              c->icache.linesz;
                c->icache.waybit = __ffs(icache_size/c->icache.ways);
 
-               if (config & 0x8)               /* VI bit */
+               if (config & MIPS_CONF_VI)
                        c->icache.flags |= MIPS_CACHE_VTAG;
 
                /*