staging: dwc2: remove specific fifo size constants

A generic set of FIFOSIZE_* constants is defined which applies to all
fifo size and offset registers. It is already used for both the
GNPTXFSIZ and HPTXFSIZ registers, but it applies to DPTXFSIZN as well.
Some of these also had specific constants defined. This patch removes
the specific constants and documents to use the generic constants.

Note that the removed constants weren't actually used. Instead, most of
the related code uses hardcoded masks and shifts. But given that
subsequent patches will be moving that code around and introducing the
constants in the process, this patch leaves those untouched.

Also note that the GRXFSIZ register also contains a fifo size, but
there is no corresponding start address register (it is always the first
fifo in memory), the layout of the GRXFSIZ register is different and
cannot use the same constants.

Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/dwc2/hw.h b/drivers/staging/dwc2/hw.h
index cf0dc97d5520eeace91e1c259b5d7e1b2abee4a5..0777d8a23e51e624652870c29286ac81df299413 100644 (file)
--- a/drivers/staging/dwc2/hw.h
+++ b/drivers/staging/dwc2/hw.h
@@ -190,14 +190,7 @@
 #define GRXFSIZ                                HSOTG_REG(0x024)
 
 #define GNPTXFSIZ                      HSOTG_REG(0x028)
-#define GNPTXFSIZ_NP_TXF_DEP_MASK      (0xffff << 16)
-#define GNPTXFSIZ_NP_TXF_DEP_SHIFT     16
-#define GNPTXFSIZ_NP_TXF_DEP_LIMIT     0xffff
-#define GNPTXFSIZ_NP_TXF_DEP(_x)       ((_x) << 16)
-#define GNPTXFSIZ_NP_TXF_ST_ADDR_MASK  (0xffff << 0)
-#define GNPTXFSIZ_NP_TXF_ST_ADDR_SHIFT 0
-#define GNPTXFSIZ_NP_TXF_ST_ADDR_LIMIT 0xffff
-#define GNPTXFSIZ_NP_TXF_ST_ADDR(_x)   ((_x) << 0)
+/* Use FIFOSIZE_* constants to access this register */
 
 #define GNPTXSTS                       HSOTG_REG(0x02C)
 #define GNPTXSTS_NP_TXQ_TOP_MASK               (0x7f << 24)
@@ -395,16 +388,12 @@
 #define ADPCTL_PRB_DSCHRG_SHIFT                0
 
 #define HPTXFSIZ                       HSOTG_REG(0x100)
+/* Use FIFOSIZE_* constants to access this register */
 
 #define DPTXFSIZN(_a)                  HSOTG_REG(0x104 + (((_a) - 1) * 4))
-#define DPTXFSIZN_DP_TXF_SIZE_MASK     (0xffff << 16)
-#define DPTXFSIZN_DP_TXF_SIZE_SHIFT    16
-#define DPTXFSIZN_DP_TXF_SIZE_GET(_v)  (((_v) >> 16) & 0xffff)
-#define DPTXFSIZN_DP_TXF_SIZE_LIMIT    0xffff
-#define DPTXFSIZN_DP_TXF_SIZE(_x)      ((_x) << 16)
-#define DPTXFSIZN_DP_TXF_ST_ADDR_MASK  (0xffff << 0)
-#define DPTXFSIZN_DP_TXF_ST_ADDR_SHIFT 0
+/* Use FIFOSIZE_* constants to access this register */
 
+/* These apply to the GNPTXFSIZ, HPTXFSIZ and DPTXFSIZN registers */
 #define FIFOSIZE_DEPTH_MASK            (0xffff << 16)
 #define FIFOSIZE_DEPTH_SHIFT           16
 #define FIFOSIZE_STARTADDR_MASK                (0xffff << 0)