int rf69_set_mode(struct spi_device *spi, enum mode mode)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: mode");
-#endif
-
switch (mode) {
case transmit: return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_TRANSMIT);
case receive: return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_RECEIVE);
int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: modulation");
-#endif
-
switch (modulation) {
case OOK: return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_TYPE, DATAMODUL_MODULATION_TYPE_OOK);
case FSK: return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_TYPE, DATAMODUL_MODULATION_TYPE_FSK);
{
u8 currentValue;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "get: mode");
-#endif
-
currentValue = rf69_read_reg(spi, REG_DATAMODUL);
switch (currentValue & MASK_DATAMODUL_MODULATION_TYPE >> 3) { // TODO improvement: change 3 to define
int rf69_set_modulation_shaping(struct spi_device *spi,
enum mod_shaping mod_shaping)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: mod shaping");
-#endif
-
switch (rf69_get_modulation(spi)) {
case FSK:
switch (mod_shaping) {
u8 msb;
u8 lsb;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: bit rate");
-#endif
-
// check input value
bitRate_min = F_OSC / 8388608; // 8388608 = 2^23;
if (bitRate < bitRate_min) {
u8 lsb;
u64 factor = 1000000; // to improve precision of calculation
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: deviation");
-#endif
-
// TODO: Dependency to bitrate
if (deviation < 600 || deviation > 500000) {
dev_dbg(&spi->dev, "set_deviation: illegal input param");
u8 lsb;
u64 factor = 1000000; // to improve precision of calculation
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: frequency");
-#endif
-
// calculat f step
f_step = F_OSC * factor;
do_div(f_step, 524288); // 524288 = 2^19
int rf69_set_output_power_level(struct spi_device *spi, u8 powerLevel)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: power level");
-#endif
-
// TODO: Dependency to PA0,1,2 setting
powerLevel += 18;
int rf69_set_pa_ramp(struct spi_device *spi, enum paRamp paRamp)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: pa ramp");
-#endif
-
switch (paRamp) {
case ramp3400: return rf69_write_reg(spi, REG_PARAMP, PARAMP_3400);
case ramp2000: return rf69_write_reg(spi, REG_PARAMP, PARAMP_2000);
int rf69_set_antenna_impedance(struct spi_device *spi, enum antennaImpedance antennaImpedance)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: antenna impedance");
-#endif
-
switch (antennaImpedance) {
case fiftyOhm: return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
case twohundretOhm: return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
int rf69_set_lna_gain(struct spi_device *spi, enum lnaGain lnaGain)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: lna gain");
-#endif
-
switch (lnaGain) {
case automatic: return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_AUTO);
case max: return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX);
{
u8 currentValue;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "get: lna gain");
-#endif
-
currentValue = rf69_read_reg(spi, REG_LNA);
switch (currentValue & MASK_LNA_CURRENT_GAIN >> 3) { // improvement: change 3 to define
int rf69_set_dc_cut_off_frequency(struct spi_device *spi, enum dccPercent dccPercent)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: cut off freq");
-#endif
-
return rf69_set_dc_cut_off_frequency_intern(spi, REG_RXBW, dccPercent);
}
int rf69_set_dc_cut_off_frequency_during_afc(struct spi_device *spi, enum dccPercent dccPercent)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: cut off freq during afc");
-#endif
-
return rf69_set_dc_cut_off_frequency_intern(spi, REG_AFCBW, dccPercent);
}
int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse, u8 exponent)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: band width");
-#endif
-
return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
}
int rf69_set_bandwidth_during_afc(struct spi_device *spi, enum mantisse mantisse, u8 exponent)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: band width during afc");
-#endif
-
return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
}
int rf69_set_ook_threshold_type(struct spi_device *spi, enum thresholdType thresholdType)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: threshold type");
-#endif
-
switch (thresholdType) {
case fixed: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESTYPE, OOKPEAK_THRESHTYPE_FIXED);
case peak: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESTYPE, OOKPEAK_THRESHTYPE_PEAK);
int rf69_set_ook_threshold_step(struct spi_device *spi, enum thresholdStep thresholdStep)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: threshold step");
-#endif
-
switch (thresholdStep) {
case step_0_5db: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESSTEP, OOKPEAK_THRESHSTEP_0_5_DB);
case step_1_0db: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESSTEP, OOKPEAK_THRESHSTEP_1_0_DB);
int rf69_set_ook_threshold_dec(struct spi_device *spi, enum thresholdDecrement thresholdDecrement)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: threshold decrement");
-#endif
-
switch (thresholdDecrement) {
case dec_every8th: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_EVERY_8TH);
case dec_every4th: return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_EVERY_4TH);
u8 regaddr;
u8 regValue;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: DIO mapping");
-#endif
-
switch (DIONumber) {
case 0:
mask = MASK_DIO0; shift = SHIFT_DIO0; regaddr = REG_DIOMAPPING1;
bool rf69_get_flag(struct spi_device *spi, enum flag flag)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "get: flag");
-#endif
-
switch (flag) {
case modeSwitchCompleted: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
case readyToReceive: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
int rf69_reset_flag(struct spi_device *spi, enum flag flag)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "reset: flag");
-#endif
-
switch (flag) {
case rssiExceededThreshold: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_RSSI);
case syncAddressMatch: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: rssi threshold");
-#endif
-
/* no value check needed - u8 exactly matches register size */
return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
int rf69_set_rx_start_timeout(struct spi_device *spi, u8 timeout)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: start timeout");
-#endif
-
/* no value check needed - u8 exactly matches register size */
return rf69_write_reg(spi, REG_RXTIMEOUT1, timeout);
int rf69_set_rssi_timeout(struct spi_device *spi, u8 timeout)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: rssi timeout");
-#endif
-
/* no value check needed - u8 exactly matches register size */
return rf69_write_reg(spi, REG_RXTIMEOUT2, timeout);
int retval;
u8 msb, lsb;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: preamble length");
-#endif
-
/* no value check needed - u16 exactly matches register size */
/* calculate reg settings */
int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifoFillCondition fifoFillCondition)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: fifo fill condition");
-#endif
-
switch (fifoFillCondition) {
case always: return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
case afterSyncInterrupt: return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
int rf69_set_sync_size(struct spi_device *spi, u8 syncSize)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: sync size");
-#endif
-
// check input value
if (syncSize > 0x07) {
dev_dbg(&spi->dev, "set: illegal input param");
int rf69_set_sync_tolerance(struct spi_device *spi, u8 syncTolerance)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: sync tolerance");
-#endif
-
// check input value
if (syncTolerance > 0x07) {
dev_dbg(&spi->dev, "set: illegal input param");
{
int retval = 0;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: sync values");
-#endif
-
retval += rf69_write_reg(spi, REG_SYNCVALUE1, syncValues[0]);
retval += rf69_write_reg(spi, REG_SYNCVALUE2, syncValues[1]);
retval += rf69_write_reg(spi, REG_SYNCVALUE3, syncValues[2]);
int rf69_set_packet_format(struct spi_device *spi, enum packetFormat packetFormat)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: packet format");
-#endif
-
switch (packetFormat) {
case packetLengthVar: return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
case packetLengthFix: return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
int rf69_set_adressFiltering(struct spi_device *spi, enum addressFiltering addressFiltering)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: address filtering");
-#endif
-
switch (addressFiltering) {
case filteringOff: return rf69_read_mod_write(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_ADDRESSFILTERING, PACKETCONFIG1_ADDRESSFILTERING_OFF);
case nodeAddress: return rf69_read_mod_write(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_ADDRESSFILTERING, PACKETCONFIG1_ADDRESSFILTERING_NODE);
int rf69_set_payload_length(struct spi_device *spi, u8 payloadLength)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: payload length");
-#endif
-
return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payloadLength);
}
u8 rf69_get_payload_length(struct spi_device *spi)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "get: payload length");
-#endif
-
return (u8)rf69_read_reg(spi, REG_PAYLOAD_LENGTH);
}
int rf69_set_node_address(struct spi_device *spi, u8 nodeAddress)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: node address");
-#endif
-
return rf69_write_reg(spi, REG_NODEADRS, nodeAddress);
}
int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcastAddress)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: broadcast address");
-#endif
-
return rf69_write_reg(spi, REG_BROADCASTADRS, broadcastAddress);
}
int rf69_set_tx_start_condition(struct spi_device *spi, enum txStartCondition txStartCondition)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: start condition");
-#endif
-
switch (txStartCondition) {
case fifoLevel: return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
case fifoNotEmpty: return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
{
int retval;
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: fifo threshold");
-#endif
-
/* check input value */
if (threshold & 0x80) {
dev_dbg(&spi->dev, "set: illegal input param");
int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
{
-#ifdef DEBUG
- dev_dbg(&spi->dev, "set: dagc");
-#endif
-
switch (dagc) {
case normalMode: return rf69_write_reg(spi, REG_TESTDAGC, DAGC_NORMAL);
case improve: return rf69_write_reg(spi, REG_TESTDAGC, DAGC_IMPROVED_LOWBETA0);