Use ARM CCI driver on FVP and Juno platforms

This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.

Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542

diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h
index 52916846c2c9868d6e5093da9335edac52ba867b..5e21673740495fe4eb47509648c14026416b7632 100644 (file)
--- a/include/lib/aarch64/arch.h
+++ b/include/lib/aarch64/arch.h
@@ -61,6 +61,14 @@
 #define MPIDR_AFFLVL1          1
 #define MPIDR_AFFLVL2          2
 #define MPIDR_AFFLVL3          3
+#define MPIDR_AFFLVL0_VAL(mpidr) \
+               ((mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)
+#define MPIDR_AFFLVL1_VAL(mpidr) \
+               ((mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK)
+#define MPIDR_AFFLVL2_VAL(mpidr) \
+               ((mpidr >> MPIDR_AFF2_SHIFT) & MPIDR_AFFLVL_MASK)
+#define MPIDR_AFFLVL3_VAL(mpidr) \
+               ((mpidr >> MPIDR_AFF3_SHIFT) & MPIDR_AFFLVL_MASK)
 /*
  * The MPIDR_MAX_AFFLVL count starts from 0. Take care to
  * add one while using this macro to define array sizes.

diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index ddaacbaf637d8a927f42880e924ffef0c93d6dd9..a8afb4e841a35786fbaf5a57a2e04a80571ead95 100644 (file)
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -32,7 +32,7 @@
 #include <arch_helpers.h>
 #include <arm_gic.h>
 #include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
 #include <debug.h>
 #include <mmio.h>
 #include <platform.h>
@@ -295,6 +295,12 @@ uint64_t plat_get_syscnt_freq(void)
        return counter_base_frequency;
 }
 
+/* Map of CCI masters with the slave interfaces they are connected */
+static const int cci_map[] = {
+       CCI400_CLUSTER0_SL_IFACE_IX,
+       CCI400_CLUSTER1_SL_IFACE_IX
+};
+
 void fvp_cci_init(void)
 {
        /*
@@ -302,19 +308,20 @@ void fvp_cci_init(void)
         */
        if (plat_config.flags & CONFIG_HAS_CCI)
                cci_init(CCI400_BASE,
-                       CCI400_SL_IFACE3_CLUSTER_IX,
-                       CCI400_SL_IFACE4_CLUSTER_IX);
+                       cci_map,
+                       ARRAY_SIZE(cci_map));
 }
 
 void fvp_cci_enable(void)
 {
-       /*
-        * Enable CCI-400 coherency for this cluster. No need
-        * for locks as no other cpu is active at the
-        * moment
-        */
        if (plat_config.flags & CONFIG_HAS_CCI)
-               cci_enable_cluster_coherency(read_mpidr());
+               cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
+}
+
+void fvp_cci_disable(void)
+{
+       if (plat_config.flags & CONFIG_HAS_CCI)
+               cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
 }
 
 void fvp_gic_init(void)

diff --git a/plat/fvp/fvp_def.h b/plat/fvp/fvp_def.h
index e3442fce79ac057e7983c6669f4676eb5c93ba32..a2f2da8c569b9ba56ef50fc3c88c80e30317216c 100644 (file)
--- a/plat/fvp/fvp_def.h
+++ b/plat/fvp/fvp_def.h
@@ -236,8 +236,8 @@
  * CCI-400 related constants
  ******************************************************************************/
 #define CCI400_BASE                    0x2c090000
-#define CCI400_SL_IFACE3_CLUSTER_IX    0
-#define CCI400_SL_IFACE4_CLUSTER_IX    1
+#define CCI400_CLUSTER0_SL_IFACE_IX    3
+#define CCI400_CLUSTER1_SL_IFACE_IX    4
 
 /*******************************************************************************
  * GIC-400 & interrupt handling related constants

diff --git a/plat/fvp/fvp_pm.c b/plat/fvp/fvp_pm.c
index c15d845d80426de298f000a07def61ad46cda679..3737ecff2c47eba12eae91099d9dc202c5431b07 100644 (file)
--- a/plat/fvp/fvp_pm.c
+++ b/plat/fvp/fvp_pm.c
@@ -32,7 +32,7 @@
 #include <arm_gic.h>
 #include <assert.h>
 #include <bakery_lock.h>
-#include <cci400.h>
+#include <cci.h>
 #include <debug.h>
 #include <mmio.h>
 #include <platform.h>
@@ -82,8 +82,7 @@ static void fvp_cluster_pwrdwn_common(void)
        uint64_t mpidr = read_mpidr_el1();
 
        /* Disable coherency if this cluster is to be turned off */
-       if (get_plat_config()->flags & CONFIG_HAS_CCI)
-               cci_disable_cluster_coherency(mpidr);
+       fvp_cci_disable();
 
        /* Program the power controller to turn the cluster off */
        fvp_pwrc_write_pcoffr(mpidr);

diff --git a/plat/fvp/fvp_private.h b/plat/fvp/fvp_private.h
index 3949754b9b8824fded9f5e5addf2144755a35243..4f60a16198d4ef2d26bd292aa89402b77f1e2de4 100644 (file)
--- a/plat/fvp/fvp_private.h
+++ b/plat/fvp/fvp_private.h
@@ -138,6 +138,7 @@ int fvp_config_setup(void);
 
 void fvp_cci_init(void);
 void fvp_cci_enable(void);
+void fvp_cci_disable(void);
 
 void fvp_gic_init(void);
 

diff --git a/plat/fvp/include/plat_macros.S b/plat/fvp/include/plat_macros.S
index f050261fb2a8bc144a5c92fbd48c4f56570bd675..9e5ef4d56eb1e79e47bc7da84461867da98d80c1 100644 (file)
--- a/plat/fvp/include/plat_macros.S
+++ b/plat/fvp/include/plat_macros.S
@@ -27,7 +27,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
-#include <cci400.h>
+#include <cci.h>
 #include <gic_v2.h>
 #include <plat_config.h>
 #include "../fvp_def.h"

diff --git a/plat/fvp/platform.mk b/plat/fvp/platform.mk
index bcee3286d9e6ec7466f59822be5a9da4a1d78a0c..7cf571e45844cf94722a122e6876d14aa8e8c395 100644 (file)
--- a/plat/fvp/platform.mk
+++ b/plat/fvp/platform.mk
@@ -57,7 +57,7 @@ PLAT_BL_COMMON_SOURCES        :=      drivers/arm/pl011/pl011_console.S               \
                                plat/common/aarch64/plat_common.c               \
                                plat/fvp/fvp_io_storage.c
 
-BL1_SOURCES            +=      drivers/arm/cci400/cci400.c                     \
+BL1_SOURCES            +=      drivers/arm/cci/cci.c                           \
                                lib/cpus/aarch64/aem_generic.S                  \
                                lib/cpus/aarch64/cortex_a53.S                   \
                                lib/cpus/aarch64/cortex_a57.S                   \
@@ -72,7 +72,7 @@ BL2_SOURCES           +=      drivers/arm/tzc400/tzc400.c                     \
                                plat/fvp/fvp_security.c                         \
                                plat/fvp/aarch64/fvp_common.c
 
-BL31_SOURCES           +=      drivers/arm/cci400/cci400.c                     \
+BL31_SOURCES           +=      drivers/arm/cci/cci.c                           \
                                drivers/arm/gic/arm_gic.c                       \
                                drivers/arm/gic/gic_v2.c                        \
                                drivers/arm/gic/gic_v3.c                        \

diff --git a/plat/juno/aarch64/juno_common.c b/plat/juno/aarch64/juno_common.c
index 371323e78d1291d22ffdeb441d4d8a256323a4d2..6b6e185178e12da8fc44766ed4d4d505999ba7f3 100644 (file)
--- a/plat/juno/aarch64/juno_common.c
+++ b/plat/juno/aarch64/juno_common.c
@@ -32,6 +32,7 @@
 #include <arm_gic.h>
 #include <assert.h>
 #include <bl_common.h>
+#include <cci.h>
 #include <debug.h>
 #include <mmio.h>
 #include <platform.h>
@@ -136,6 +137,18 @@ const unsigned int irq_sec_array[] = {
        IRQ_SEC_SGI_7
 };
 
+static const int cci_map[] = {
+       CCI400_CLUSTER0_SL_IFACE_IX,
+       CCI400_CLUSTER1_SL_IFACE_IX
+};
+
+void plat_cci_init(void)
+{
+       cci_init(CCI400_BASE,
+               cci_map,
+               ARRAY_SIZE(cci_map));
+}
+
 /*******************************************************************************
  * Macro generating the code for the function setting up the pagetables as per
  * the platform memory map & initialize the mmu, for the given exception level

diff --git a/plat/juno/bl1_plat_setup.c b/plat/juno/bl1_plat_setup.c
index 23e8592be5a2449b1a4c84b9eff13c0941cde02c..fd331bf6fd9777b11c39d47aea0e7f9a35115461 100644 (file)
--- a/plat/juno/bl1_plat_setup.c
+++ b/plat/juno/bl1_plat_setup.c
@@ -31,7 +31,7 @@
 #include <arch_helpers.h>
 #include <assert.h>
 #include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
 #include <console.h>
 #include <debug.h>
 #include <mmio.h>
@@ -82,10 +82,8 @@ void bl1_early_platform_setup(void)
         * Enable CCI-400 for this cluster. No need for locks as no other cpu is
         * active at the moment
         */
-       cci_init(CCI400_BASE,
-                CCI400_SL_IFACE3_CLUSTER_IX,
-                CCI400_SL_IFACE4_CLUSTER_IX);
-       cci_enable_cluster_coherency(read_mpidr());
+       plat_cci_init();
+       cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
 
        /* Allow BL1 to see the whole Trusted RAM */
        bl1_tzram_layout.total_base = TZRAM_BASE;

diff --git a/plat/juno/bl31_plat_setup.c b/plat/juno/bl31_plat_setup.c
index 1d337688d726aded228a668bf61b75183c9be470..194d6205d968ee502b0f3be146c47e130e2f5d80 100644 (file)
--- a/plat/juno/bl31_plat_setup.c
+++ b/plat/juno/bl31_plat_setup.c
@@ -33,7 +33,7 @@
 #include <assert.h>
 #include <bl31.h>
 #include <bl_common.h>
-#include <cci400.h>
+#include <cci.h>
 #include <console.h>
 #include <mmio.h>
 #include <platform.h>
@@ -123,9 +123,7 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
         * a warm boot. BL1 should have already enabled CCI coherency for this
         * cluster during cold boot.
         */
-       cci_init(CCI400_BASE,
-                CCI400_SL_IFACE3_CLUSTER_IX,
-                CCI400_SL_IFACE4_CLUSTER_IX);
+       plat_cci_init();
 
        /*
         * Check params passed from BL2 should not be NULL,

diff --git a/plat/juno/include/plat_macros.S b/plat/juno/include/plat_macros.S
index a9d2466b848e473d989377c96d2e135f5e415c0a..ac1077b201065afc10bc35e5ac55bb2e3b332204 100644 (file)
--- a/plat/juno/include/plat_macros.S
+++ b/plat/juno/include/plat_macros.S
@@ -28,7 +28,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <cci400.h>
+#include <cci.h>
 #include <gic_v2.h>
 #include "platform_def.h"
 #include "../juno_def.h"

diff --git a/plat/juno/juno_def.h b/plat/juno/juno_def.h
index 62bdda3bccf3245c79621da6d192eb7174ac5fdf..ab39f3ca808157c8d81c04c13c85245ab1eb56b6 100644 (file)
--- a/plat/juno/juno_def.h
+++ b/plat/juno/juno_def.h
@@ -261,8 +261,8 @@
  * CCI-400 related constants
  ******************************************************************************/
 #define CCI400_BASE                    0x2c090000
-#define CCI400_SL_IFACE3_CLUSTER_IX    1
-#define CCI400_SL_IFACE4_CLUSTER_IX    0
+#define CCI400_CLUSTER0_SL_IFACE_IX    4
+#define CCI400_CLUSTER1_SL_IFACE_IX    3
 
 /*******************************************************************************
  * SCP <=> AP boot configuration

diff --git a/plat/juno/juno_private.h b/plat/juno/juno_private.h
index 9a5944cadb94a66c1a46d9e4c735df40b4ea15c7..afb1bfcf6a9145331c1d47232b7dd3645f471322 100644 (file)
--- a/plat/juno/juno_private.h
+++ b/plat/juno/juno_private.h
@@ -154,6 +154,7 @@ unsigned long plat_get_ns_image_entrypoint(void);
 unsigned long platform_get_stack(unsigned long mpidr);
 uint64_t plat_get_syscnt_freq(void);
 void plat_gic_init(void);
+void plat_cci_init(void);
 
 /* Declarations for plat_topology.c */
 int plat_setup_topology(void);

diff --git a/plat/juno/plat_pm.c b/plat/juno/plat_pm.c
index 47338cfca95103ea83f88ac6b12111d770b77132..953e5f72a0ec586a7649fea93504670683f1d1b4 100644 (file)
--- a/plat/juno/plat_pm.c
+++ b/plat/juno/plat_pm.c
@@ -31,8 +31,8 @@
 #include <assert.h>
 #include <arch_helpers.h>
 #include <arm_gic.h>
+#include <cci.h>
 #include <debug.h>
-#include <cci400.h>
 #include <errno.h>
 #include <platform.h>
 #include <platform_def.h>
@@ -159,8 +159,7 @@ void juno_affinst_on_finish(uint32_t afflvl, uint32_t state)
         * if this cluster was off.
         */
        if (afflvl != MPIDR_AFFLVL0)
-               cci_enable_cluster_coherency(mpidr);
-
+               cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(mpidr));
 
        /* Enable the gic cpu interface */
        arm_gic_cpuif_setup();
@@ -187,7 +186,7 @@ static void juno_power_down_common(uint32_t afflvl)
 
        /* Cluster is to be turned off, so disable coherency */
        if (afflvl > MPIDR_AFFLVL0) {
-               cci_disable_cluster_coherency(read_mpidr_el1());
+               cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
                cluster_state = scpi_power_off;
        }
 

diff --git a/plat/juno/platform.mk b/plat/juno/platform.mk
index 8beaecf0ac1d695826a6158ac1be2f8d22c9569e..9e44b2354331d186263b7a80e83f1bc8bd3029c7 100644 (file)
--- a/plat/juno/platform.mk
+++ b/plat/juno/platform.mk
@@ -56,7 +56,7 @@ PLAT_BL_COMMON_SOURCES        :=      drivers/arm/pl011/pl011_console.S       \
                                plat/common/plat_gic.c                  \
                                plat/juno/plat_io_storage.c
 
-BL1_SOURCES            +=      drivers/arm/cci400/cci400.c             \
+BL1_SOURCES            +=      drivers/arm/cci/cci.c                   \
                                lib/cpus/aarch64/cortex_a53.S           \
                                lib/cpus/aarch64/cortex_a57.S           \
                                plat/common/aarch64/platform_up_stack.S \
@@ -75,7 +75,7 @@ BL2_SOURCES           +=      drivers/arm/tzc400/tzc400.c             \
                                plat/juno/scp_bootloader.c              \
                                plat/juno/scpi.c
 
-BL31_SOURCES           +=      drivers/arm/cci400/cci400.c             \
+BL31_SOURCES           +=      drivers/arm/cci/cci.c                   \
                                drivers/arm/gic/arm_gic.c               \
                                drivers/arm/gic/gic_v2.c                \
                                drivers/arm/gic/gic_v3.c                \