With 6.1 as the default kernel, there is no reason to keep 5.15 around.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
+++ /dev/null
-CONFIG_64BIT=y
-CONFIG_ARCH_CLOCKSOURCE_INIT=y
-CONFIG_ARCH_DMA_ADDR_T_64BIT=y
-CONFIG_ARCH_MMAP_RND_BITS=18
-CONFIG_ARCH_MMAP_RND_BITS_MAX=24
-CONFIG_ARCH_MMAP_RND_BITS_MIN=18
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
-CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-# CONFIG_ARCH_RV32I is not set
-CONFIG_ARCH_RV64I=y
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_ARCH_STACKWALK=y
-CONFIG_ASSOCIATIVE_ARRAY=y
-CONFIG_ATA=y
-CONFIG_ATA_VERBOSE_ERROR=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BLK_MQ_VIRTIO=y
-CONFIG_CAVIUM_PTP=y
-CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
-CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC=y
-CONFIG_CLK_SIFIVE=y
-CONFIG_CLK_SIFIVE_PRCI=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CLZ_TAB=y
-CONFIG_CMODEL_MEDANY=y
-# CONFIG_CMODEL_MEDLOW is not set
-CONFIG_COMMON_CLK=y
-# CONFIG_COMPAT_32BIT_TIME is not set
-CONFIG_COMPAT_BRK=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_COREDUMP=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_CPU_ISOLATION=y
-CONFIG_CPU_RMAP=y
-CONFIG_CRC16=y
-# CONFIG_CRC32_SARWATE is not set
-CONFIG_CRC32_SLICEBY8=y
-CONFIG_CRC7=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_DRBG=y
-CONFIG_CRYPTO_DRBG_HMAC=y
-CONFIG_CRYPTO_DRBG_MENU=y
-CONFIG_CRYPTO_ECHAINIV=y
-CONFIG_CRYPTO_HASH_INFO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_JITTERENTROPY=y
-CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
-CONFIG_CRYPTO_LIB_SHA256=y
-CONFIG_CRYPTO_RNG=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_RNG_DEFAULT=y
-CONFIG_CRYPTO_RSA=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DECOMPRESS_GZIP=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_DNOTIFY=y
-CONFIG_DTC=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_EDAC=y
-# CONFIG_EDAC_DEBUG is not set
-CONFIG_EDAC_LEGACY_SYSFS=y
-CONFIG_EDAC_SIFIVE=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EFI=y
-CONFIG_EFIVAR_FS=m
-# CONFIG_EFI_BOOTLOADER_CONTROL is not set
-# CONFIG_EFI_CAPSULE_LOADER is not set
-# CONFIG_EFI_DISABLE_PCI_DMA is not set
-CONFIG_EFI_EARLYCON=y
-CONFIG_EFI_ESRT=y
-CONFIG_EFI_GENERIC_STUB=y
-CONFIG_EFI_PARAMS_FROM_FDT=y
-CONFIG_EFI_RUNTIME_WRAPPERS=y
-CONFIG_EFI_STUB=y
-# CONFIG_EFI_TEST is not set
-CONFIG_ELF_CORE=y
-CONFIG_ERRATA_SIFIVE=y
-CONFIG_ERRATA_SIFIVE_CIP_1200=y
-CONFIG_ERRATA_SIFIVE_CIP_453=y
-CONFIG_EXT4_FS=y
-CONFIG_FAILOVER=y
-CONFIG_FHANDLE=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FONT_8x16=y
-CONFIG_FONT_AUTOSELECT=y
-CONFIG_FONT_SUPPORT=y
-CONFIG_FPU=y
-CONFIG_FRAME_POINTER=y
-CONFIG_FS_IOMAP=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FWNODE_MDIO=y
-CONFIG_FW_LOADER_PAGED_BUF=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_ARCH_TOPOLOGY=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_CSUM=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_GETTIMEOFDAY=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IOREMAP=y
-CONFIG_GENERIC_IRQ_INJECTION=y
-CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
-CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIOLIB_IRQCHIP=y
-CONFIG_GPIO_CDEV=y
-CONFIG_GPIO_CDEV_V1=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_SIFIVE=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-CONFIG_HID=y
-CONFIG_HID_GENERIC=y
-CONFIG_HOTPLUG_PCI=y
-# CONFIG_HOTPLUG_PCI_CPCI is not set
-CONFIG_HOTPLUG_PCI_PCIE=y
-CONFIG_HOTPLUG_PCI_SHPC=y
-CONFIG_HVC_DRIVER=y
-CONFIG_HVC_RISCV_SBI=y
-CONFIG_HW_CONSOLE=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_COMPAT=y
-CONFIG_I2C_HELPER_AUTO=y
-CONFIG_I2C_OCORES=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INPUT=y
-# CONFIG_IOMMU_DEBUGFS is not set
-CONFIG_IOMMU_SUPPORT=y
-CONFIG_IO_URING=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_JBD2=y
-CONFIG_KALLSYMS=y
-CONFIG_KEYS=y
-CONFIG_LEDS_PWM=y
-CONFIG_LEDS_TRIGGER_DISK=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-CONFIG_LIBFDT=y
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_LOCK_DEBUGGING_SUPPORT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_MACB=y
-# CONFIG_MACB_PCI is not set
-CONFIG_MACB_USE_HWSTAMP=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MDIO_DEVRES=y
-CONFIG_MEMFD_CREATE=y
-CONFIG_MFD_CORE=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MICROSEMI_PHY=y
-CONFIG_MIGRATION=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_CADENCE=y
-# CONFIG_MMC_SDHCI_PCI is not set
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SPI=y
-CONFIG_MMIOWB=y
-CONFIG_MODULES_USE_ELF_RELA=y
-CONFIG_MODULE_SECTIONS=y
-CONFIG_MPILIB=y
-CONFIG_MQ_IOSCHED_DEADLINE=y
-CONFIG_MQ_IOSCHED_KYBER=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NET_FAILOVER=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NET_PTP_CLASSIFY=y
-CONFIG_NET_SELFTESTS=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NR_CPUS=8
-CONFIG_NVMEM=y
-CONFIG_NVMEM_SYSFS=y
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_KOBJ=y
-CONFIG_OF_MDIO=y
-CONFIG_OID_REGISTRY=y
-CONFIG_PADATA=y
-CONFIG_PAGE_OFFSET=0xffffffe000000000
-CONFIG_PAGE_REPORTING=y
-CONFIG_PA_BITS=56
-CONFIG_PCI=y
-CONFIG_PCIEAER=y
-CONFIG_PCIEAER_INJECT=m
-CONFIG_PCIEASPM=y
-CONFIG_PCIEASPM_DEFAULT=y
-# CONFIG_PCIEASPM_PERFORMANCE is not set
-# CONFIG_PCIEASPM_POWERSAVE is not set
-# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCIE_DPC=y
-CONFIG_PCIE_DW=y
-CONFIG_PCIE_DW_HOST=y
-CONFIG_PCIE_ECRC=y
-CONFIG_PCIE_FU740=y
-CONFIG_PCIE_PTM=y
-CONFIG_PCIE_XILINX=y
-CONFIG_PCI_DEBUG=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_ECAM=y
-CONFIG_PCI_HOST_COMMON=y
-CONFIG_PCI_HOST_GENERIC=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_MSI_IRQ_DOMAIN=y
-CONFIG_PCI_SW_SWITCHTEC=y
-CONFIG_PGTABLE_LEVELS=3
-CONFIG_PHYLIB=y
-CONFIG_PHYLINK=y
-CONFIG_PHYS_ADDR_T_64BIT=y
-# CONFIG_PHYS_RAM_BASE_FIXED is not set
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_GPIO=y
-CONFIG_POWER_RESET_GPIO_RESTART=y
-CONFIG_POWER_RESET_RESTART=y
-CONFIG_POWER_RESET_SYSCON=y
-CONFIG_POWER_RESET_SYSCON_POWEROFF=y
-CONFIG_PPS=y
-CONFIG_PRINTK_TIME=y
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_PTP_1588_CLOCK_OPTIONAL=y
-CONFIG_PWM=y
-CONFIG_PWM_SIFIVE=y
-CONFIG_PWM_SYSFS=y
-CONFIG_RATIONAL=y
-CONFIG_RCU_TRACE=y
-CONFIG_RD_GZIP=y
-CONFIG_REALTEK_PHY=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_IRQ=y
-CONFIG_REGMAP_MMIO=y
-# CONFIG_RESET_ATTACK_MITIGATION is not set
-CONFIG_RESET_CONTROLLER=y
-CONFIG_RESET_SIMPLE=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RISCV=y
-CONFIG_RISCV_ERRATA_ALTERNATIVE=y
-CONFIG_RISCV_INTC=y
-CONFIG_RISCV_ISA_C=y
-CONFIG_RISCV_SBI=y
-CONFIG_RISCV_SBI_V01=y
-CONFIG_RISCV_TIMER=y
-CONFIG_RPS=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DRV_EFI is not set
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_SCHED_DEBUG=y
-CONFIG_SCSI=y
-CONFIG_SCSI_COMMON=y
-CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
-CONFIG_SERIAL_8250_EXAR=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_PCI=y
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
-CONFIG_SERIAL_MCTRL_GPIO=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIAL_SIFIVE=y
-CONFIG_SERIAL_SIFIVE_CONSOLE=y
-CONFIG_SERIO=y
-CONFIG_SERIO_SERPORT=y
-CONFIG_SG_POOL=y
-CONFIG_SIFIVE_L2=y
-CONFIG_SIFIVE_PLIC=y
-CONFIG_SLUB_DEBUG=y
-CONFIG_SMP=y
-CONFIG_SOCK_RX_QUEUE_MAPPING=y
-# CONFIG_SOC_MICROCHIP_POLARFIRE is not set
-CONFIG_SOC_SIFIVE=y
-# CONFIG_SOC_VIRT is not set
-CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_MEM=y
-CONFIG_SPI_SIFIVE=y
-CONFIG_SRCU=y
-CONFIG_STACKTRACE=y
-CONFIG_SWIOTLB=y
-CONFIG_SWPHY=y
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_SYSFB=y
-# CONFIG_SYSFB_SIMPLEFB is not set
-CONFIG_THREAD_INFO_IN_TASK=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_OF=y
-CONFIG_TIMER_PROBE=y
-CONFIG_TRACE_CLOCK=y
-CONFIG_TREE_RCU=y
-CONFIG_TREE_SRCU=y
-CONFIG_TUNE_GENERIC=y
-CONFIG_UCS2_STRING=y
-CONFIG_UEVENT_HELPER_PATH=""
-CONFIG_USB=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_HCD_PLATFORM is not set
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_HID=y
-CONFIG_USB_NET_DRIVERS=y
-CONFIG_USB_PCI=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-# CONFIG_USB_UHCI_HCD is not set
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_PCI=y
-# CONFIG_USB_XHCI_PLATFORM is not set
-CONFIG_VA_BITS=39
-CONFIG_VFAT_FS=y
-CONFIG_VGA_ARB=y
-CONFIG_VGA_ARB_MAX_GPUS=16
-CONFIG_VMAP_STACK=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-# CONFIG_VT_HW_CONSOLE_BINDING is not set
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZONE_DMA32=y
+++ /dev/null
-From ab5c8f5492cce16ff2104393e2f1fa64a3ff6e88 Mon Sep 17 00:00:00 2001
-From: David Abdurachmanov <david.abdurachmanov@sifive.com>
-Date: Wed, 17 Feb 2021 06:06:14 -0800
-Subject: [PATCH 1/7] riscv: sifive: fu740: cpu{1,2,3,4} set compatible to
- sifive,u74-mc
-
-Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
----
- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
-+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
-@@ -39,7 +39,7 @@
- };
- };
- cpu1: cpu@1 {
-- compatible = "sifive,bullet0", "riscv";
-+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
- d-cache-block-size = <64>;
- d-cache-sets = <64>;
- d-cache-size = <32768>;
-@@ -63,7 +63,7 @@
- };
- };
- cpu2: cpu@2 {
-- compatible = "sifive,bullet0", "riscv";
-+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
- d-cache-block-size = <64>;
- d-cache-sets = <64>;
- d-cache-size = <32768>;
-@@ -87,7 +87,7 @@
- };
- };
- cpu3: cpu@3 {
-- compatible = "sifive,bullet0", "riscv";
-+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
- d-cache-block-size = <64>;
- d-cache-sets = <64>;
- d-cache-size = <32768>;
-@@ -111,7 +111,7 @@
- };
- };
- cpu4: cpu@4 {
-- compatible = "sifive,bullet0", "riscv";
-+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
- d-cache-block-size = <64>;
- d-cache-sets = <64>;
- d-cache-size = <32768>;
+++ /dev/null
-From 657819ff477dd73cd71075609698aa57ba098d8c Mon Sep 17 00:00:00 2001
-From: David Abdurachmanov <david.abdurachmanov@sifive.com>
-Date: Wed, 15 Sep 2021 07:10:02 -0700
-Subject: [PATCH 2/7] riscv: sifive: unmatched: update regulators values
-
-These are the regulators values from the schematics for Rev3{A,B} boards.
-
-Note this is not fully correct as bcore1/bcore2 and bmem/bio are merged, but
-it's only supported in v5.15 kernel. See:
-
-541ee8f640327f951e7039278057827322231ab0 ("regulator: da9063: Add support for
-full-current mode.")
-
-This will be changed for v5.15 kernel based on the patch above.
-
-Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
----
- .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 32 +++++++++++-----------
- 1 file changed, 16 insertions(+), 16 deletions(-)
-
---- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-@@ -73,16 +73,16 @@
-
- regulators {
- vdd_bcore1: bcore1 {
-- regulator-min-microvolt = <900000>;
-- regulator-max-microvolt = <900000>;
-+ regulator-min-microvolt = <1050000>;
-+ regulator-max-microvolt = <1050000>;
- regulator-min-microamp = <5000000>;
- regulator-max-microamp = <5000000>;
- regulator-always-on;
- };
-
- vdd_bcore2: bcore2 {
-- regulator-min-microvolt = <900000>;
-- regulator-max-microvolt = <900000>;
-+ regulator-min-microvolt = <1050000>;
-+ regulator-max-microvolt = <1050000>;
- regulator-min-microamp = <5000000>;
- regulator-max-microamp = <5000000>;
- regulator-always-on;
-@@ -137,48 +137,48 @@
- };
-
- vdd_ldo3: ldo3 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <1800000>;
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
- regulator-min-microamp = <200000>;
- regulator-max-microamp = <200000>;
- regulator-always-on;
- };
-
- vdd_ldo4: ldo4 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <1800000>;
-+ regulator-min-microvolt = <2500000>;
-+ regulator-max-microvolt = <2500000>;
- regulator-min-microamp = <200000>;
- regulator-max-microamp = <200000>;
- regulator-always-on;
- };
-
- vdd_ldo5: ldo5 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <1800000>;
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
- regulator-min-microamp = <100000>;
- regulator-max-microamp = <100000>;
- regulator-always-on;
- };
-
- vdd_ldo6: ldo6 {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <1800000>;
- regulator-min-microamp = <200000>;
- regulator-max-microamp = <200000>;
- regulator-always-on;
- };
-
- vdd_ldo7: ldo7 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <1800000>;
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
- regulator-min-microamp = <200000>;
- regulator-max-microamp = <200000>;
- regulator-always-on;
- };
-
- vdd_ldo8: ldo8 {
-- regulator-min-microvolt = <1800000>;
-- regulator-max-microvolt = <1800000>;
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
- regulator-min-microamp = <200000>;
- regulator-max-microamp = <200000>;
- regulator-always-on;
+++ /dev/null
-From 2c2d8ac8c124a2938c9326c14b2dffd46d76b4a8 Mon Sep 17 00:00:00 2001
-From: David Abdurachmanov <david.abdurachmanov@sifive.com>
-Date: Mon, 13 Sep 2021 02:15:37 -0700
-Subject: [PATCH 3/7] riscv: sifive: unmatched: define PWM LEDs
-
-Add D2 (RGB) and D12 (green) LEDs for SiFive Unmatched board.
-
-Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
----
- .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 41 ++++++++++++++++++++++
- 1 file changed, 41 insertions(+)
-
---- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-@@ -4,6 +4,8 @@
- #include "fu740-c000.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-+#include <dt-bindings/leds/common.h>
-+#include <dt-bindings/pwm/pwm.h>
-
- /* Clock frequency (in Hz) of the PCB crystal for rtcclk */
- #define RTCCLK_FREQ 1000000
-@@ -31,6 +33,45 @@
- soc {
- };
-
-+ pwmleds {
-+ compatible = "pwm-leds";
-+ green-d12 {
-+ label = "green:d12";
-+ color = <LED_COLOR_ID_GREEN>;
-+ pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>;
-+ active-low = <1>;
-+ max-brightness = <255>;
-+ linux,default-trigger = "none";
-+ };
-+
-+ green-d2 {
-+ label = "green:d2";
-+ color = <LED_COLOR_ID_GREEN>;
-+ pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>;
-+ active-low = <1>;
-+ max-brightness = <255>;
-+ linux,default-trigger = "none";
-+ };
-+
-+ red-d2 {
-+ label = "red:d2";
-+ color = <LED_COLOR_ID_RED>;
-+ pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>;
-+ active-low = <1>;
-+ max-brightness = <255>;
-+ linux,default-trigger = "none";
-+ };
-+
-+ blue-d2 {
-+ label = "blue:d2";
-+ color = <LED_COLOR_ID_BLUE>;
-+ pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>;
-+ active-low = <1>;
-+ max-brightness = <255>;
-+ linux,default-trigger = "none";
-+ };
-+ };
-+
- hfclk: hfclk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
+++ /dev/null
-From 14ede57943bc4209755d08daf93ac7be967d7fbe Mon Sep 17 00:00:00 2001
-From: David Abdurachmanov <david.abdurachmanov@sifive.com>
-Date: Mon, 13 Sep 2021 02:18:30 -0700
-Subject: [PATCH 4/7] riscv: sifive: unmatched: add gpio-poweroff node
-
-Add gpio-poweroff node to allow powering off the system.
-
-Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
----
- arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
-@@ -85,6 +85,11 @@
- clock-frequency = <RTCCLK_FREQ>;
- clock-output-names = "rtcclk";
- };
-+
-+ gpio-poweroff {
-+ compatible = "gpio-poweroff";
-+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
-+ };
- };
-
- &uart0 {
+++ /dev/null
-From d3cf2859a056273400fbdf9d389b75750ff6ca5e Mon Sep 17 00:00:00 2001
-From: David Abdurachmanov <david.abdurachmanov@sifive.com>
-Date: Fri, 14 May 2021 05:27:51 -0700
-Subject: [PATCH 6/7] riscv: sifive: unleashed: define opp table (cpufreq)
-
-Source: https://github.com/sifive/riscv-linux/commits/dev/paulw/cpufreq-dt-aloe-v5.3-rc4
-
-Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
----
- arch/riscv/Kconfig | 8 +++++
- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 ++++
- .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 34 ++++++++++++++++++++++
- 3 files changed, 47 insertions(+)
-
---- a/arch/riscv/Kconfig
-+++ b/arch/riscv/Kconfig
-@@ -566,6 +566,14 @@ config BUILTIN_DTB
- depends on OF
- default y if XIP_KERNEL
-
-+menu "CPU Power Management"
-+
-+source "drivers/cpuidle/Kconfig"
-+
-+source "drivers/cpufreq/Kconfig"
-+
-+endmenu
-+
- menu "Power management options"
-
- source "kernel/power/Kconfig"
---- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
-+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
-@@ -30,6 +30,7 @@
- i-cache-size = <16384>;
- reg = <0>;
- riscv,isa = "rv64imac";
-+ clocks = <&prci PRCI_CLK_COREPLL>;
- status = "disabled";
- cpu0_intc: interrupt-controller {
- #interrupt-cells = <1>;
-@@ -54,6 +55,7 @@
- reg = <1>;
- riscv,isa = "rv64imafdc";
- tlb-split;
-+ clocks = <&prci PRCI_CLK_COREPLL>;
- next-level-cache = <&l2cache>;
- cpu1_intc: interrupt-controller {
- #interrupt-cells = <1>;
-@@ -78,6 +80,7 @@
- reg = <2>;
- riscv,isa = "rv64imafdc";
- tlb-split;
-+ clocks = <&prci PRCI_CLK_COREPLL>;
- next-level-cache = <&l2cache>;
- cpu2_intc: interrupt-controller {
- #interrupt-cells = <1>;
-@@ -102,6 +105,7 @@
- reg = <3>;
- riscv,isa = "rv64imafdc";
- tlb-split;
-+ clocks = <&prci PRCI_CLK_COREPLL>;
- next-level-cache = <&l2cache>;
- cpu3_intc: interrupt-controller {
- #interrupt-cells = <1>;
-@@ -126,6 +130,7 @@
- reg = <4>;
- riscv,isa = "rv64imafdc";
- tlb-split;
-+ clocks = <&prci PRCI_CLK_COREPLL>;
- next-level-cache = <&l2cache>;
- cpu4_intc: interrupt-controller {
- #interrupt-cells = <1>;
---- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
-+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
-@@ -84,6 +84,40 @@
- label = "d4";
- };
- };
-+
-+ fu540_c000_opp_table: opp-table {
-+ compatible = "operating-points-v2";
-+ opp-shared;
-+
-+ opp-350000000 {
-+ opp-hz = /bits/ 64 <350000000>;
-+ };
-+ opp-700000000 {
-+ opp-hz = /bits/ 64 <700000000>;
-+ };
-+ opp-999999999 {
-+ opp-hz = /bits/ 64 <999999999>;
-+ };
-+ opp-1400000000 {
-+ opp-hz = /bits/ 64 <1400000000>;
-+ };
-+ };
-+};
-+
-+&cpu0 {
-+ operating-points-v2 = <&fu540_c000_opp_table>;
-+};
-+&cpu1 {
-+ operating-points-v2 = <&fu540_c000_opp_table>;
-+};
-+&cpu2 {
-+ operating-points-v2 = <&fu540_c000_opp_table>;
-+};
-+&cpu3 {
-+ operating-points-v2 = <&fu540_c000_opp_table>;
-+};
-+&cpu4 {
-+ operating-points-v2 = <&fu540_c000_opp_table>;
- };
-
- &uart0 {
+++ /dev/null
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-Subject: [PATCH v7 1/1] RISC-V: Use SBI SRST extension when available
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-
-The SBI SRST extension provides a standard way to poweroff and
-reboot the system irrespective to whether Linux RISC-V S-mode
-is running natively (HS-mode) or inside Guest/VM (VS-mode).
-
-The SBI SRST extension is available in the SBI v0.3 specification.
-(Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1)
-
-This patch extends Linux RISC-V SBI implementation to detect
-and use SBI SRST extension.
-
-Signed-off-by: Anup Patel <anup.patel@wdc.com>
-Reviewed-by: Atish Patra <atish.patra@wdc.com>
----
- arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
- arch/riscv/kernel/sbi.c | 35 +++++++++++++++++++++++++++++++++++
- 2 files changed, 59 insertions(+)
-
---- a/arch/riscv/include/asm/sbi.h
-+++ b/arch/riscv/include/asm/sbi.h
-@@ -27,6 +27,7 @@ enum sbi_ext_id {
- SBI_EXT_IPI = 0x735049,
- SBI_EXT_RFENCE = 0x52464E43,
- SBI_EXT_HSM = 0x48534D,
-+ SBI_EXT_SRST = 0x53525354,
- };
-
- enum sbi_ext_base_fid {
-@@ -70,6 +71,21 @@ enum sbi_hsm_hart_status {
- SBI_HSM_HART_STATUS_STOP_PENDING,
- };
-
-+enum sbi_ext_srst_fid {
-+ SBI_EXT_SRST_RESET = 0,
-+};
-+
-+enum sbi_srst_reset_type {
-+ SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
-+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
-+ SBI_SRST_RESET_TYPE_WARM_REBOOT,
-+};
-+
-+enum sbi_srst_reset_reason {
-+ SBI_SRST_RESET_REASON_NONE = 0,
-+ SBI_SRST_RESET_REASON_SYS_FAILURE,
-+};
-+
- #define SBI_SPEC_VERSION_DEFAULT 0x1
- #define SBI_SPEC_VERSION_MAJOR_SHIFT 24
- #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
-@@ -148,6 +164,14 @@ static inline unsigned long sbi_minor_ve
- return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
- }
-
-+/* Make SBI version */
-+static inline unsigned long sbi_mk_version(unsigned long major,
-+ unsigned long minor)
-+{
-+ return ((major & SBI_SPEC_VERSION_MAJOR_MASK) <<
-+ SBI_SPEC_VERSION_MAJOR_SHIFT) | minor;
-+}
-+
- int sbi_err_map_linux_errno(int err);
- #else /* CONFIG_RISCV_SBI */
- static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; }
---- a/arch/riscv/kernel/sbi.c
-+++ b/arch/riscv/kernel/sbi.c
-@@ -7,6 +7,7 @@
-
- #include <linux/init.h>
- #include <linux/pm.h>
-+#include <linux/reboot.h>
- #include <asm/sbi.h>
- #include <asm/smp.h>
-
-@@ -501,6 +502,32 @@ int sbi_remote_hfence_vvma_asid(const un
- }
- EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
-
-+static void sbi_srst_reset(unsigned long type, unsigned long reason)
-+{
-+ sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
-+ 0, 0, 0, 0);
-+ pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
-+ __func__, type, reason);
-+}
-+
-+static int sbi_srst_reboot(struct notifier_block *this,
-+ unsigned long mode, void *cmd)
-+{
-+ sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
-+ SBI_SRST_RESET_TYPE_WARM_REBOOT :
-+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
-+ SBI_SRST_RESET_REASON_NONE);
-+ return NOTIFY_DONE;
-+}
-+
-+static struct notifier_block sbi_srst_reboot_nb;
-+
-+static void sbi_srst_power_off(void)
-+{
-+ sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
-+ SBI_SRST_RESET_REASON_NONE);
-+}
-+
- /**
- * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
- * @extid: The extension ID to be probed.
-@@ -608,6 +635,14 @@ void __init sbi_init(void)
- } else {
- __sbi_rfence = __sbi_rfence_v01;
- }
-+ if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
-+ (sbi_probe_extension(SBI_EXT_SRST) > 0)) {
-+ pr_info("SBI SRST extension detected\n");
-+ pm_power_off = sbi_srst_power_off;
-+ sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
-+ sbi_srst_reboot_nb.priority = 192;
-+ register_restart_handler(&sbi_srst_reboot_nb);
-+ }
- } else {
- __sbi_set_timer = __sbi_set_timer_v01;
- __sbi_send_ipi = __sbi_send_ipi_v01;
projects / openwrt / staging / wigyori.git / commitdiff