--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "yuncore,ax820", "mediatek,mt7621-soc";
+ model = "YunCore AX820";
+
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_green;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_green;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_green: status_green {
+ label = "green:status";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ watchdog {
+ compatible = "linux,wdt-gpio";
+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+ hw_algo = "toggle";
+ hw_margin_ms = <200>;
+ always-running;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <80000000>;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "Bootloader";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "Config";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ /* range 0x40000 to 0x50000 is empty in vendor
+ * firmware, so we do not use it either
+ */
+
+ factory: partition@50000 {
+ label = "Factory";
+ reg = <0x50000 0x40000>;
+ read-only;
+ };
+
+ partition@90000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x90000 0xf70000>;
+ };
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&pcie1 {
+ wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0>;
+ };
+};
+
+&gmac0 {
+ nvmem-cells = <&macaddr_factory_e000>;
+ nvmem-cell-names = "mac-address";
+};
+
+&switch0 {
+ ports {
+ port@0 {
+ status = "okay";
+ label = "wan";
+ nvmem-cells = <&macaddr_factory_e000>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <1>;
+ };
+
+ port@1 {
+ status = "okay";
+ label = "lan";
+ };
+ };
+};
+
+&state_default {
+ gpio {
+ groups = "jtag", "wdt";
+ function = "gpio";
+ };
+};
+
+&factory {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_factory_e000: macaddr@e000 {
+ reg = <0xe000 0x6>;
+ };
+};
projects / openwrt / staging / dangole.git / commitdiff