ppc4xx: Update and add FDT to Korat board support
authorLarry Johnson <lrj@acm.org>
Sat, 14 Jun 2008 20:53:02 +0000 (16:53 -0400)
committerStefan Roese <sr@denx.de>
Thu, 10 Jul 2008 07:10:48 +0000 (09:10 +0200)
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
board/korat/korat.c
include/configs/korat.h

index a7b4b27c6d3bab70f7ebe3343c8e164708f193b6..dc977242ba0fa40a41d086be4373a90fcfc99d72 100644 (file)
  */
 
 #include <common.h>
+#include <fdt_support.h>
 #include <i2c.h>
+#include <libfdt.h>
 #include <ppc440.h>
+#include <asm/bitops.h>
 #include <asm/gpio.h>
-#include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/bitops.h>
+#include <asm/ppc4xx-intvec.h>
+#include <asm/processor.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -604,6 +607,16 @@ int testdram(void)
 }
 #endif /* defined(CFG_DRAM_TEST) */
 
+#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
+/*
+ * Assign interrupts to PCI devices.
+ */
+void korat_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+       pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIR2);
+}
+#endif
+
 /*
  * pci_pre_init
  *
@@ -654,6 +667,10 @@ int pci_pre_init(struct pci_controller *hose)
        addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
        mtdcr(plb1_acr, addr);
 
+#if defined(CONFIG_PCI_PNP)
+       hose->fixup_irq = korat_pci_fixup_irq;
+#endif
+
        return 1;
 }
 #endif /* defined(CONFIG_PCI) */
@@ -779,3 +796,24 @@ int post_hotkeys_pressed(void)
        return 0;       /* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+       u32 val[4];
+       int rc;
+
+       ft_cpu_setup(blob, bd);
+
+       /* Fixup NOR mapping */
+       val[0] = 1;                             /* chip select number */
+       val[1] = 0;                             /* always 0 */
+       val[2] = gd->bd->bi_flashstart;
+       val[3] = gd->bd->bi_flashsize - CFG_FLASH0_SIZE;
+       rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+                                 val, sizeof(val), 1);
+       if (rc)
+               printf("Unable to update property NOR mapping, err=%s\n",
+                      fdt_strerror(rc));
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
index 765566697f9fec94ed81a3ea3e1b387a2ab2cb12..e2610be933d1700ca8bf9a66feb88596f314aa55 100644 (file)
 
 #define CFG_ENV_SECT_SIZE      0x20000 /* size of one complete sector        */
 #define CFG_ENV_ADDR           (CFG_FLASH1_TOP - CFG_ENV_SECT_SIZE)
-#define        CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector   */
+#define CFG_ENV_SIZE           0x2000  /* Total Size of Environment Sector   */
 
 /* Address and size of Redundant Environment Sector */
 #define CFG_ENV_ADDR_REDUND    (CFG_ENV_ADDR - CFG_ENV_SECT_SIZE)
 #define CFG_ROOTPATH           "rootpath=/opt/eldk/ppc_4xxFP\0"
 
 /* Note: kernel_addr and ramdisk_addr assume that FLASH1 is 64 MiB. */
-#define        CONFIG_EXTRA_ENV_SETTINGS                                       \
+#define CONFIG_EXTRA_ENV_SETTINGS                                      \
        CFG_BOOTFILE                                                    \
        CFG_ROOTPATH                                                    \
        "netdev=eth0\0"                                                 \
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CFG_LOADS_BAUD_CHANGE  1       /* allow baudrate change        */
 
-#define        CONFIG_IBM_EMAC4_V4     1
+#define CONFIG_IBM_EMAC4_V4    1
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                2       /* PHY address, See schematics  */
 #define CONFIG_PHY_DYNAMIC_ANEG        1
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use     */
 #endif
 
+/* Pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT       1
+#define CONFIG_OF_BOARD_SETUP  1
+
 #endif /* __CONFIG_H */