drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gating

Because CHV uses cherryview_init_clock_gating instead of
gen8_init_clock_gating.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 88944607b3a71c569b4f5df263d9e8a61e0e2be6..2253f878adf4a914eaef38a7e4606baa302e0547 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5514,7 +5514,7 @@ static void lpt_suspend_hw(struct drm_device *dev)
        }
 }
 
-static void gen8_init_clock_gating(struct drm_device *dev)
+static void broadwell_init_clock_gating(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        enum pipe pipe;
@@ -7262,7 +7262,7 @@ void intel_init_pm(struct drm_device *dev)
                else if (IS_HASWELL(dev))
                        dev_priv->display.init_clock_gating = haswell_init_clock_gating;
                else if (INTEL_INFO(dev)->gen == 8)
-                       dev_priv->display.init_clock_gating = gen8_init_clock_gating;
+                       dev_priv->display.init_clock_gating = broadwell_init_clock_gating;
        } else if (IS_CHERRYVIEW(dev)) {
                dev_priv->display.update_wm = cherryview_update_wm;
                dev_priv->display.update_sprite_wm = valleyview_update_sprite_wm;