#define MSR_AMD64_IBSDCLINAD 0xc0011038
#define MSR_AMD64_IBSDCPHYSAD 0xc0011039
#define MSR_AMD64_IBSCTL 0xc001103a
+ #define MSR_AMD64_IBSBRTARGET 0xc001103b
+
++++++/* Fam 15h MSRs */
++++++#define MSR_F15H_PERF_CTL 0xc0010200
++++++#define MSR_F15H_PERF_CTR 0xc0010201
+ ++++
/* Fam 10h MSRs */
#define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
#define FAM10H_MMIO_CONF_ENABLE (1<<0)
return addr;
}
++++++/**
++++++ * text_poke_smp_batch - Update instructions on a live kernel on SMP
++++++ * @params: an array of text_poke parameters
++++++ * @n: the number of elements in params.
++++++ *
++++++ * Modify multi-byte instruction by using stop_machine() on SMP. Since the
++++++ * stop_machine() is heavy task, it is better to aggregate text_poke requests
++++++ * and do it once if possible.
++++++ *
++++++ * Note: Must be called under get_online_cpus() and text_mutex.
++++++ */
++++++void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
++++++{
++++++ struct text_poke_params tpp = {.params = params, .nparams = n};
++++++
++++++ atomic_set(&stop_machine_first, 1);
++++++ wrote_text = 0;
++++++ stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
++++++}
++++++
#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
- unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
+ #ifdef CONFIG_X86_64
+ unsigned char ideal_nop5[5] = { 0x66, 0x66, 0x66, 0x66, 0x90 };
+ #else
+ unsigned char ideal_nop5[5] = { 0x3e, 0x8d, 0x74, 0x26, 0x00 };
+ #endif
void __init arch_init_ideal_nop5(void)
{