drm/i915: Wrap engine->schedule in RCU locks for set-wedge protection

Similar to the staging around handling of engine->submit_request, we
need to stop adding to the execlists->queue prior to calling
engine->cancel_requests. cancel_requests will move requests from the
queue onto the timeline, so if we add a request onto the queue after that
point, it will be lost.

Fixes: af7a8ffad9c5 ("drm/i915: Use rcu instead of stop_machine in set_wedged")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180307134226.25492-5-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c3d6507063299a114b126d50075280f101fc2334..50e165b5b60de87d51247b1911addb3e23256eef 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -479,10 +479,11 @@ static void __fence_set_priority(struct dma_fence *fence, int prio)
 
        rq = to_request(fence);
        engine = rq->engine;
-       if (!engine->schedule)
-               return;
 
-       engine->schedule(rq, prio);
+       rcu_read_lock();
+       if (engine->schedule)
+               engine->schedule(rq, prio);
+       rcu_read_unlock();
 }
 
 static void fence_set_priority(struct dma_fence *fence, int prio)
@@ -3222,8 +3223,11 @@ void i915_gem_set_wedged(struct drm_i915_private *i915)
         */
        for_each_engine(engine, i915, id) {
                i915_gem_reset_prepare_engine(engine);
+
                engine->submit_request = nop_submit_request;
+               engine->schedule = NULL;
        }
+       i915->caps.scheduler = 0;
 
        /*
         * Make sure no one is running the old callback before we proceed with
@@ -3241,11 +3245,8 @@ void i915_gem_set_wedged(struct drm_i915_private *i915)
                 * start to complete all requests.
                 */
                engine->submit_request = nop_complete_submit_request;
-               engine->schedule = NULL;
        }
 
-       i915->caps.scheduler = 0;
-
        /*
         * Make sure no request can slip through without getting completed by
         * either this call here to intel_engine_init_global_seqno, or the one

diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 75c8826c8cae9e8ae45ed42cd7bbbbd221195fdd..2f62acd2dc3d8f4a2a0551b31754ce606172a134 100644 (file)
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1081,8 +1081,10 @@ void __i915_request_add(struct i915_request *request, bool flush_caches)
         * decide whether to preempt the entire chain so that it is ready to
         * run at the earliest possible convenience.
         */
+       rcu_read_lock();
        if (engine->schedule)
                engine->schedule(request, request->ctx->priority);
+       rcu_read_unlock();
 
        local_bh_disable();
        i915_sw_fence_commit(&request->submit);