if (!speed)
return 0;
- drive->hwif->speedproc(drive, speed);
+ if (drive->hwif->speedproc(drive, speed))
+ return 0;
- return ide_dma_enable(drive);
+ return 1;
}
EXPORT_SYMBOL_GPL(ide_tune_dma);
EXPORT_SYMBOL(ide_rate_filter);
-int ide_dma_enable (ide_drive_t *drive)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct hd_driveid *id = drive->id;
-
- return ((int) ((((id->dma_ultra >> 8) & hwif->ultra_mask) ||
- ((id->dma_mword >> 8) & hwif->mwdma_mask) ||
- ((id->dma_1word >> 8) & hwif->swdma_mask)) ? 1 : 0));
-}
-
-EXPORT_SYMBOL(ide_dma_enable);
-
int ide_use_fast_pio(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
return ide_config_drive_speed(drive, speed);
}
-static int config_chipset_for_dma (ide_drive_t *drive)
-{
- u8 speed = ide_max_dma_mode(drive);
-
- if (!speed)
- return 0;
-
- if (cmd64x_tune_chipset(drive, speed))
- return 0;
-
- return ide_dma_enable(drive);
-}
-
static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
{
- if (ide_use_dma(drive) && config_chipset_for_dma(drive))
+ if (ide_tune_dma(drive))
return 0;
if (ide_use_fast_pio(drive))
static int cs5530_config_dma(ide_drive_t *drive)
{
- if (ide_use_dma(drive)) {
- u8 mode = ide_max_dma_mode(drive);
-
- if (mode && drive->hwif->speedproc(drive, mode) == 0)
- return 0;
- }
+ if (ide_tune_dma(drive))
+ return 0;
return 1;
}
*/
static int sc1200_config_dma (ide_drive_t *drive)
{
- if (ide_use_dma(drive)) {
- u8 mode = ide_max_dma_mode(drive);
-
- if (mode && drive->hwif->speedproc(drive, mode) == 0)
- return 0;
- }
+ if (ide_tune_dma(drive))
+ return 0;
return 1;
}
return ide_config_drive_speed(drive, speed);
}
-/**
- * scc_config_chipset_for_dma - configure for DMA
- * @drive: drive to configure
- *
- * Called by scc_config_drive_for_dma().
- */
-
-static int scc_config_chipset_for_dma(ide_drive_t *drive)
-{
- u8 speed = ide_max_dma_mode(drive);
-
- if (!speed)
- return 0;
-
- if (scc_tune_chipset(drive, speed))
- return 0;
-
- return ide_dma_enable(drive);
-}
-
/**
* scc_configure_drive_for_dma - set up for DMA transfers
* @drive: drive we are going to set up
static int scc_config_drive_for_dma(ide_drive_t *drive)
{
- if (ide_use_dma(drive) && scc_config_chipset_for_dma(drive))
+ if (ide_tune_dma(drive))
return 0;
if (ide_use_fast_pio(drive))
return (ide_config_drive_speed(drive, speed));
}
-/**
- * config_chipset_for_dma - configure for DMA
- * @drive: drive to configure
- *
- * Called by the IDE layer when it wants the timings set up.
- * For the CMD680 we also need to set up the PIO timings and
- * enable DMA.
- */
-
-static int config_chipset_for_dma (ide_drive_t *drive)
-{
- u8 speed = ide_max_dma_mode(drive);
-
- if (!speed)
- return 0;
-
- if (siimage_tune_chipset(drive, speed))
- return 0;
-
- return ide_dma_enable(drive);
-}
-
/**
* siimage_configure_drive_for_dma - set up for DMA transfers
* @drive: drive we are going to set up
static int siimage_config_drive_for_dma (ide_drive_t *drive)
{
- if (ide_use_dma(drive) && config_chipset_for_dma(drive))
+ if (ide_tune_dma(drive))
return 0;
if (ide_use_fast_pio(drive))
return ide_config_drive_speed(drive, speed);
}
-/*
- * Configure the drive for DMA.
- */
-static int config_for_dma(ide_drive_t *drive)
-{
- u8 speed = ide_max_dma_mode(drive);
-
- DBG(("config_for_dma(drive:%s)\n", drive->name));
-
- if (!speed || sl82c105_tune_chipset(drive, speed))
- return 0;
-
- return ide_dma_enable(drive);
-}
-
/*
* Check to see if the drive and chipset are capable of DMA mode.
*/
{
DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
- if (ide_use_dma(drive) && config_for_dma(drive))
+ if (ide_tune_dma(drive))
return 0;
return -1;
/* ide-lib.c */
u8 ide_rate_filter(ide_drive_t *, u8);
-extern int ide_dma_enable(ide_drive_t *drive);
extern char *ide_xfer_verbose(u8 xfer_rate);
extern void ide_toggle_bounce(ide_drive_t *drive, int on);
extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);