ARC: [plat-hsdk] Get rid of inappropriate PHY settings
authorAlexey Brodkin <Alexey.Brodkin@synopsys.com>
Wed, 15 May 2019 15:33:40 +0000 (18:33 +0300)
committerVineet Gupta <vgupta@synopsys.com>
Tue, 28 May 2019 17:09:31 +0000 (10:09 -0700)
Initial bring-up of the platform was done on FPGA prototype
where TI's DP83867 PHY was used. And so some specific PHY
options were added.

Just to confirm this is what we get on FPGA prototype in the bootlog:
| TI DP83867 stmmac-0:00: attached PHY driver [TI DP83867] ...

On real board though we have Micrel KZS9031 PHY and we even have
CONFIG_MICREL_PHY=y set in hsdk_defconfig. That's what we see in the bootlog:
| Micrel KSZ9031 Gigabit PHY stmmac-0:00: ...

So essentially all TI-related bits have to go away.

Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Trent Piepho <tpiepho@impinj.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
arch/arc/boot/dts/hsdk.dts

index 64a2e32c5ad7b1569556d877bb893e30a5298b8c..acfbed41b02013c1b035e31b33720469603d775a 100644 (file)
@@ -11,7 +11,6 @@
  */
 /dts-v1/;
 
-#include <dt-bindings/net/ti-dp83867.h>
 #include <dt-bindings/reset/snps,hsdk-reset.h>
 
 / {
                                compatible = "snps,dwmac-mdio";
                                phy0: ethernet-phy@0 {
                                        reg = <0>;
-                                       ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-                                       ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-                                       ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                                };
                        };
                };