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rockchip: rk3399: enable CA training when do ddr dfs
author
Lin Huang
<hl@rock-chips.com>
Fri, 16 Dec 2016 05:59:07 +0000
(13:59 +0800)
committer
Xing Zheng
<zhengxing@rock-chips.com>
Fri, 24 Feb 2017 12:07:44 +0000
(20:07 +0800)
For ddr dfs stable, We need to enable ddr CA training
when do ddr dfs.
Signed-off-by: Lin Huang <hl@rock-chips.com>
plat/rockchip/rk3399/drivers/dram/dfs.c
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diff --git
a/plat/rockchip/rk3399/drivers/dram/dfs.c
b/plat/rockchip/rk3399/drivers/dram/dfs.c
index c2353141408c578cab71d617860cdbfa114eaf5f..b4aa3f9f258d8e739a6794748e1c1e067ab1c0e2 100644
(file)
--- a/
plat/rockchip/rk3399/drivers/dram/dfs.c
+++ b/
plat/rockchip/rk3399/drivers/dram/dfs.c
@@
-1017,6
+1017,7
@@
static void gen_rk3399_enable_training(uint32_t ch_cnt, uint32_t nmhz)
for (i = 0; i < ch_cnt; i++) {
mmio_clrsetbits_32(CTL_REG(i, 305), 1 << 16, tmp << 16);
mmio_clrsetbits_32(CTL_REG(i, 71), 1, tmp);
+ mmio_clrsetbits_32(CTL_REG(i, 70), 1 << 8, 1 << 8);
}
}