LINUX_VERSION-3.18 = .71
LINUX_VERSION-4.4 = .121
-LINUX_VERSION-4.14 = .42
LINUX_VERSION-4.9 = .102
+LINUX_VERSION-4.14 = .43
LINUX_KERNEL_HASH-3.18.71 = 5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240
LINUX_KERNEL_HASH-4.4.121 = 44a88268b5088dc326b30c9b9133ac35a9a200b636b7268d08f32abeae6ca729
-LINUX_KERNEL_HASH-4.14.42 = 2b03106f99e24a79ccf81be56f95129521d4e25f5421a1150ad278ae9a479003
LINUX_KERNEL_HASH-4.9.102 = d155a36ba52d5809805cd370902582ac373c5b23a958c6424325684447119dc5
+LINUX_KERNEL_HASH-4.14.43 = 133fc0f8f9ea04006c255a052704e8eb95a021fc799dd27f98fcfcace59e714a
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
}
nft_chain_release_hook(&hook);
}
-@@ -5062,10 +5050,9 @@ static int nf_tables_commit(struct net *
+@@ -5069,10 +5057,9 @@ static int nf_tables_commit(struct net *
case NFT_MSG_DELCHAIN:
list_del_rcu(&trans->ctx.chain->list);
nf_tables_chain_notify(&trans->ctx, NFT_MSG_DELCHAIN);
break;
case NFT_MSG_NEWRULE:
nft_clear(trans->ctx.net, nft_trans_rule(trans));
-@@ -5202,10 +5189,9 @@ static int nf_tables_abort(struct net *n
+@@ -5209,10 +5196,9 @@ static int nf_tables_abort(struct net *n
} else {
trans->ctx.table->use--;
list_del_rcu(&trans->ctx.chain->list);
}
break;
case NFT_MSG_DELCHAIN:
-@@ -5306,7 +5292,7 @@ int nft_chain_validate_hooks(const struc
+@@ -5313,7 +5299,7 @@ int nft_chain_validate_hooks(const struc
if (nft_is_base_chain(chain)) {
basechain = nft_base_chain(chain);
return 0;
return -EOPNOTSUPP;
-@@ -5788,8 +5774,7 @@ int __nft_release_basechain(struct nft_c
+@@ -5795,8 +5781,7 @@ int __nft_release_basechain(struct nft_c
BUG_ON(!nft_is_base_chain(ctx->chain));
list_for_each_entry_safe(rule, nr, &ctx->chain->rules, list) {
list_del(&rule->list);
ctx->chain->use--;
-@@ -5818,8 +5803,7 @@ static void __nft_release_afinfo(struct
+@@ -5825,8 +5810,7 @@ static void __nft_release_afinfo(struct
list_for_each_entry_safe(table, nt, &afi->tables, list) {
list_for_each_entry(chain, &table->chains, list)
list_for_each_entry_safe(obj, ne, &ctx->table->objects, list) {
err = nft_delobj(ctx, obj);
if (err < 0)
-@@ -4767,6 +4811,605 @@ static void nf_tables_obj_notify(const s
+@@ -4774,6 +4818,605 @@ static void nf_tables_obj_notify(const s
ctx->afi->family, ctx->report, GFP_KERNEL);
}
static int nf_tables_fill_gen_info(struct sk_buff *skb, struct net *net,
u32 portid, u32 seq)
{
-@@ -4797,6 +5440,49 @@ nla_put_failure:
+@@ -4804,6 +5447,49 @@ nla_put_failure:
return -EMSGSIZE;
}
static void nf_tables_gen_notify(struct net *net, struct sk_buff *skb,
int event)
{
-@@ -4949,6 +5635,21 @@ static const struct nfnl_callback nf_tab
+@@ -4956,6 +5642,21 @@ static const struct nfnl_callback nf_tab
.attr_count = NFTA_OBJ_MAX,
.policy = nft_obj_policy,
},
};
static void nft_chain_commit_update(struct nft_trans *trans)
-@@ -4994,6 +5695,9 @@ static void nf_tables_commit_release(str
+@@ -5001,6 +5702,9 @@ static void nf_tables_commit_release(str
case NFT_MSG_DELOBJ:
nft_obj_destroy(nft_trans_obj(trans));
break;
}
kfree(trans);
}
-@@ -5111,6 +5815,21 @@ static int nf_tables_commit(struct net *
+@@ -5118,6 +5822,21 @@ static int nf_tables_commit(struct net *
nf_tables_obj_notify(&trans->ctx, nft_trans_obj(trans),
NFT_MSG_DELOBJ);
break;
}
}
-@@ -5148,6 +5867,9 @@ static void nf_tables_abort_release(stru
+@@ -5155,6 +5874,9 @@ static void nf_tables_abort_release(stru
case NFT_MSG_NEWOBJ:
nft_obj_destroy(nft_trans_obj(trans));
break;
}
kfree(trans);
}
-@@ -5237,6 +5959,17 @@ static int nf_tables_abort(struct net *n
+@@ -5244,6 +5966,17 @@ static int nf_tables_abort(struct net *n
nft_clear(trans->ctx.net, nft_trans_obj(trans));
nft_trans_destroy(trans);
break;
}
}
-@@ -5787,6 +6520,7 @@ EXPORT_SYMBOL_GPL(__nft_release_basechai
+@@ -5794,6 +6527,7 @@ EXPORT_SYMBOL_GPL(__nft_release_basechai
/* Called by nft_unregister_afinfo() from __net_exit path, nfnl_lock is held. */
static void __nft_release_afinfo(struct net *net, struct nft_af_info *afi)
{
struct nft_table *table, *nt;
struct nft_chain *chain, *nc;
struct nft_object *obj, *ne;
-@@ -5800,6 +6534,9 @@ static void __nft_release_afinfo(struct
+@@ -5807,6 +6541,9 @@ static void __nft_release_afinfo(struct
list_for_each_entry_safe(table, nt, &afi->tables, list) {
list_for_each_entry(chain, &table->chains, list)
nf_tables_unregister_hook(net, table, chain);
/* No packets are walking on these chains anymore. */
ctx.table = table;
list_for_each_entry(chain, &table->chains, list) {
-@@ -5810,6 +6547,11 @@ static void __nft_release_afinfo(struct
+@@ -5817,6 +6554,11 @@ static void __nft_release_afinfo(struct
nf_tables_rule_destroy(&ctx, rule);
}
}
list_for_each_entry_safe(set, ns, &table->sets, list) {
list_del(&set->list);
table->use--;
-@@ -5853,6 +6595,8 @@ static int __init nf_tables_module_init(
+@@ -5860,6 +6602,8 @@ static int __init nf_tables_module_init(
if (err < 0)
goto err3;
pr_info("nf_tables: (c) 2007-2009 Patrick McHardy <kaber@trash.net>\n");
return register_pernet_subsys(&nf_tables_net_ops);
err3:
-@@ -5867,6 +6611,7 @@ static void __exit nf_tables_module_exit
+@@ -5874,6 +6618,7 @@ static void __exit nf_tables_module_exit
{
unregister_pernet_subsys(&nf_tables_net_ops);
nfnetlink_subsys_unregister(&nf_tables_subsys);
hook->priority = ntohl(nla_get_be32(ha[NFTA_HOOK_PRIORITY]));
type = chain_type[afi->family][NFT_CHAIN_T_DEFAULT];
-@@ -4919,7 +4916,7 @@ static int nf_tables_flowtable_parse_hoo
+@@ -4926,7 +4923,7 @@ static int nf_tables_flowtable_parse_hoo
return -EINVAL;
hooknum = ntohl(nla_get_be32(tb[NFTA_FLOWTABLE_HOOK_NUM]));
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -5343,7 +5343,7 @@ static int nf_tables_getflowtable(struct
+@@ -5350,7 +5350,7 @@ static int nf_tables_getflowtable(struct
flowtable = nf_tables_flowtable_lookup(table, nla[NFTA_FLOWTABLE_NAME],
genmask);
if (ret >= 0) {
ctx->table->flags &= ~NFT_TABLE_F_DORMANT;
nft_trans_table_enable(trans) = true;
-@@ -5721,7 +5714,6 @@ static int nf_tables_commit(struct net *
+@@ -5728,7 +5721,6 @@ static int nf_tables_commit(struct net *
if (nft_trans_table_update(trans)) {
if (!nft_trans_table_enable(trans)) {
nf_tables_table_disable(net,
trans->ctx.table);
trans->ctx.table->flags |= NFT_TABLE_F_DORMANT;
}
-@@ -5883,7 +5875,6 @@ static int nf_tables_abort(struct net *n
+@@ -5890,7 +5882,6 @@ static int nf_tables_abort(struct net *n
if (nft_trans_table_update(trans)) {
if (nft_trans_table_enable(trans)) {
nf_tables_table_disable(net,
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -5262,8 +5262,10 @@ static int nf_tables_dump_flowtable_done
+@@ -5269,8 +5269,10 @@ static int nf_tables_dump_flowtable_done
if (!filter)
return 0;
n = 0;
size = 0;
-@@ -2441,7 +2437,8 @@ static int nf_tables_delrule(struct net
+@@ -2446,7 +2442,8 @@ static int nf_tables_delrule(struct net
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -2452,7 +2449,7 @@ static int nf_tables_delrule(struct net
+@@ -2457,7 +2454,7 @@ static int nf_tables_delrule(struct net
return PTR_ERR(chain);
}
if (chain) {
if (nla[NFTA_RULE_HANDLE]) {
-@@ -2650,13 +2647,13 @@ static int nft_ctx_init_from_setattr(str
+@@ -2655,13 +2652,13 @@ static int nft_ctx_init_from_setattr(str
if (afi == NULL)
return -EAFNOSUPPORT;
return 0;
}
-@@ -2783,7 +2780,7 @@ static int nf_tables_fill_set(struct sk_
+@@ -2788,7 +2785,7 @@ static int nf_tables_fill_set(struct sk_
goto nla_put_failure;
nfmsg = nlmsg_data(nlh);
nfmsg->version = NFNETLINK_V0;
nfmsg->res_id = htons(ctx->net->nft.base_seq & 0xffff);
-@@ -2875,10 +2872,8 @@ static int nf_tables_dump_sets(struct sk
+@@ -2880,10 +2877,8 @@ static int nf_tables_dump_sets(struct sk
{
const struct nft_set *set;
unsigned int idx, s_idx = cb->args[0];
struct nft_ctx *ctx = cb->data, ctx_set;
if (cb->args[1])
-@@ -2887,51 +2882,44 @@ static int nf_tables_dump_sets(struct sk
+@@ -2892,51 +2887,44 @@ static int nf_tables_dump_sets(struct sk
rcu_read_lock();
cb->seq = net->nft.base_seq;
}
cb->args[1] = 1;
done:
-@@ -3141,11 +3129,12 @@ static int nf_tables_newset(struct net *
+@@ -3146,11 +3134,12 @@ static int nf_tables_newset(struct net *
if (IS_ERR(afi))
return PTR_ERR(afi);
set = nf_tables_set_lookup(table, nla[NFTA_SET_NAME], genmask);
if (IS_ERR(set)) {
-@@ -3410,12 +3399,12 @@ static int nft_ctx_init_from_elemattr(st
+@@ -3417,12 +3406,12 @@ static int nft_ctx_init_from_elemattr(st
if (IS_ERR(afi))
return PTR_ERR(afi);
return 0;
}
-@@ -3520,7 +3509,6 @@ static int nf_tables_dump_set(struct sk_
+@@ -3527,7 +3516,6 @@ static int nf_tables_dump_set(struct sk_
{
struct nft_set_dump_ctx *dump_ctx = cb->data;
struct net *net = sock_net(skb->sk);
struct nft_table *table;
struct nft_set *set;
struct nft_set_dump_args args;
-@@ -3532,21 +3520,19 @@ static int nf_tables_dump_set(struct sk_
+@@ -3539,21 +3527,19 @@ static int nf_tables_dump_set(struct sk_
int event;
rcu_read_lock();
}
break;
}
-@@ -3566,7 +3552,7 @@ static int nf_tables_dump_set(struct sk_
+@@ -3573,7 +3559,7 @@ static int nf_tables_dump_set(struct sk_
goto nla_put_failure;
nfmsg = nlmsg_data(nlh);
nfmsg->version = NFNETLINK_V0;
nfmsg->res_id = htons(net->nft.base_seq & 0xffff);
-@@ -3668,7 +3654,7 @@ static int nf_tables_fill_setelem_info(s
+@@ -3675,7 +3661,7 @@ static int nf_tables_fill_setelem_info(s
goto nla_put_failure;
nfmsg = nlmsg_data(nlh);
nfmsg->version = NFNETLINK_V0;
nfmsg->res_id = htons(ctx->net->nft.base_seq & 0xffff);
-@@ -3912,7 +3898,7 @@ static int nft_add_set_elem(struct nft_c
+@@ -3919,7 +3905,7 @@ static int nft_add_set_elem(struct nft_c
list_for_each_entry(binding, &set->bindings, list) {
struct nft_ctx bind_ctx = {
.net = ctx->net,
.table = ctx->table,
.chain = (struct nft_chain *)binding->chain,
};
-@@ -4459,7 +4445,8 @@ static int nf_tables_newobj(struct net *
+@@ -4466,7 +4452,8 @@ static int nf_tables_newobj(struct net *
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4477,7 +4464,7 @@ static int nf_tables_newobj(struct net *
+@@ -4484,7 +4471,7 @@ static int nf_tables_newobj(struct net *
return 0;
}
type = nft_obj_type_get(objtype);
if (IS_ERR(type))
-@@ -4554,7 +4541,6 @@ struct nft_obj_filter {
+@@ -4561,7 +4548,6 @@ struct nft_obj_filter {
static int nf_tables_dump_obj(struct sk_buff *skb, struct netlink_callback *cb)
{
const struct nfgenmsg *nfmsg = nlmsg_data(cb->nlh);
const struct nft_table *table;
unsigned int idx = 0, s_idx = cb->args[0];
struct nft_obj_filter *filter = cb->data;
-@@ -4569,38 +4555,37 @@ static int nf_tables_dump_obj(struct sk_
+@@ -4576,38 +4562,37 @@ static int nf_tables_dump_obj(struct sk_
rcu_read_lock();
cb->seq = net->nft.base_seq;
}
}
done:
-@@ -4687,7 +4672,8 @@ static int nf_tables_getobj(struct net *
+@@ -4694,7 +4679,8 @@ static int nf_tables_getobj(struct net *
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4747,7 +4733,8 @@ static int nf_tables_delobj(struct net *
+@@ -4754,7 +4740,8 @@ static int nf_tables_delobj(struct net *
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4758,7 +4745,7 @@ static int nf_tables_delobj(struct net *
+@@ -4765,7 +4752,7 @@ static int nf_tables_delobj(struct net *
if (obj->use > 0)
return -EBUSY;
return nft_delobj(&ctx, obj);
}
-@@ -4796,7 +4783,7 @@ static void nf_tables_obj_notify(const s
+@@ -4803,7 +4790,7 @@ static void nf_tables_obj_notify(const s
struct nft_object *obj, int event)
{
nft_obj_notify(ctx->net, ctx->table, obj, ctx->portid, ctx->seq, event,
}
/*
-@@ -4986,7 +4973,7 @@ void nft_flow_table_iterate(struct net *
+@@ -4993,7 +4980,7 @@ void nft_flow_table_iterate(struct net *
rcu_read_lock();
list_for_each_entry_rcu(afi, &net->nft.af_info, list) {
list_for_each_entry_rcu(flowtable, &table->flowtables, list) {
iter(&flowtable->data, data);
}
-@@ -5034,7 +5021,8 @@ static int nf_tables_newflowtable(struct
+@@ -5041,7 +5028,8 @@ static int nf_tables_newflowtable(struct
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -5051,7 +5039,7 @@ static int nf_tables_newflowtable(struct
+@@ -5058,7 +5046,7 @@ static int nf_tables_newflowtable(struct
return 0;
}
flowtable = kzalloc(sizeof(*flowtable), GFP_KERNEL);
if (!flowtable)
-@@ -5132,7 +5120,8 @@ static int nf_tables_delflowtable(struct
+@@ -5139,7 +5127,8 @@ static int nf_tables_delflowtable(struct
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -5143,7 +5132,7 @@ static int nf_tables_delflowtable(struct
+@@ -5150,7 +5139,7 @@ static int nf_tables_delflowtable(struct
if (flowtable->use > 0)
return -EBUSY;
return nft_delflowtable(&ctx, flowtable);
}
-@@ -5212,40 +5201,37 @@ static int nf_tables_dump_flowtable(stru
+@@ -5219,40 +5208,37 @@ static int nf_tables_dump_flowtable(stru
struct net *net = sock_net(skb->sk);
int family = nfmsg->nfgen_family;
struct nft_flowtable *flowtable;
}
}
done:
-@@ -5330,7 +5316,8 @@ static int nf_tables_getflowtable(struct
+@@ -5337,7 +5323,8 @@ static int nf_tables_getflowtable(struct
if (IS_ERR(afi))
return PTR_ERR(afi);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -5373,7 +5360,7 @@ static void nf_tables_flowtable_notify(s
+@@ -5380,7 +5367,7 @@ static void nf_tables_flowtable_notify(s
err = nf_tables_fill_flowtable_info(skb, ctx->net, ctx->portid,
ctx->seq, event, 0,
if (err < 0) {
kfree_skb(skb);
goto err;
-@@ -5451,17 +5438,14 @@ static int nf_tables_flowtable_event(str
+@@ -5458,17 +5445,14 @@ static int nf_tables_flowtable_event(str
struct net_device *dev = netdev_notifier_info_to_dev(ptr);
struct nft_flowtable *flowtable;
struct nft_table *table;
}
}
nfnl_unlock(NFNL_SUBSYS_NFTABLES);
-@@ -6480,6 +6464,7 @@ EXPORT_SYMBOL_GPL(nft_data_dump);
+@@ -6487,6 +6471,7 @@ EXPORT_SYMBOL_GPL(nft_data_dump);
static int __net_init nf_tables_init_net(struct net *net)
{
INIT_LIST_HEAD(&net->nft.af_info);
INIT_LIST_HEAD(&net->nft.commit_list);
net->nft.base_seq = 1;
return 0;
-@@ -6516,10 +6501,10 @@ static void __nft_release_afinfo(struct
+@@ -6523,10 +6508,10 @@ static void __nft_release_afinfo(struct
struct nft_set *set, *ns;
struct nft_ctx ctx = {
.net = net,
static struct pernet_operations clusterip_net_ops = {
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -6470,6 +6470,12 @@ static int __net_init nf_tables_init_net
+@@ -6477,6 +6477,12 @@ static int __net_init nf_tables_init_net
return 0;
}
int __nft_release_basechain(struct nft_ctx *ctx)
{
struct nft_rule *rule, *nr;
-@@ -6547,6 +6553,7 @@ static void __nft_release_afinfo(struct
+@@ -6554,6 +6560,7 @@ static void __nft_release_afinfo(struct
static struct pernet_operations nf_tables_net_ops = {
.init = nf_tables_init_net,
if (afi->family == family)
return afi;
}
-@@ -4968,15 +4966,12 @@ void nft_flow_table_iterate(struct net *
+@@ -4975,15 +4973,12 @@ void nft_flow_table_iterate(struct net *
void *data)
{
struct nft_flowtable *flowtable;
}
}
rcu_read_unlock();
-@@ -6461,21 +6456,6 @@ int nft_data_dump(struct sk_buff *skb, i
+@@ -6468,21 +6463,6 @@ int nft_data_dump(struct sk_buff *skb, i
}
EXPORT_SYMBOL_GPL(nft_data_dump);
int __nft_release_basechain(struct nft_ctx *ctx)
{
struct nft_rule *rule, *nr;
-@@ -6496,8 +6476,7 @@ int __nft_release_basechain(struct nft_c
+@@ -6503,8 +6483,7 @@ int __nft_release_basechain(struct nft_c
}
EXPORT_SYMBOL_GPL(__nft_release_basechain);
{
struct nft_flowtable *flowtable, *nf;
struct nft_table *table, *nt;
-@@ -6507,10 +6486,11 @@ static void __nft_release_afinfo(struct
+@@ -6514,10 +6493,11 @@ static void __nft_release_afinfo(struct
struct nft_set *set, *ns;
struct nft_ctx ctx = {
.net = net,
list_for_each_entry(chain, &table->chains, list)
nf_tables_unregister_hook(net, table, chain);
list_for_each_entry(flowtable, &table->flowtables, list)
-@@ -6551,6 +6531,21 @@ static void __nft_release_afinfo(struct
+@@ -6558,6 +6538,21 @@ static void __nft_release_afinfo(struct
}
}
n = 0;
size = 0;
-@@ -2424,18 +2313,13 @@ static int nf_tables_delrule(struct net
+@@ -2429,18 +2318,13 @@ static int nf_tables_delrule(struct net
{
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
u8 genmask = nft_genmask_next(net);
genmask);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -2447,7 +2331,7 @@ static int nf_tables_delrule(struct net
+@@ -2452,7 +2336,7 @@ static int nf_tables_delrule(struct net
return PTR_ERR(chain);
}
if (chain) {
if (nla[NFTA_RULE_HANDLE]) {
-@@ -2632,26 +2516,17 @@ static int nft_ctx_init_from_setattr(str
+@@ -2637,26 +2521,17 @@ static int nft_ctx_init_from_setattr(str
u8 genmask)
{
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
return 0;
}
-@@ -2882,7 +2757,7 @@ static int nf_tables_dump_sets(struct sk
+@@ -2887,7 +2762,7 @@ static int nf_tables_dump_sets(struct sk
list_for_each_entry_rcu(table, &net->nft.tables, list) {
if (ctx->family != NFPROTO_UNSPEC &&
continue;
if (ctx->table && ctx->table != table)
-@@ -2903,7 +2778,7 @@ static int nf_tables_dump_sets(struct sk
+@@ -2908,7 +2783,7 @@ static int nf_tables_dump_sets(struct sk
ctx_set = *ctx;
ctx_set.table = table;
if (nf_tables_fill_set(skb, &ctx_set, set,
NFT_MSG_NEWSET,
-@@ -3015,8 +2890,8 @@ static int nf_tables_newset(struct net *
+@@ -3020,8 +2895,8 @@ static int nf_tables_newset(struct net *
{
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
u8 genmask = nft_genmask_next(net);
struct nft_table *table;
struct nft_set *set;
struct nft_ctx ctx;
-@@ -3123,16 +2998,12 @@ static int nf_tables_newset(struct net *
+@@ -3128,16 +3003,12 @@ static int nf_tables_newset(struct net *
create = nlh->nlmsg_flags & NLM_F_CREATE ? true : false;
set = nf_tables_set_lookup(table, nla[NFTA_SET_NAME], genmask);
if (IS_ERR(set)) {
-@@ -3390,19 +3261,15 @@ static int nft_ctx_init_from_elemattr(st
+@@ -3397,19 +3268,15 @@ static int nft_ctx_init_from_elemattr(st
u8 genmask)
{
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
return 0;
}
-@@ -3520,7 +3387,7 @@ static int nf_tables_dump_set(struct sk_
+@@ -3527,7 +3394,7 @@ static int nf_tables_dump_set(struct sk_
rcu_read_lock();
list_for_each_entry_rcu(table, &net->nft.tables, list) {
if (dump_ctx->ctx.family != NFPROTO_UNSPEC &&
continue;
if (table != dump_ctx->ctx.table)
-@@ -3550,7 +3417,7 @@ static int nf_tables_dump_set(struct sk_
+@@ -3557,7 +3424,7 @@ static int nf_tables_dump_set(struct sk_
goto nla_put_failure;
nfmsg = nlmsg_data(nlh);
nfmsg->version = NFNETLINK_V0;
nfmsg->res_id = htons(net->nft.base_seq & 0xffff);
-@@ -4427,7 +4294,6 @@ static int nf_tables_newobj(struct net *
+@@ -4434,7 +4301,6 @@ static int nf_tables_newobj(struct net *
const struct nft_object_type *type;
u8 genmask = nft_genmask_next(net);
int family = nfmsg->nfgen_family;
struct nft_table *table;
struct nft_object *obj;
struct nft_ctx ctx;
-@@ -4439,11 +4305,7 @@ static int nf_tables_newobj(struct net *
+@@ -4446,11 +4312,7 @@ static int nf_tables_newobj(struct net *
!nla[NFTA_OBJ_DATA])
return -EINVAL;
genmask);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4462,7 +4324,7 @@ static int nf_tables_newobj(struct net *
+@@ -4469,7 +4331,7 @@ static int nf_tables_newobj(struct net *
return 0;
}
type = nft_obj_type_get(objtype);
if (IS_ERR(type))
-@@ -4554,7 +4416,7 @@ static int nf_tables_dump_obj(struct sk_
+@@ -4561,7 +4423,7 @@ static int nf_tables_dump_obj(struct sk_
cb->seq = net->nft.base_seq;
list_for_each_entry_rcu(table, &net->nft.tables, list) {
continue;
list_for_each_entry_rcu(obj, &table->objects, list) {
-@@ -4577,7 +4439,7 @@ static int nf_tables_dump_obj(struct sk_
+@@ -4584,7 +4446,7 @@ static int nf_tables_dump_obj(struct sk_
cb->nlh->nlmsg_seq,
NFT_MSG_NEWOBJ,
NLM_F_MULTI | NLM_F_APPEND,
obj, reset) < 0)
goto done;
-@@ -4635,7 +4497,6 @@ static int nf_tables_getobj(struct net *
+@@ -4642,7 +4504,6 @@ static int nf_tables_getobj(struct net *
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
u8 genmask = nft_genmask_cur(net);
int family = nfmsg->nfgen_family;
const struct nft_table *table;
struct nft_object *obj;
struct sk_buff *skb2;
-@@ -4666,11 +4527,7 @@ static int nf_tables_getobj(struct net *
+@@ -4673,11 +4534,7 @@ static int nf_tables_getobj(struct net *
!nla[NFTA_OBJ_TYPE])
return -EINVAL;
genmask);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4717,7 +4574,6 @@ static int nf_tables_delobj(struct net *
+@@ -4724,7 +4581,6 @@ static int nf_tables_delobj(struct net *
const struct nfgenmsg *nfmsg = nlmsg_data(nlh);
u8 genmask = nft_genmask_next(net);
int family = nfmsg->nfgen_family;
struct nft_table *table;
struct nft_object *obj;
struct nft_ctx ctx;
-@@ -4727,11 +4583,7 @@ static int nf_tables_delobj(struct net *
+@@ -4734,11 +4590,7 @@ static int nf_tables_delobj(struct net *
!nla[NFTA_OBJ_NAME])
return -EINVAL;
genmask);
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -4743,7 +4595,7 @@ static int nf_tables_delobj(struct net *
+@@ -4750,7 +4602,7 @@ static int nf_tables_delobj(struct net *
if (obj->use > 0)
return -EBUSY;
return nft_delobj(&ctx, obj);
}
-@@ -4928,33 +4780,31 @@ err1:
+@@ -4935,33 +4787,31 @@ err1:
return err;
}
return ERR_PTR(-EAGAIN);
}
#endif
-@@ -5002,7 +4852,6 @@ static int nf_tables_newflowtable(struct
+@@ -5009,7 +4859,6 @@ static int nf_tables_newflowtable(struct
u8 genmask = nft_genmask_next(net);
int family = nfmsg->nfgen_family;
struct nft_flowtable *flowtable;
struct nft_table *table;
struct nft_ctx ctx;
int err, i, k;
-@@ -5012,12 +4861,8 @@ static int nf_tables_newflowtable(struct
+@@ -5019,12 +4868,8 @@ static int nf_tables_newflowtable(struct
!nla[NFTA_FLOWTABLE_HOOK])
return -EINVAL;
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -5034,7 +4879,7 @@ static int nf_tables_newflowtable(struct
+@@ -5041,7 +4886,7 @@ static int nf_tables_newflowtable(struct
return 0;
}
flowtable = kzalloc(sizeof(*flowtable), GFP_KERNEL);
if (!flowtable)
-@@ -5047,7 +4892,7 @@ static int nf_tables_newflowtable(struct
+@@ -5054,7 +4899,7 @@ static int nf_tables_newflowtable(struct
goto err1;
}
if (IS_ERR(type)) {
err = PTR_ERR(type);
goto err2;
-@@ -5107,16 +4952,11 @@ static int nf_tables_delflowtable(struct
+@@ -5114,16 +4959,11 @@ static int nf_tables_delflowtable(struct
u8 genmask = nft_genmask_next(net);
int family = nfmsg->nfgen_family;
struct nft_flowtable *flowtable;
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -5127,7 +4967,7 @@ static int nf_tables_delflowtable(struct
+@@ -5134,7 +4974,7 @@ static int nf_tables_delflowtable(struct
if (flowtable->use > 0)
return -EBUSY;
return nft_delflowtable(&ctx, flowtable);
}
-@@ -5202,7 +5042,7 @@ static int nf_tables_dump_flowtable(stru
+@@ -5209,7 +5049,7 @@ static int nf_tables_dump_flowtable(stru
cb->seq = net->nft.base_seq;
list_for_each_entry_rcu(table, &net->nft.tables, list) {
continue;
list_for_each_entry_rcu(flowtable, &table->flowtables, list) {
-@@ -5221,7 +5061,7 @@ static int nf_tables_dump_flowtable(stru
+@@ -5228,7 +5068,7 @@ static int nf_tables_dump_flowtable(stru
cb->nlh->nlmsg_seq,
NFT_MSG_NEWFLOWTABLE,
NLM_F_MULTI | NLM_F_APPEND,
goto done;
nl_dump_check_consistent(cb, nlmsg_hdr(skb));
-@@ -5281,7 +5121,6 @@ static int nf_tables_getflowtable(struct
+@@ -5288,7 +5128,6 @@ static int nf_tables_getflowtable(struct
u8 genmask = nft_genmask_cur(net);
int family = nfmsg->nfgen_family;
struct nft_flowtable *flowtable;
const struct nft_table *table;
struct sk_buff *skb2;
int err;
-@@ -5307,12 +5146,8 @@ static int nf_tables_getflowtable(struct
+@@ -5314,12 +5153,8 @@ static int nf_tables_getflowtable(struct
if (!nla[NFTA_FLOWTABLE_NAME])
return -EINVAL;
if (IS_ERR(table))
return PTR_ERR(table);
-@@ -6476,7 +6311,7 @@ int __nft_release_basechain(struct nft_c
+@@ -6483,7 +6318,7 @@ int __nft_release_basechain(struct nft_c
}
EXPORT_SYMBOL_GPL(__nft_release_basechain);
{
struct nft_flowtable *flowtable, *nf;
struct nft_table *table, *nt;
-@@ -6489,7 +6324,7 @@ static void __nft_release_afinfo(struct
+@@ -6496,7 +6331,7 @@ static void __nft_release_afinfo(struct
};
list_for_each_entry_safe(table, nt, &net->nft.tables, list) {
list_for_each_entry(chain, &table->chains, list)
nf_tables_unregister_hook(net, table, chain);
-@@ -6541,7 +6376,7 @@ static int __net_init nf_tables_init_net
+@@ -6548,7 +6383,7 @@ static int __net_init nf_tables_init_net
static void __net_exit nf_tables_exit_net(struct net *net)
{
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -4818,13 +4818,13 @@ void nft_flow_table_iterate(struct net *
+@@ -4825,13 +4825,13 @@ void nft_flow_table_iterate(struct net *
struct nft_flowtable *flowtable;
const struct nft_table *table;
};
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -5203,17 +5203,12 @@ err:
+@@ -5210,17 +5210,12 @@ err:
nfnetlink_set_err(ctx->net, ctx->portid, NFNLGRP_NFTABLES, -ENOBUFS);
}
if (IS_ERR(chain))
return PTR_ERR(chain);
-@@ -2503,6 +2551,7 @@ static const struct nla_policy nft_set_p
+@@ -2508,6 +2556,7 @@ static const struct nla_policy nft_set_p
[NFTA_SET_USERDATA] = { .type = NLA_BINARY,
.len = NFT_USERDATA_MAXLEN },
[NFTA_SET_OBJ_TYPE] = { .type = NLA_U32 },
};
static const struct nla_policy nft_set_desc_policy[NFTA_SET_DESC_MAX + 1] = {
-@@ -2546,6 +2595,22 @@ static struct nft_set *nf_tables_set_loo
+@@ -2551,6 +2600,22 @@ static struct nft_set *nf_tables_set_loo
return ERR_PTR(-ENOENT);
}
static struct nft_set *nf_tables_set_lookup_byid(const struct net *net,
const struct nlattr *nla,
u8 genmask)
-@@ -2661,6 +2726,9 @@ static int nf_tables_fill_set(struct sk_
+@@ -2666,6 +2731,9 @@ static int nf_tables_fill_set(struct sk_
goto nla_put_failure;
if (nla_put_string(skb, NFTA_SET_NAME, set->name))
goto nla_put_failure;
if (set->flags != 0)
if (nla_put_be32(skb, NFTA_SET_FLAGS, htonl(set->flags)))
goto nla_put_failure;
-@@ -3069,6 +3137,7 @@ static int nf_tables_newset(struct net *
+@@ -3074,6 +3142,7 @@ static int nf_tables_newset(struct net *
set->udata = udata;
set->timeout = timeout;
set->gc_int = gc_int;
err = ops->init(set, &desc, nla);
if (err < 0)
-@@ -3126,7 +3195,10 @@ static int nf_tables_delset(struct net *
+@@ -3133,7 +3202,10 @@ static int nf_tables_delset(struct net *
if (err < 0)
return err;
if (IS_ERR(set))
return PTR_ERR(set);
-@@ -4182,6 +4254,21 @@ struct nft_object *nf_tables_obj_lookup(
+@@ -4189,6 +4261,21 @@ struct nft_object *nf_tables_obj_lookup(
}
EXPORT_SYMBOL_GPL(nf_tables_obj_lookup);
static const struct nla_policy nft_obj_policy[NFTA_OBJ_MAX + 1] = {
[NFTA_OBJ_TABLE] = { .type = NLA_STRING,
.len = NFT_TABLE_MAXNAMELEN - 1 },
-@@ -4189,6 +4276,7 @@ static const struct nla_policy nft_obj_p
+@@ -4196,6 +4283,7 @@ static const struct nla_policy nft_obj_p
.len = NFT_OBJ_MAXNAMELEN - 1 },
[NFTA_OBJ_TYPE] = { .type = NLA_U32 },
[NFTA_OBJ_DATA] = { .type = NLA_NESTED },
};
static struct nft_object *nft_obj_init(const struct nft_ctx *ctx,
-@@ -4336,6 +4424,8 @@ static int nf_tables_newobj(struct net *
+@@ -4343,6 +4431,8 @@ static int nf_tables_newobj(struct net *
goto err1;
}
obj->table = table;
obj->name = nla_strdup(nla[NFTA_OBJ_NAME], GFP_KERNEL);
if (!obj->name) {
err = -ENOMEM;
-@@ -4382,7 +4472,9 @@ static int nf_tables_fill_obj_info(struc
+@@ -4389,7 +4479,9 @@ static int nf_tables_fill_obj_info(struc
nla_put_string(skb, NFTA_OBJ_NAME, obj->name) ||
nla_put_be32(skb, NFTA_OBJ_TYPE, htonl(obj->ops->type->type)) ||
nla_put_be32(skb, NFTA_OBJ_USE, htonl(obj->use)) ||
goto nla_put_failure;
nlmsg_end(skb, nlh);
-@@ -4580,7 +4672,7 @@ static int nf_tables_delobj(struct net *
+@@ -4587,7 +4679,7 @@ static int nf_tables_delobj(struct net *
u32 objtype;
if (!nla[NFTA_OBJ_TYPE] ||
return -EINVAL;
table = nf_tables_table_lookup(net, nla[NFTA_OBJ_TABLE], family,
-@@ -4589,7 +4681,12 @@ static int nf_tables_delobj(struct net *
+@@ -4596,7 +4688,12 @@ static int nf_tables_delobj(struct net *
return PTR_ERR(table);
objtype = ntohl(nla_get_be32(nla[NFTA_OBJ_TYPE]));
if (IS_ERR(obj))
return PTR_ERR(obj);
if (obj->use > 0)
-@@ -4661,6 +4758,7 @@ static const struct nla_policy nft_flowt
+@@ -4668,6 +4765,7 @@ static const struct nla_policy nft_flowt
[NFTA_FLOWTABLE_NAME] = { .type = NLA_STRING,
.len = NFT_NAME_MAXLEN - 1 },
[NFTA_FLOWTABLE_HOOK] = { .type = NLA_NESTED },
};
struct nft_flowtable *nf_tables_flowtable_lookup(const struct nft_table *table,
-@@ -4678,6 +4776,20 @@ struct nft_flowtable *nf_tables_flowtabl
+@@ -4685,6 +4783,20 @@ struct nft_flowtable *nf_tables_flowtabl
}
EXPORT_SYMBOL_GPL(nf_tables_flowtable_lookup);
#define NFT_FLOWTABLE_DEVICE_MAX 8
static int nf_tables_parse_devices(const struct nft_ctx *ctx,
-@@ -4886,6 +4998,8 @@ static int nf_tables_newflowtable(struct
+@@ -4893,6 +5005,8 @@ static int nf_tables_newflowtable(struct
return -ENOMEM;
flowtable->table = table;
flowtable->name = nla_strdup(nla[NFTA_FLOWTABLE_NAME], GFP_KERNEL);
if (!flowtable->name) {
err = -ENOMEM;
-@@ -4960,8 +5074,14 @@ static int nf_tables_delflowtable(struct
+@@ -4967,8 +5081,14 @@ static int nf_tables_delflowtable(struct
if (IS_ERR(table))
return PTR_ERR(table);
if (IS_ERR(flowtable))
return PTR_ERR(flowtable);
if (flowtable->use > 0)
-@@ -4994,7 +5114,9 @@ static int nf_tables_fill_flowtable_info
+@@ -5001,7 +5121,9 @@ static int nf_tables_fill_flowtable_info
if (nla_put_string(skb, NFTA_FLOWTABLE_TABLE, flowtable->table->name) ||
nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) ||
.owner = THIS_MODULE,
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -5013,40 +5013,38 @@ static int nf_tables_newflowtable(struct
+@@ -5020,40 +5020,38 @@ static int nf_tables_newflowtable(struct
}
flowtable->data.type = type;
err3:
module_put(type->owner);
err2:
-@@ -5327,10 +5325,8 @@ err:
+@@ -5334,10 +5332,8 @@ err:
static void nf_tables_flowtable_destroy(struct nft_flowtable *flowtable)
{
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -4879,7 +4879,7 @@ static int nf_tables_flowtable_parse_hoo
+@@ -4886,7 +4886,7 @@ static int nf_tables_flowtable_parse_hoo
flowtable->ops[i].pf = NFPROTO_NETDEV;
flowtable->ops[i].hooknum = hooknum;
flowtable->ops[i].priority = priority;
WARN_ON(!nf_flow_offload_gc_step(flow_table));
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -4923,23 +4923,6 @@ static const struct nf_flowtable_type *n
+@@ -4930,23 +4930,6 @@ static const struct nf_flowtable_type *n
return ERR_PTR(-ENOENT);
}
+MODULE_ALIAS("nf-flow-table-hw");
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -4866,6 +4866,14 @@ static int nf_tables_flowtable_parse_hoo
+@@ -4873,6 +4873,14 @@ static int nf_tables_flowtable_parse_hoo
if (err < 0)
goto err1;
ops = kzalloc(sizeof(struct nf_hook_ops) * n, GFP_KERNEL);
if (!ops) {
err = -ENOMEM;
-@@ -4996,10 +5004,19 @@ static int nf_tables_newflowtable(struct
+@@ -5003,10 +5011,19 @@ static int nf_tables_newflowtable(struct
}
flowtable->data.type = type;
err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK],
flowtable);
if (err < 0)
-@@ -5097,7 +5114,8 @@ static int nf_tables_fill_flowtable_info
+@@ -5104,7 +5121,8 @@ static int nf_tables_fill_flowtable_info
nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) ||
nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) ||
nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle),
- clock-names: Must contain "core" for the core clock and "iface" for the
interface clock.
@@ -22,7 +21,7 @@ Example:
- compatible = "qcom,adm";
- reg = <0x18300000 0x100000>;
- interrupts = <0 170 0>;
+ compatible = "qcom,adm";
+ reg = <0x18300000 0x100000>;
+ interrupts = <0 170 0>;
- #dma-cells = <2>;
+ #dma-cells = <1>;
-
- clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
- clock-names = "core", "iface";
+
+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+ clock-names = "core", "iface";
@@ -35,15 +34,12 @@ Example:
- qcom,ee = <0>;
- };
-
+ qcom,ee = <0>;
+ };
+
-DMA clients must use the format descripted in the dma.txt file, using a three
+DMA clients must use the format descripted in the dma.txt file, using a two
cell specifier for each channel.
-
+
-Each dmas request consists of 3 cells:
+Each dmas request consists of two cells:
1. phandle pointing to the DMA controller
- 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.
- The CRCI is used for flow control. It identifies the peripheral device that
- is the source/destination for the transferred data.
-
+
Example:
-
+
@@ -55,7 +51,7 @@ Example:
-
- cs-gpios = <&qcom_pinmux 20 0>;
-
+
+ cs-gpios = <&qcom_pinmux 20 0>;
+
- dmas = <&adm_dma 6 9>,
- <&adm_dma 5 10>;
+ dmas = <&adm_dma 6>,
+ <&adm_dma 5>;
- dma-names = "rx", "tx";
- };
+ dma-names = "rx", "tx";
+ };
--- a/drivers/dma/qcom/Kconfig
+++ b/drivers/dma/qcom/Kconfig
@@ -27,3 +27,13 @@ config QCOM_HIDMA
- (user to kernel, kernel to kernel, etc.). It only supports
- memcpy interface. The core is not intended for general
- purpose slave DMA.
+ (user to kernel, kernel to kernel, etc.). It only supports
+ memcpy interface. The core is not intended for general
+ purpose slave DMA.
+
+config QCOM_ADM
+ tristate "Qualcomm ADM support"
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -294,7 +294,7 @@ static struct clk_rcg gsbi1_uart_src = {
- .parent_names = gcc_pxo_pll8,
- .num_parents = 2,
- .ops = &clk_rcg_ops,
+ .parent_names = gcc_pxo_pll8,
+ .num_parents = 2,
+ .ops = &clk_rcg_ops,
- .flags = CLK_SET_PARENT_GATE,
+ .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
- },
- },
+ },
+ },
};
@@ -312,7 +312,7 @@ static struct clk_branch gsbi1_uart_clk
- },
- .num_parents = 1,
- .ops = &clk_branch_ops,
+ },
+ .num_parents = 1,
+ .ops = &clk_branch_ops,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
- },
- },
+ },
+ },
};
@@ -890,6 +890,7 @@ static struct clk_branch gsbi1_h_clk = {
- .hw.init = &(struct clk_init_data){
- .name = "gsbi1_h_clk",
- .ops = &clk_branch_ops,
+ .hw.init = &(struct clk_init_data){
+ .name = "gsbi1_h_clk",
+ .ops = &clk_branch_ops,
+ .flags = CLK_IGNORE_UNUSED,
- },
- },
+ },
+ },
};
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -194,6 +194,13 @@ config MTD_MYLOADER_PARTS
- You will still need the parsing functions to be called by the driver
- for your particular device. It won't happen automatically.
-
+ You will still need the parsing functions to be called by the driver
+ for your particular device. It won't happen automatically.
+
+config MTD_QCOM_SMEM_PARTS
+ tristate "QCOM SMEM partitioning support"
+ depends on QCOM_SMEM
+ such as IPQ806x.
+
comment "User Modules And Translation Layers"
-
+
#
--- /dev/null
+++ b/drivers/mtd/qcom_smem_part.c
obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+obj-$(CONFIG_MTD_QCOM_SMEM_PARTS) += qcom_smem_part.o
obj-y += parsers/
-
+
# 'Users' - code which presents functionality to userspace.
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
-@@ -56,3 +56,15 @@
- select GENERIC_PHY
- help
- Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+@@ -56,3 +56,15 @@ config PHY_QCOM_USB_HSIC
+ select GENERIC_PHY
+ help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
+config PHY_QCOM_DWC3
+ tristate "QCOM DWC3 USB PHY support"
+
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
-@@ -8,3 +8,4 @@
+@@ -8,3 +8,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-
obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -6,6 +6,7 @@ menuconfig ARCH_QCOM
- select ARM_AMBA
- select PINCTRL
- select QCOM_SCM if SMP
+ select ARM_AMBA
+ select PINCTRL
+ select QCOM_SCM if SMP
+ select PCI_DOMAINS if PCI
- help
- Support for Qualcomm's devicetree based systems.
+ help
+ Support for Qualcomm's devicetree based systems.
+
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -7,6 +7,9 @@ config DMABOUNCE
- bool
- select ZONE_DMA
-
+ bool
+ select ZONE_DMA
+
+config KRAIT_L2_ACCESSORS
+ bool
+
config SHARP_LOCOMO
- bool
-
+ bool
+
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -7,6 +7,7 @@ obj-y += firmware.o
-
+
obj-$(CONFIG_SA1111) += sa1111.o
obj-$(CONFIG_DMABOUNCE) += dmabounce.o
+obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o
@@ -26,35 +26,24 @@
* parent - parent is adjustable through clk_set_parent
*/
-
+
-static u8 clk_mux_get_parent(struct clk_hw *hw)
+unsigned int clk_mux_get_parent(struct clk_hw *hw, unsigned int val,
+ unsigned int *table, unsigned long flags)
{
- struct clk_mux *mux = to_clk_mux(hw);
- int num_parents = clk_hw_get_num_parents(hw);
+ int num_parents = clk_hw_get_num_parents(hw);
- u32 val;
-
- /*
- */
- val = clk_readl(mux->reg) >> mux->shift;
- val &= mux->mask;
-
+
- if (mux->table) {
+ if (table) {
- int i;
-
- for (i = 0; i < num_parents; i++)
+ int i;
+
+ for (i = 0; i < num_parents; i++)
- if (mux->table[i] == val)
+ if (table[i] == val)
- return i;
- return -EINVAL;
- }
-
+ return i;
+ return -EINVAL;
+ }
+
- if (val && (mux->flags & CLK_MUX_INDEX_BIT))
+ if (val && (flags & CLK_MUX_INDEX_BIT))
- val = ffs(val) - 1;
-
+ val = ffs(val) - 1;
+
- if (val && (mux->flags & CLK_MUX_INDEX_ONE))
+ if (val && (flags & CLK_MUX_INDEX_ONE))
- val--;
-
- if (val >= num_parents)
+ val--;
+
+ if (val >= num_parents)
@@ -62,23 +51,53 @@ static u8 clk_mux_get_parent(struct clk_
-
- return val;
+
+ return val;
}
+EXPORT_SYMBOL_GPL(clk_mux_get_parent);
-
+
-static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
+static u8 _clk_mux_get_parent(struct clk_hw *hw)
{
- struct clk_mux *mux = to_clk_mux(hw);
- u32 val;
+ struct clk_mux *mux = to_clk_mux(hw);
+ u32 val;
- unsigned long flags = 0;
-
+
- if (mux->table) {
- index = mux->table[index];
+ /*
+
+ if (table) {
+ val = table[val];
- } else {
+ } else {
- if (mux->flags & CLK_MUX_INDEX_BIT)
- index = 1 << index;
+ if (flags & CLK_MUX_INDEX_BIT)
+ val = 1 << index;
-
+
- if (mux->flags & CLK_MUX_INDEX_ONE)
- index++;
+ if (flags & CLK_MUX_INDEX_ONE)
+ val++;
- }
-
+ }
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(clk_mux_reindex);
+
+ index = clk_mux_reindex(index, mux->table, mux->flags);
+
- if (mux->lock)
- spin_lock_irqsave(mux->lock, flags);
- else
+ if (mux->lock)
+ spin_lock_irqsave(mux->lock, flags);
+ else
@@ -102,14 +121,14 @@ static int clk_mux_set_parent(struct clk
}
-
+
const struct clk_ops clk_mux_ops = {
- .get_parent = clk_mux_get_parent,
+ .get_parent = _clk_mux_get_parent,
- .set_parent = clk_mux_set_parent,
- .determine_rate = __clk_mux_determine_rate,
+ .set_parent = clk_mux_set_parent,
+ .determine_rate = __clk_mux_determine_rate,
};
EXPORT_SYMBOL_GPL(clk_mux_ops);
-
+
const struct clk_ops clk_mux_ro_ops = {
- .get_parent = clk_mux_get_parent,
+ .get_parent = _clk_mux_get_parent,
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
-
+
@@ -117,7 +136,7 @@ struct clk_hw *clk_hw_register_mux_table
- const char * const *parent_names, u8 num_parents,
- unsigned long flags,
- void __iomem *reg, u8 shift, u32 mask,
+ const char * const *parent_names, u8 num_parents,
+ unsigned long flags,
+ void __iomem *reg, u8 shift, u32 mask,
- u8 clk_mux_flags, u32 *table, spinlock_t *lock)
+ u8 clk_mux_flags, unsigned int *table, spinlock_t *lock)
{
- struct clk_mux *mux;
- struct clk_hw *hw;
+ struct clk_mux *mux;
+ struct clk_hw *hw;
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -468,7 +468,7 @@ void clk_hw_unregister_divider(struct cl
struct clk_mux {
- struct clk_hw hw;
- void __iomem *reg;
+ struct clk_hw hw;
+ void __iomem *reg;
- u32 *table;
+ unsigned int *table;
- u32 mask;
- u8 shift;
- u8 flags;
+ u32 mask;
+ u8 shift;
+ u8 flags;
@@ -486,6 +486,11 @@ struct clk_mux {
extern const struct clk_ops clk_mux_ops;
extern const struct clk_ops clk_mux_ro_ops;
-
+
+unsigned int clk_mux_get_parent(struct clk_hw *hw, unsigned int val,
+ unsigned int *table, unsigned long flags);
+unsigned int clk_mux_reindex(u8 index, unsigned int *table,
+ unsigned long flags);
+
struct clk *clk_register_mux(struct device *dev, const char *name,
- const char * const *parent_names, u8 num_parents,
- unsigned long flags,
+ const char * const *parent_names, u8 num_parents,
+ unsigned long flags,
@@ -506,7 +511,7 @@ struct clk_hw *clk_hw_register_mux_table
- const char * const *parent_names, u8 num_parents,
- unsigned long flags,
- void __iomem *reg, u8 shift, u32 mask,
+ const char * const *parent_names, u8 num_parents,
+ unsigned long flags,
+ void __iomem *reg, u8 shift, u32 mask,
- u8 clk_mux_flags, u32 *table, spinlock_t *lock);
+ u8 clk_mux_flags, unsigned int *table, spinlock_t *lock);
-
+
void clk_unregister_mux(struct clk *clk);
void clk_hw_unregister_mux(struct clk_hw *hw);
+clk-qcom-y += clk-hfpll.o
clk-qcom-y += reset.o
clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
-
+
--- /dev/null
+++ b/drivers/clk/qcom/clk-hfpll.c
@@ -0,0 +1,253 @@
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -196,3 +196,11 @@ config MSM_MMCC_8996
- Support for the multimedia clock controller on msm8996 devices.
- Say Y if you want to support multimedia devices such as display,
- graphics, video encode/decode, camera, etc.
+ Support for the multimedia clock controller on msm8996 devices.
+ Say Y if you want to support multimedia devices such as display,
+ graphics, video encode/decode, camera, etc.
+
+config QCOM_HFPLL
+ tristate "High-Frequency PLL (HFPLL) Clock Controller"
#include "clk-branch.h"
+#include "clk-hfpll.h"
#include "reset.h"
-
+
static struct clk_pll pll0 = {
@@ -113,6 +114,84 @@ static struct clk_regmap pll8_vote = {
- },
+ },
};
-
+
+static struct hfpll_data hfpll0_data = {
+ .mode_reg = 0x3200,
+ .l_reg = 0x3208,
+};
+
static struct clk_pll pll14 = {
- .l_reg = 0x31c4,
- .m_reg = 0x31c8,
+ .l_reg = 0x31c4,
+ .m_reg = 0x31c8,
@@ -2801,6 +2880,9 @@ static struct clk_regmap *gcc_ipq806x_cl
- [UBI32_CORE2_CLK_SRC] = &ubi32_core2_src_clk.clkr,
- [NSSTCM_CLK_SRC] = &nss_tcm_src.clkr,
- [NSSTCM_CLK] = &nss_tcm_clk.clkr,
+ [UBI32_CORE2_CLK_SRC] = &ubi32_core2_src_clk.clkr,
+ [NSSTCM_CLK_SRC] = &nss_tcm_src.clkr,
+ [NSSTCM_CLK] = &nss_tcm_clk.clkr,
+ [PLL9] = &hfpll0.clkr,
+ [PLL10] = &hfpll1.clkr,
+ [PLL12] = &hfpll_l2.clkr,
};
-
+
static const struct qcom_reset_map gcc_ipq806x_resets[] = {
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -204,3 +204,7 @@ config QCOM_HFPLL
- Support for the high-frequency PLLs present on Qualcomm devices.
- Say Y if you want to support CPU frequency scaling on devices
- such as MSM8974, APQ8084, etc.
+ Support for the high-frequency PLLs present on Qualcomm devices.
+ Say Y if you want to support CPU frequency scaling on devices
+ such as MSM8974, APQ8084, etc.
+
+config KRAIT_CLOCKS
+ bool
--- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
@@ -21,10 +21,17 @@ PROPERTIES
- the register region. An optional second element specifies
- the base address and size of the alias register region.
-
+ the register region. An optional second element specifies
+ the base address and size of the alias register region.
+
+- clock-output-names:
+ Usage: optional
+ Value type: <string>
+ CPU number starting at 0.
+
Example:
-
- clock-controller@2088000 {
- compatible = "qcom,kpss-acc-v2";
- reg = <0x02088000 0x1000>,
- <0x02008000 0x1000>;
+
+ clock-controller@2088000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0x02088000 0x1000>,
+ <0x02008000 0x1000>;
+ clock-output-names = "acpu0_aux";
- };
+ };
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
@@ -0,0 +1,28 @@
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -205,6 +205,14 @@ config QCOM_HFPLL
- Say Y if you want to support CPU frequency scaling on devices
- such as MSM8974, APQ8084, etc.
-
+ Say Y if you want to support CPU frequency scaling on devices
+ such as MSM8974, APQ8084, etc.
+
+config KPSS_XCC
+ tristate "KPSS Clock Controller"
+ depends on COMMON_CLK_QCOM
+ as MSM8960, APQ8064, etc.
+
config KRAIT_CLOCKS
- bool
- select KRAIT_L2_ACCESSORS
+ bool
+ select KRAIT_L2_ACCESSORS
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -36,4 +36,5 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -213,6 +213,14 @@ config KPSS_XCC
- if you want to support CPU frequency scaling on devices such
- as MSM8960, APQ8064, etc.
-
+ if you want to support CPU frequency scaling on devices such
+ as MSM8960, APQ8064, etc.
+
+config KRAITCC
+ tristate "Krait Clock Controller"
+ depends on COMMON_CLK_QCOM && ARM
+ Say Y if you want to support CPU frequency scaling.
+
config KRAIT_CLOCKS
- bool
- select KRAIT_L2_ACCESSORS
+ bool
+ select KRAIT_L2_ACCESSORS
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
@@ -60,6 +60,8 @@ static int krait_mux_set_parent(struct c
- if (__clk_is_enabled(hw->clk))
- __krait_mux_set_sel(mux, sel);
-
+ if (__clk_is_enabled(hw->clk))
+ __krait_mux_set_sel(mux, sel);
+
+ mux->reparent = true;
+
- return 0;
+ return 0;
}
-
+
--- a/drivers/clk/qcom/clk-krait.h
+++ b/drivers/clk/qcom/clk-krait.h
@@ -23,6 +23,9 @@ struct krait_mux_clk {
- u32 shift;
- u32 en_mask;
- bool lpl;
+ u32 shift;
+ u32 en_mask;
+ bool lpl;
+ u8 safe_sel;
+ u8 old_index;
+ bool reparent;
-
- struct clk_hw hw;
- struct notifier_block clk_nb;
+
+ struct clk_hw hw;
+ struct notifier_block clk_nb;
--- a/drivers/clk/qcom/krait-cc.c
+++ b/drivers/clk/qcom/krait-cc.c
@@ -35,6 +35,49 @@ static unsigned int pri_mux_map[] = {
- 0,
+ 0,
};
-
+
+/*
+ * Notifier function for switching the muxes to safe parent
+ * while the hfpll is getting reprogrammed.
{
@@ -79,6 +122,7 @@ static int
krait_add_sec_mux(struct device *dev, int id, const char *s,
- unsigned int offset, bool unique_aux)
+ unsigned int offset, bool unique_aux)
{
+ int ret;
- struct krait_mux_clk *mux;
- static const char *sec_mux_list[] = {
- "acpu_aux",
+ struct krait_mux_clk *mux;
+ static const char *sec_mux_list[] = {
+ "acpu_aux",
@@ -102,6 +146,7 @@ krait_add_sec_mux(struct device *dev, in
- mux->shift = 2;
- mux->parent_map = sec_mux_map;
- mux->hw.init = &init;
+ mux->shift = 2;
+ mux->parent_map = sec_mux_map;
+ mux->hw.init = &init;
+ mux->safe_sel = 0;
-
- init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
- if (!init.name)
+
+ init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
+ if (!init.name)
@@ -117,6 +162,11 @@ krait_add_sec_mux(struct device *dev, in
-
- clk = devm_clk_register(dev, &mux->hw);
-
+
+ clk = devm_clk_register(dev, &mux->hw);
+
+ ret = krait_notifier_register(dev, clk, mux);
+ if (ret)
+ goto unique_aux;
+
+unique_aux:
- if (unique_aux)
- kfree(sec_mux_list[0]);
+ if (unique_aux)
+ kfree(sec_mux_list[0]);
err_aux:
@@ -128,6 +178,7 @@ static struct clk *
krait_add_pri_mux(struct device *dev, int id, const char *s,
- unsigned int offset)
+ unsigned int offset)
{
+ int ret;
- struct krait_mux_clk *mux;
- const char *p_names[3];
- struct clk_init_data init = {
+ struct krait_mux_clk *mux;
+ const char *p_names[3];
+ struct clk_init_data init = {
@@ -148,6 +199,7 @@ krait_add_pri_mux(struct device *dev, in
- mux->lpl = id >= 0;
- mux->parent_map = pri_mux_map;
- mux->hw.init = &init;
+ mux->lpl = id >= 0;
+ mux->parent_map = pri_mux_map;
+ mux->hw.init = &init;
+ mux->safe_sel = 2;
-
- init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s);
- if (!init.name)
+
+ init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s);
+ if (!init.name)
@@ -173,6 +225,10 @@ krait_add_pri_mux(struct device *dev, in
-
- clk = devm_clk_register(dev, &mux->hw);
-
+
+ clk = devm_clk_register(dev, &mux->hw);
+
+ ret = krait_notifier_register(dev, clk, mux);
+ if (ret)
+ goto err_p3;
+err_p3:
- kfree(p_names[2]);
+ kfree(p_names[2]);
err_p2:
- kfree(p_names[1]);
+ kfree(p_names[1]);
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -100,6 +100,15 @@ config ARM_OMAP2PLUS_CPUFREQ
- depends on ARCH_OMAP2PLUS
- default ARCH_OMAP2PLUS
-
+ depends on ARCH_OMAP2PLUS
+ default ARCH_OMAP2PLUS
+
+config ARM_QCOM_CPUFREQ
+ tristate "Qualcomm based"
+ depends on ARCH_QCOM
+ If in doubt, say N.
+
config ARM_S3C_CPUFREQ
- bool
- help
+ bool
+ help
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
-@@ -62,6 +62,7 @@ obj-$(CONFIG_ARM_MT8173_CPUFREQ) += mt81
+@@ -62,6 +62,7 @@ obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ) += me
obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o
obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -220,7 +220,10 @@ static int cpufreq_init(struct cpufreq_p
- }
-
- if (fallback) {
+ }
+
+ if (fallback) {
- cpumask_setall(policy->cpus);
+ struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
+
+ if (!pd || !pd->independent_clocks)
+ cpumask_setall(policy->cpus);
-
- /*
- * OPP tables are initialized only for policy->cpu, do it for
+
+ /*
+ * OPP tables are initialized only for policy->cpu, do it for
@@ -372,6 +375,8 @@ static int dt_cpufreq_probe(struct platf
- if (data && data->have_governor_per_policy)
- dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
-
+ if (data && data->have_governor_per_policy)
+ dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
+
+ dt_cpufreq_driver.driver_data = data;
+
- ret = cpufreq_register_driver(&dt_cpufreq_driver);
- if (ret)
- dev_err(&pdev->dev, "failed register driver: %d\n", ret);
+ ret = cpufreq_register_driver(&dt_cpufreq_driver);
+ if (ret)
+ dev_err(&pdev->dev, "failed register driver: %d\n", ret);
--- a/drivers/cpufreq/cpufreq-dt.h
+++ b/drivers/cpufreq/cpufreq-dt.h
@@ -13,6 +13,12 @@
#include <linux/types.h>
-
+
struct cpufreq_dt_platform_data {
+ /*
+ * True when each CPU has its own clock to control its
+ * clock.
+ */
+ bool independent_clocks;
- bool have_governor_per_policy;
+ bool have_governor_per_policy;
};
+
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -481,7 +481,11 @@ static int nand_default_block_markbad(st
- } else {
- ops.len = ops.ooblen = 1;
- }
+ } else {
+ ops.len = ops.ooblen = 1;
+ }
- ops.mode = MTD_OPS_PLACE_OOB;
+
+ if (unlikely(chip->bbt_options & NAND_BBT_ACCESS_BBM_RAW))
+ ops.mode = MTD_OPS_RAW;
+ else
+ ops.mode = MTD_OPS_PLACE_OOB;
-
- /* Write to first/last page(s) if necessary */
- if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
+
+ /* Write to first/last page(s) if necessary */
+ if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -420,7 +420,11 @@ static int scan_block_fast(struct mtd_in
- ops.oobbuf = buf;
- ops.ooboffs = 0;
- ops.datbuf = NULL;
+ ops.oobbuf = buf;
+ ops.ooboffs = 0;
+ ops.datbuf = NULL;
- ops.mode = MTD_OPS_PLACE_OOB;
+
+ if (unlikely(bd->options & NAND_BBT_ACCESS_BBM_RAW))
+ ops.mode = MTD_OPS_RAW;
+ else
+ ops.mode = MTD_OPS_PLACE_OOB;
-
- for (j = 0; j < numpages; j++) {
- /*
+
+ for (j = 0; j < numpages; j++) {
+ /*
--- a/include/linux/mtd/bbm.h
+++ b/include/linux/mtd/bbm.h
@@ -116,6 +116,12 @@ struct nand_bbt_descr {
#define NAND_BBT_NO_OOB_BBM 0x00080000
-
+
/*
+ * Force MTD_OPS_RAW mode when trying to access bad block markes from OOB. To
+ * be used by controllers which can access BBM only when ECC is disabled, i.e,
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
-@@ -1277,11 +1277,13 @@
- if (!opp_table)
- return ERR_PTR(-ENOMEM);
-
+@@ -1277,11 +1277,13 @@ struct opp_table *dev_pm_opp_set_regulat
+ if (!opp_table)
+ return ERR_PTR(-ENOMEM);
+
+#if 0
- /* This should be called before OPPs are initialized */
- if (WARN_ON(!list_empty(&opp_table->opp_list))) {
- ret = -EBUSY;
- goto err;
- }
+ /* This should be called before OPPs are initialized */
+ if (WARN_ON(!list_empty(&opp_table->opp_list))) {
+ ret = -EBUSY;
+ goto err;
+ }
+#endif
-
- /* Already have regulators set */
- if (opp_table->regulators) {
+
+ /* Already have regulators set */
+ if (opp_table->regulators) {
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
-@@ -1605,6 +1605,83 @@ unlock:
+@@ -1605,6 +1605,83 @@ put_table:
}
-
+
/**
+ * dev_pm_opp_adjust_voltage() - helper to change the voltage of an OPP
+ * @dev: device for which we do this operation
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
@@ -25,6 +25,7 @@ struct opp_table;
-
+
enum dev_pm_opp_event {
- OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE,
+ OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE,
+ OPP_EVENT_ADJUST_VOLTAGE,
};
-
+
/**
@@ -108,6 +109,9 @@ int dev_pm_opp_add(struct device *dev, u
- unsigned long u_volt);
+ unsigned long u_volt);
void dev_pm_opp_remove(struct device *dev, unsigned long freq);
-
+
+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
+ unsigned long u_volt);
+
int dev_pm_opp_enable(struct device *dev, unsigned long freq);
-
+
int dev_pm_opp_disable(struct device *dev, unsigned long freq);
@@ -208,6 +212,13 @@ static inline void dev_pm_opp_remove(str
{
}
-
+
+static inline int
+dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
+ unsigned long u_volt)
+
static inline int dev_pm_opp_enable(struct device *dev, unsigned long freq)
{
- return 0;
+ return 0;
@@ -126,6 +126,27 @@ unsigned long dev_pm_opp_get_freq(struct
}
EXPORT_SYMBOL_GPL(dev_pm_opp_get_freq);
-
+
+struct regulator *dev_pm_opp_get_regulator(struct device *dev)
+{
+ struct opp_table *opp_table;
* @opp: opp for which turbo mode is being verified
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
-@@ -85,6 +85,7 @@ enum dev_pm_opp_event {
+@@ -85,6 +85,7 @@ void dev_pm_opp_put_opp_table(struct opp
unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp);
-
+
unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp);
+struct regulator *dev_pm_opp_get_regulator(struct device *dev);
-
+
bool dev_pm_opp_is_turbo(struct dev_pm_opp *opp);
+
--- a/drivers/base/power/opp/core.c
+++ b/drivers/base/power/opp/core.c
@@ -1649,6 +1649,7 @@ int dev_pm_opp_adjust_voltage(struct dev
- struct opp_table *opp_table;
- struct dev_pm_opp *new_opp, *tmp_opp, *opp = ERR_PTR(-ENODEV);
- int r = 0;
+ struct opp_table *opp_table;
+ struct dev_pm_opp *new_opp, *tmp_opp, *opp = ERR_PTR(-ENODEV);
+ int r = 0;
+ unsigned long tol;
-
- /* keep the node allocated */
- new_opp = kmalloc(sizeof(*new_opp), GFP_KERNEL);
+
+ /* keep the node allocated */
+ new_opp = kmalloc(sizeof(*new_opp), GFP_KERNEL);
@@ -1685,6 +1686,10 @@ int dev_pm_opp_adjust_voltage(struct dev
-
- /* plug in new node */
- new_opp->supplies[0].u_volt = u_volt;
+
+ /* plug in new node */
+ new_opp->supplies[0].u_volt = u_volt;
+ tol = u_volt * opp_table->voltage_tolerance_v1 / 100;
+ new_opp->supplies[0].u_volt = u_volt;
+ new_opp->supplies[0].u_volt_min = u_volt - tol;
+ new_opp->supplies[0].u_volt_max = u_volt + tol;
-
- list_replace(&opp->node, &new_opp->node);
- mutex_unlock(&opp_table_lock);
+
+ list_replace(&opp->node, &new_opp->node);
+ mutex_unlock(&opp_table_lock);
--- a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt
+++ b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt
@@ -61,6 +61,7 @@ Regulator nodes are identified by their
- "qcom,rpm-pm8901-regulators"
- "qcom,rpm-pm8921-regulators"
- "qcom,rpm-pm8018-regulators"
+ "qcom,rpm-pm8901-regulators"
+ "qcom,rpm-pm8921-regulators"
+ "qcom,rpm-pm8018-regulators"
+ "qcom,rpm-smb208-regulators"
-
+
- vdd_l0_l1_lvs-supply:
- vdd_l2_l11_l12-supply:
@@ -171,6 +172,9 @@ pm8018:
- s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
- l12, l14, lvs1
-
+ s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
+ l12, l14, lvs1
+
+smb208:
+ s1a, s1b, s2a, s2b
+
The content of each sub-node is defined by the standard binding for regulators -
see regulator.txt - with additional custom properties described below:
-
+
--- a/drivers/regulator/qcom_rpm-regulator.c
+++ b/drivers/regulator/qcom_rpm-regulator.c
@@ -933,12 +933,21 @@ static const struct rpm_regulator_data r
- { }
+ { }
};
-
+
+static const struct rpm_regulator_data rpm_smb208_regulators[] = {
+ { "s1a", QCOM_RPM_SMB208_S1a, &smb208_smps, "vin_s1a" },
+ { "s1b", QCOM_RPM_SMB208_S1b, &smb208_smps, "vin_s1b" },
+};
+
static const struct of_device_id rpm_of_match[] = {
- { .compatible = "qcom,rpm-pm8018-regulators",
- .data = &rpm_pm8018_regulators },
- { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
- { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
- { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
+ { .compatible = "qcom,rpm-pm8018-regulators",
+ .data = &rpm_pm8018_regulators },
+ { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
+ { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
+ { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
+ { .compatible = "qcom,rpm-smb208-regulators", .data = &rpm_smb208_regulators },
- { }
+ { }
};
MODULE_DEVICE_TABLE(of, rpm_of_match);
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -32,6 +32,9 @@ struct private_data {
- struct device *cpu_dev;
- struct thermal_cooling_device *cdev;
- const char *reg_name;
+ struct device *cpu_dev;
+ struct thermal_cooling_device *cdev;
+ const char *reg_name;
+ struct notifier_block opp_nb;
+ struct mutex lock;
+ unsigned long opp_freq;
};
-
+
static struct freq_attr *cpufreq_dt_attr[] = {
@@ -43,9 +46,16 @@ static struct freq_attr *cpufreq_dt_attr
static int set_target(struct cpufreq_policy *policy, unsigned int index)
{
- struct private_data *priv = policy->driver_data;
+ struct private_data *priv = policy->driver_data;
+ int ret;
+ unsigned long target_freq = policy->freq_table[index].frequency * 1000;
+
+ if (!ret)
+ priv->opp_freq = target_freq;
+ mutex_unlock(&priv->lock);
-
+
- return dev_pm_opp_set_rate(priv->cpu_dev,
- policy->freq_table[index].frequency * 1000);
+ return ret;
}
-
+
/*
@@ -86,6 +96,39 @@ node_put:
- return name;
+ return name;
}
-
+
+static int opp_notifier(struct notifier_block *nb, unsigned long event,
+ void *data)
+{
+
static int resources_available(void)
{
- struct device *cpu_dev;
+ struct device *cpu_dev;
@@ -152,6 +195,7 @@ static int cpufreq_init(struct cpufreq_p
- bool fallback = false;
- const char *name;
- int ret;
+ bool fallback = false;
+ const char *name;
+ int ret;
+ struct srcu_notifier_head *opp_srcu_head;
-
- cpu_dev = get_cpu_device(policy->cpu);
- if (!cpu_dev) {
+
+ cpu_dev = get_cpu_device(policy->cpu);
+ if (!cpu_dev) {
@@ -241,13 +285,16 @@ static int cpufreq_init(struct cpufreq_p
- goto out_free_opp;
- }
-
+ goto out_free_opp;
+ }
+
+ mutex_init(&priv->lock);
+ dev_pm_opp_register_notifier(cpu_dev, &priv->opp_nb);
+
- priv->reg_name = name;
- priv->opp_table = opp_table;
-
- ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
- if (ret) {
- dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
+ priv->reg_name = name;
+ priv->opp_table = opp_table;
+
+ ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
+ if (ret) {
+ dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
- goto out_free_priv;
+ goto out_unregister_nb;
- }
-
- priv->cpu_dev = cpu_dev;
-@@ -283,6 +343,8 @@ static int cpufreq_init(struct cpufreq_p
-
+ }
+
+ priv->cpu_dev = cpu_dev;
+@@ -283,6 +330,8 @@ static int cpufreq_init(struct cpufreq_p
+
out_free_cpufreq_table:
- dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
+ dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
+out_unregister_nb:
+ dev_pm_opp_unregister_notifier(cpu_dev, &priv->opp_nb);
out_free_priv:
- kfree(priv);
+ kfree(priv);
out_free_opp:
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -48,11 +48,41 @@ static int set_target(struct cpufreq_pol
- struct private_data *priv = policy->driver_data;
- int ret;
- unsigned long target_freq = policy->freq_table[index].frequency * 1000;
+ struct private_data *priv = policy->driver_data;
+ int ret;
+ unsigned long target_freq = policy->freq_table[index].frequency * 1000;
+ struct clk *l2_clk = policy->l2_clk;
+ unsigned int l2_freq;
+ unsigned long new_l2_freq = 0;
-
- mutex_lock(&priv->lock);
- ret = dev_pm_opp_set_rate(priv->cpu_dev, target_freq);
+
+ mutex_lock(&priv->lock);
+ ret = dev_pm_opp_set_rate(priv->cpu_dev, target_freq);
- if (!ret)
+
+ if (!ret) {
+ }
+ }
+
- priv->opp_freq = target_freq;
+ priv->opp_freq = target_freq;
+ }
+
- mutex_unlock(&priv->lock);
-
- return ret;
+ mutex_unlock(&priv->lock);
+
+ return ret;
@@ -196,6 +226,8 @@ static int cpufreq_init(struct cpufreq_p
- const char *name;
- int ret;
- struct srcu_notifier_head *opp_srcu_head;
+ const char *name;
+ int ret;
+ struct srcu_notifier_head *opp_srcu_head;
+ struct device_node *l2_np;
+ struct clk *l2_clk = NULL;
-
- cpu_dev = get_cpu_device(policy->cpu);
- if (!cpu_dev) {
+
+ cpu_dev = get_cpu_device(policy->cpu);
+ if (!cpu_dev) {
@@ -303,6 +335,13 @@ static int cpufreq_init(struct cpufreq_p
-
- policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000;
-
+
+ policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000;
+
+ l2_clk = clk_get(cpu_dev, "l2");
+ if (!IS_ERR(l2_clk))
+ policy->l2_clk = l2_clk;
+ if (l2_np)
+ of_property_read_u32_array(l2_np, "qcom,l2-rates", policy->l2_rate, 3);
+
- ret = cpufreq_table_validate_and_show(policy, freq_table);
- if (ret) {
- dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
+ ret = cpufreq_table_validate_and_show(policy, freq_table);
+ if (ret) {
+ dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -73,6 +73,8 @@ struct cpufreq_policy {
- unsigned int cpu; /* cpu managing this policy, must be online */
-
- struct clk *clk;
+ unsigned int cpu; /* cpu managing this policy, must be online */
+
+ struct clk *clk;
+ struct clk *l2_clk; /* L2 clock */
+ unsigned int l2_rate[3]; /* L2 bus clock rate thresholds */
- struct cpufreq_cpuinfo cpuinfo;/* see above */
-
- unsigned int min; /* in kHz */
+ struct cpufreq_cpuinfo cpuinfo;/* see above */
+
+ unsigned int min; /* in kHz */
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
@@ -143,8 +143,10 @@ static int opp_notifier(struct notifier_
- ret = PTR_ERR(cpu_reg);
- goto out;
- }
+ ret = PTR_ERR(cpu_reg);
+ goto out;
+ }
+ rcu_read_lock();
- volt = dev_pm_opp_get_voltage(opp);
- freq = dev_pm_opp_get_freq(opp);
+ volt = dev_pm_opp_get_voltage(opp);
+ freq = dev_pm_opp_get_freq(opp);
+ rcu_read_unlock();
-
- mutex_lock(&priv->lock);
- if (freq == priv->opp_freq) {
+
+ mutex_lock(&priv->lock);
+ if (freq == priv->opp_freq) {
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -75,3 +75,10 @@ config ARM_MVEBU_V7_CPUIDLE
- depends on ARCH_MVEBU && !ARM64
- help
- Select this to enable cpuidle on Armada 370, 38x and XP processors.
+ depends on ARCH_MVEBU && !ARM64
+ help
+ Select this to enable cpuidle on Armada 370, 38x and XP processors.
+
+config ARM_QCOM_CPUIDLE
+ bool "CPU Idle Driver for QCOM processors"
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -341,7 +341,7 @@
- depends on MMU
- select ARM_HAS_SG_CHAIN
- select ARM_PATCH_PHYS_VIRT
+@@ -341,7 +341,7 @@ config ARCH_MULTIPLATFORM
+ depends on MMU
+ select ARM_HAS_SG_CHAIN
+ select ARM_PATCH_PHYS_VIRT
- select AUTO_ZRELADDR
+ select AUTO_ZRELADDR if !ARCH_QCOM
- select TIMER_OF
- select COMMON_CLK
- select GENERIC_CLOCKEVENTS
+ select TIMER_OF
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -255,9 +255,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac
MACHINE :=
endif
+endif
-
+
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y)))
--- /dev/null
--- a/drivers/mtd/qcom_smem_part.c
+++ b/drivers/mtd/qcom_smem_part.c
@@ -189,6 +189,10 @@ static int parse_qcom_smem_partitions(st
- m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz);
- m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz);
-
+ m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz);
+ m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz);
+
+ /* "rootfs" conflicts with OpenWrt auto mounting */
+ if (mtd_type_is_nand(master) && !strcmp(m_part->name, "rootfs"))
+ m_part->name = "ubi";
+
- /*
- * The last SMEM partition may have its size marked as
- * something like 0xffffffff, which means "until the end of the
+ /*
+ * The last SMEM partition may have its size marked as
+ * something like 0xffffffff, which means "until the end of the
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -1233,6 +1233,8 @@ static struct clk_rcg prng_src = {
- .parent_map = gcc_pxo_pll8_map,
- },
- .clkr = {
+ .parent_map = gcc_pxo_pll8_map,
+ },
+ .clkr = {
+ .enable_reg = 0x2e80,
+ .enable_mask = BIT(11),
- .hw.init = &(struct clk_init_data){
- .name = "prng_src",
- .parent_names = gcc_pxo_pll8,
+ .hw.init = &(struct clk_init_data){
+ .name = "prng_src",
+ .parent_names = gcc_pxo_pll8,
- "qcom,msm8974-tsens" : For 8974 Family of SoCs
- "qcom,msm8996-tsens" : For 8996 Family of SoCs
+ - "qcom,ipq8064-tsens" : For IPQ8064
-
+
- reg: Address range of the thermal registers
- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
--- a/drivers/thermal/qcom/Makefile
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -72,6 +72,9 @@ static const struct of_device_id tsens_t
- }, {
- .compatible = "qcom,msm8996-tsens",
- .data = &data_8996,
+ }, {
+ .compatible = "qcom,msm8996-tsens",
+ .data = &data_8996,
+ }, {
+ .compatible = "qcom,ipq8064-tsens",
+ .data = &data_ipq8064,
- },
- {}
+ },
+ {}
};
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -89,6 +89,6 @@ void compute_intercept_slope(struct tsen
int init_common(struct tsens_device *);
int get_temp_common(struct tsens_device *, int, int *);
-
+
-extern const struct tsens_data data_8916, data_8974, data_8960, data_8996;
+extern const struct tsens_data data_8916, data_8974, data_8960, data_8996, data_ipq8064;
-
+
#endif /* __QCOM_TSENS_H__ */
@@ -12,11 +12,15 @@ Required properties:
- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify
nvmem cells
-
+
+Optional properties:
+- interrupts: Interrupt which gets triggered when threshold is hit
+
Example:
tsens: thermal-sensor@900000 {
- compatible = "qcom,msm8916-tsens";
- reg = <0x4a8000 0x2000>;
- nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
- nvmem-cell-names = "caldata", "calsel";
+ compatible = "qcom,msm8916-tsens";
+ reg = <0x4a8000 0x2000>;
+ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
+ nvmem-cell-names = "caldata", "calsel";
+ interrupts = <0 178 0>;
- #thermal-sensor-cells = <1>;
- };
+ #thermal-sensor-cells = <1>;
+ };
--- a/drivers/thermal/of-thermal.c
+++ b/drivers/thermal/of-thermal.c
@@ -95,7 +95,7 @@ static int of_thermal_get_temp(struct th
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (!data->ops->get_temp)
+ if (!data->ops->get_temp || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EINVAL;
-
- return data->ops->get_temp(data->sensor_data, temp);
+ return -EINVAL;
+
+ return data->ops->get_temp(data->sensor_data, temp);
@@ -106,7 +106,8 @@ static int of_thermal_set_trips(struct t
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (!data->ops || !data->ops->set_trips)
+ if (!data->ops || !data->ops->set_trips
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EINVAL;
-
- return data->ops->set_trips(data->sensor_data, low, high);
+ return -EINVAL;
+
+ return data->ops->set_trips(data->sensor_data, low, high);
@@ -192,6 +193,9 @@ static int of_thermal_set_emul_temp(stru
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
+ if (data->mode == THERMAL_DEVICE_DISABLED)
+ return -EINVAL;
+
- return data->ops->set_emul_temp(data->sensor_data, temp);
+ return data->ops->set_emul_temp(data->sensor_data, temp);
}
-
+
@@ -200,7 +204,7 @@ static int of_thermal_get_trend(struct t
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (!data->ops->get_trend)
+ if (!data->ops->get_trend || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EINVAL;
-
- return data->ops->get_trend(data->sensor_data, trip, trend);
+ return -EINVAL;
+
+ return data->ops->get_trend(data->sensor_data, trip, trend);
@@ -286,7 +290,9 @@ static int of_thermal_set_mode(struct th
- mutex_unlock(&tz->lock);
-
- data->mode = mode;
+ mutex_unlock(&tz->lock);
+
+ data->mode = mode;
- thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
+
+ if (mode == THERMAL_DEVICE_ENABLED)
+ thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED);
-
- return 0;
+
+ return 0;
}
@@ -296,7 +302,8 @@ static int of_thermal_get_trip_type(stru
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (trip >= data->ntrips || trip < 0)
+ if (trip >= data->ntrips || trip < 0
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EDOM;
-
- *type = data->trips[trip].type;
+ return -EDOM;
+
+ *type = data->trips[trip].type;
@@ -304,12 +311,39 @@ static int of_thermal_get_trip_type(stru
- return 0;
+ return 0;
}
-
+
+static int of_thermal_activate_trip_type(struct thermal_zone_device *tz,
+ int trip, enum thermal_trip_activation_mode mode)
+{
+}
+
static int of_thermal_get_trip_temp(struct thermal_zone_device *tz, int trip,
- int *temp)
+ int *temp)
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (trip >= data->ntrips || trip < 0)
+ if (trip >= data->ntrips || trip < 0
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EDOM;
-
- *temp = data->trips[trip].temperature;
+ return -EDOM;
+
+ *temp = data->trips[trip].temperature;
@@ -322,7 +356,8 @@ static int of_thermal_set_trip_temp(stru
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (trip >= data->ntrips || trip < 0)
+ if (trip >= data->ntrips || trip < 0
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EDOM;
-
- if (data->ops->set_trip_temp) {
+ return -EDOM;
+
+ if (data->ops->set_trip_temp) {
@@ -344,7 +379,8 @@ static int of_thermal_get_trip_hyst(stru
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (trip >= data->ntrips || trip < 0)
+ if (trip >= data->ntrips || trip < 0
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EDOM;
-
- *hyst = data->trips[trip].hysteresis;
+ return -EDOM;
+
+ *hyst = data->trips[trip].hysteresis;
@@ -357,7 +393,8 @@ static int of_thermal_set_trip_hyst(stru
{
- struct __thermal_zone *data = tz->devdata;
-
+ struct __thermal_zone *data = tz->devdata;
+
- if (trip >= data->ntrips || trip < 0)
+ if (trip >= data->ntrips || trip < 0
+ || (data->mode == THERMAL_DEVICE_DISABLED))
- return -EDOM;
-
- /* thermal framework should take care of data->mask & (1 << trip) */
+ return -EDOM;
+
+ /* thermal framework should take care of data->mask & (1 << trip) */
@@ -432,6 +469,9 @@ thermal_zone_of_add_sensor(struct device
- if (ops->set_emul_temp)
- tzd->ops->set_emul_temp = of_thermal_set_emul_temp;
-
+ if (ops->set_emul_temp)
+ tzd->ops->set_emul_temp = of_thermal_set_emul_temp;
+
+ if (ops->set_trip_activate)
+ tzd->ops->set_trip_activate = of_thermal_activate_trip_type;
+
- mutex_unlock(&tzd->lock);
-
- return tzd;
+ mutex_unlock(&tzd->lock);
+
+ return tzd;
@@ -726,7 +766,10 @@ static const char * const trip_types[] =
- [THERMAL_TRIP_ACTIVE] = "active",
- [THERMAL_TRIP_PASSIVE] = "passive",
- [THERMAL_TRIP_HOT] = "hot",
+ [THERMAL_TRIP_ACTIVE] = "active",
+ [THERMAL_TRIP_PASSIVE] = "passive",
+ [THERMAL_TRIP_HOT] = "hot",
- [THERMAL_TRIP_CRITICAL] = "critical",
+ [THERMAL_TRIP_CRITICAL] = "critical_high",
+ [THERMAL_TRIP_CONFIGURABLE_HI] = "configurable_hi",
+ [THERMAL_TRIP_CONFIGURABLE_LOW] = "configurable_lo",
+ [THERMAL_TRIP_CRITICAL_LOW] = "critical_low",
};
-
+
/**
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -31,7 +31,7 @@ static int tsens_get_temp(void *data, in
-
+
static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend)
{
- const struct tsens_sensor *s = p;
+ struct tsens_sensor *s = p;
- struct tsens_device *tmdev = s->tmdev;
-
- if (tmdev->ops->get_trend)
+ struct tsens_device *tmdev = s->tmdev;
+
+ if (tmdev->ops->get_trend)
@@ -40,9 +40,10 @@ static int tsens_get_trend(void *p, int
- return -ENOTSUPP;
+ return -ENOTSUPP;
}
-
+
-static int __maybe_unused tsens_suspend(struct device *dev)
+static int __maybe_unused tsens_suspend(void *data)
{
- struct tsens_device *tmdev = dev_get_drvdata(dev);
+ struct tsens_sensor *s = data;
+ struct tsens_device *tmdev = s->tmdev;
-
- if (tmdev->ops && tmdev->ops->suspend)
- return tmdev->ops->suspend(tmdev);
+
+ if (tmdev->ops && tmdev->ops->suspend)
+ return tmdev->ops->suspend(tmdev);
@@ -50,9 +51,10 @@ static int __maybe_unused tsens_suspend
- return 0;
+ return 0;
}
-
+
-static int __maybe_unused tsens_resume(struct device *dev)
+static int __maybe_unused tsens_resume(void *data)
{
- struct tsens_device *tmdev = dev_get_drvdata(dev);
+ struct tsens_sensor *s = data;
+ struct tsens_device *tmdev = s->tmdev;
-
- if (tmdev->ops && tmdev->ops->resume)
- return tmdev->ops->resume(tmdev);
+
+ if (tmdev->ops && tmdev->ops->resume)
+ return tmdev->ops->resume(tmdev);
@@ -60,6 +62,30 @@ static int __maybe_unused tsens_resume(s
- return 0;
+ return 0;
}
-
+
+static int __maybe_unused tsens_set_trip_temp(void *data, int trip, int temp)
+{
+ struct tsens_sensor *s = data;
+
+
static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
-
+
static const struct of_device_id tsens_table[] = {
@@ -83,6 +109,8 @@ MODULE_DEVICE_TABLE(of, tsens_table);
static const struct thermal_zone_of_device_ops tsens_of_ops = {
- .get_temp = tsens_get_temp,
- .get_trend = tsens_get_trend,
+ .get_temp = tsens_get_temp,
+ .get_trend = tsens_get_trend,
+ .set_trip_temp = tsens_set_trip_temp,
+ .set_trip_activate = tsens_activate_trip_type,
};
-
+
static int tsens_register(struct tsens_device *tmdev)
@@ -131,7 +159,7 @@ static int tsens_probe(struct platform_d
- if (id)
- data = id->data;
- else
+ if (id)
+ data = id->data;
+ else
- data = &data_8960;
+ return -EINVAL;
-
- if (data->num_sensors <= 0) {
- dev_err(dev, "invalid number of sensors\n");
+
+ if (data->num_sensors <= 0) {
+ dev_err(dev, "invalid number of sensors\n");
@@ -146,6 +174,9 @@ static int tsens_probe(struct platform_d
- tmdev->dev = dev;
- tmdev->num_sensors = data->num_sensors;
- tmdev->ops = data->ops;
+ tmdev->dev = dev;
+ tmdev->num_sensors = data->num_sensors;
+ tmdev->ops = data->ops;
+
+ tmdev->tsens_irq = platform_get_irq(pdev, 0);
+
- for (i = 0; i < tmdev->num_sensors; i++) {
- if (data->hw_ids)
- tmdev->sensor[i].hw_id = data->hw_ids[i];
+ for (i = 0; i < tmdev->num_sensors; i++) {
+ if (data->hw_ids)
+ tmdev->sensor[i].hw_id = data->hw_ids[i];
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -24,9 +24,12 @@ struct tsens_device;
struct tsens_sensor {
- struct tsens_device *tmdev;
- struct thermal_zone_device *tzd;
+ struct tsens_device *tmdev;
+ struct thermal_zone_device *tzd;
+ struct work_struct notify_work;
- int offset;
- int id;
- int hw_id;
+ int offset;
+ int id;
+ int hw_id;
+ int calib_data;
+ int calib_data_backup;
- int slope;
- u32 status;
+ int slope;
+ u32 status;
};
@@ -41,6 +44,9 @@ struct tsens_sensor {
* @suspend: Function to suspend the tsens device
+ * @set_trip_activate: Function to activate trip points
*/
struct tsens_ops {
- /* mandatory callbacks */
+ /* mandatory callbacks */
@@ -53,6 +59,9 @@ struct tsens_ops {
- int (*suspend)(struct tsens_device *);
- int (*resume)(struct tsens_device *);
- int (*get_trend)(struct tsens_device *, int, enum thermal_trend *);
+ int (*suspend)(struct tsens_device *);
+ int (*resume)(struct tsens_device *);
+ int (*get_trend)(struct tsens_device *, int, enum thermal_trend *);
+ int (*set_trip_temp)(void *, int, int);
+ int (*set_trip_activate)(void *, int,
+ enum thermal_trip_activation_mode);
};
-
+
/**
@@ -76,11 +85,13 @@ struct tsens_context {
struct tsens_device {
- struct device *dev;
- u32 num_sensors;
+ struct device *dev;
+ u32 num_sensors;
+ u32 tsens_irq;
- struct regmap *map;
- struct regmap_field *status_field;
- struct tsens_context ctx;
- bool trdy;
- const struct tsens_ops *ops;
+ struct regmap *map;
+ struct regmap_field *status_field;
+ struct tsens_context ctx;
+ bool trdy;
+ const struct tsens_ops *ops;
+ struct work_struct tsens_work;
- struct tsens_sensor sensor[0];
+ struct tsens_sensor sensor[0];
};
-
+
--- a/drivers/thermal/thermal_sysfs.c
+++ b/drivers/thermal/thermal_sysfs.c
-@@ -115,12 +115,48 @@
- return sprintf(buf, "passive\n");
- case THERMAL_TRIP_ACTIVE:
- return sprintf(buf, "active\n");
+@@ -115,12 +115,48 @@ trip_point_type_show(struct device *dev,
+ return sprintf(buf, "passive\n");
+ case THERMAL_TRIP_ACTIVE:
+ return sprintf(buf, "active\n");
+ case THERMAL_TRIP_CONFIGURABLE_HI:
+ return sprintf(buf, "configurable_hi\n");
+ case THERMAL_TRIP_CONFIGURABLE_LOW:
+ return sprintf(buf, "configurable_low\n");
+ case THERMAL_TRIP_CRITICAL_LOW:
+ return sprintf(buf, "critical_low\n");
- default:
- return sprintf(buf, "unknown\n");
- }
+ default:
+ return sprintf(buf, "unknown\n");
+ }
}
-
+
static ssize_t
+trip_point_type_activate(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+
+static ssize_t
trip_point_temp_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
+ const char *buf, size_t count)
{
-@@ -562,6 +598,12 @@
- tz->trip_type_attrs[indx].attr.show = trip_point_type_show;
- attrs[indx] = &tz->trip_type_attrs[indx].attr.attr;
-
+@@ -562,6 +598,12 @@ static int create_trip_attrs(struct ther
+ tz->trip_type_attrs[indx].attr.show = trip_point_type_show;
+ attrs[indx] = &tz->trip_type_attrs[indx].attr.attr;
+
+ if (IS_ENABLED(CONFIG_THERMAL_WRITABLE_TRIPS)) {
+ tz->trip_type_attrs[indx].attr.store
+ = trip_point_type_activate;
+ tz->trip_type_attrs[indx].attr.attr.mode |= S_IWUSR;
+ }
+
- /* create trip temp attribute */
- snprintf(tz->trip_temp_attrs[indx].name, THERMAL_NAME_LENGTH,
- "trip_point_%d_temp", indx);
+ /* create trip temp attribute */
+ snprintf(tz->trip_temp_attrs[indx].name, THERMAL_NAME_LENGTH,
+ "trip_point_%d_temp", indx);
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -78,11 +78,19 @@ enum thermal_device_mode {
- THERMAL_DEVICE_ENABLED,
+ THERMAL_DEVICE_ENABLED,
};
-
+
+enum thermal_trip_activation_mode {
+ THERMAL_TRIP_ACTIVATION_DISABLED = 0,
+ THERMAL_TRIP_ACTIVATION_ENABLED,
+};
+
enum thermal_trip_type {
- THERMAL_TRIP_ACTIVE = 0,
- THERMAL_TRIP_PASSIVE,
- THERMAL_TRIP_HOT,
- THERMAL_TRIP_CRITICAL,
+ THERMAL_TRIP_ACTIVE = 0,
+ THERMAL_TRIP_PASSIVE,
+ THERMAL_TRIP_HOT,
+ THERMAL_TRIP_CRITICAL,
+ THERMAL_TRIP_CONFIGURABLE_HI,
+ THERMAL_TRIP_CONFIGURABLE_LOW,
+ THERMAL_TRIP_CRITICAL_LOW,
};
-
+
enum thermal_trend {
@@ -120,6 +128,8 @@ struct thermal_zone_device_ops {
- enum thermal_trip_type *);
- int (*get_trip_temp) (struct thermal_zone_device *, int, int *);
- int (*set_trip_temp) (struct thermal_zone_device *, int, int);
+ enum thermal_trip_type *);
+ int (*get_trip_temp) (struct thermal_zone_device *, int, int *);
+ int (*set_trip_temp) (struct thermal_zone_device *, int, int);
+ int (*set_trip_activate) (struct thermal_zone_device *, int,
+ enum thermal_trip_activation_mode);
- int (*get_trip_hyst) (struct thermal_zone_device *, int, int *);
- int (*set_trip_hyst) (struct thermal_zone_device *, int, int);
- int (*get_crit_temp) (struct thermal_zone_device *, int *);
+ int (*get_trip_hyst) (struct thermal_zone_device *, int, int *);
+ int (*set_trip_hyst) (struct thermal_zone_device *, int, int);
+ int (*get_crit_temp) (struct thermal_zone_device *, int *);
@@ -363,6 +373,8 @@ struct thermal_genl_event {
* temperature.
* @set_trip_temp: a pointer to a function that sets the trip temperature on
+ * temperature interrupts
*/
struct thermal_zone_of_device_ops {
- int (*get_temp)(void *, int *);
+ int (*get_temp)(void *, int *);
@@ -370,6 +382,8 @@ struct thermal_zone_of_device_ops {
- int (*set_trips)(void *, int, int);
- int (*set_emul_temp)(void *, int);
- int (*set_trip_temp)(void *, int, int);
+ int (*set_trips)(void *, int, int);
+ int (*set_emul_temp)(void *, int);
+ int (*set_trip_temp)(void *, int, int);
+ int (*set_trip_activate)(void *, int,
+ enum thermal_trip_activation_mode);
};
-
+
/**
--- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
@@ -13,6 +13,7 @@ Required properties :
- "qcom,rpmcc-msm8916", "qcom,rpmcc"
- "qcom,rpmcc-msm8974", "qcom,rpmcc"
- "qcom,rpmcc-apq8064", "qcom,rpmcc"
+ "qcom,rpmcc-msm8916", "qcom,rpmcc"
+ "qcom,rpmcc-msm8974", "qcom,rpmcc"
+ "qcom,rpmcc-apq8064", "qcom,rpmcc"
+ "qcom,rpmcc-ipq806x", "qcom,rpmcc"
-
+
- #clock-cells : shall contain 1
-
+
--- a/drivers/clk/qcom/clk-rpm.c
+++ b/drivers/clk/qcom/clk-rpm.c
@@ -359,6 +359,16 @@ DEFINE_CLK_RPM(apq8064, sfab_clk, sfab_a
DEFINE_CLK_RPM(apq8064, sfpb_clk, sfpb_a_clk, QCOM_RPM_SFPB_CLK);
DEFINE_CLK_RPM(apq8064, qdss_clk, qdss_a_clk, QCOM_RPM_QDSS_CLK);
-
+
+/* ipq806x */
+DEFINE_CLK_RPM(ipq806x, afab_clk, afab_a_clk, QCOM_RPM_APPS_FABRIC_CLK);
+DEFINE_CLK_RPM(ipq806x, cfpb_clk, cfpb_a_clk, QCOM_RPM_CFPB_CLK);
+DEFINE_CLK_RPM(ipq806x, nss_fabric_1_clk, nss_fabric_1_a_clk, QCOM_RPM_NSS_FABRIC_1_CLK);
+
static struct clk_rpm *apq8064_clks[] = {
- [RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk,
- [RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk,
+ [RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk,
+ [RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk,
@@ -380,13 +390,38 @@ static struct clk_rpm *apq8064_clks[] =
- [RPM_QDSS_A_CLK] = &apq8064_qdss_a_clk,
+ [RPM_QDSS_A_CLK] = &apq8064_qdss_a_clk,
};
-
+
+static struct clk_rpm *ipq806x_clks[] = {
+ [RPM_APPS_FABRIC_CLK] = &ipq806x_afab_clk,
+ [RPM_APPS_FABRIC_A_CLK] = &ipq806x_afab_a_clk,
+};
+
static const struct rpm_clk_desc rpm_clk_apq8064 = {
- .clks = apq8064_clks,
- .num_clks = ARRAY_SIZE(apq8064_clks),
+ .clks = apq8064_clks,
+ .num_clks = ARRAY_SIZE(apq8064_clks),
};
-
+
+static const struct rpm_clk_desc rpm_clk_ipq806x = {
+ .clks = ipq806x_clks,
+ .num_clks = ARRAY_SIZE(ipq806x_clks),
+};
+
static const struct of_device_id rpm_clk_match_table[] = {
- { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 },
+ { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 },
+ { .compatible = "qcom,rpmcc-ipq806x", .data = &rpm_clk_ipq806x },
- { }
+ { }
};
MODULE_DEVICE_TABLE(of, rpm_clk_match_table);
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+#define RPM_NSS_FABRIC_0_A_CLK 23
+#define RPM_NSS_FABRIC_1_CLK 24
+#define RPM_NSS_FABRIC_1_A_CLK 25
-
+
/* SMD RPM clocks */
#define RPM_SMD_XO_CLK_SRC 0
#include <linux/gpio/machine.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
-
+
#include "gpiolib.h"
-
+
@@ -506,3 +508,69 @@ void of_gpiochip_remove(struct gpio_chip
- gpiochip_remove_pin_ranges(chip);
- of_node_put(chip->of_node);
+ gpiochip_remove_pin_ranges(chip);
+ of_node_put(chip->of_node);
}
+
+static struct of_device_id gpio_export_ids[] = {
-int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name)
{
- struct gpio_chip *chip;
- struct gpio_device *gdev;
+ struct gpio_chip *chip;
+ struct gpio_device *gdev;
@@ -615,6 +615,8 @@ int gpiod_export(struct gpio_desc *desc,
- offset = gpio_chip_hwgpio(desc);
- if (chip->names && chip->names[offset])
- ioname = chip->names[offset];
+ offset = gpio_chip_hwgpio(desc);
+ if (chip->names && chip->names[offset])
+ ioname = chip->names[offset];
+ if (name)
+ ioname = name;
-
- dev = device_create_with_groups(&gpio_class, &gdev->dev,
- MKDEV(0, 0), data, gpio_groups,
+
+ dev = device_create_with_groups(&gpio_class, &gdev->dev,
+ MKDEV(0, 0), data, gpio_groups,
@@ -636,6 +638,12 @@ err_unlock:
- gpiod_dbg(desc, "%s: status %d\n", __func__, status);
- return status;
+ gpiod_dbg(desc, "%s: status %d\n", __func__, status);
+ return status;
}
+EXPORT_SYMBOL_GPL(__gpiod_export);
+
+ return __gpiod_export(desc, direction_may_change, NULL);
+}
EXPORT_SYMBOL_GPL(gpiod_export);
-
+
static int match_export(struct device *dev, const void *desc)
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g
- return gpiod_export(gpio_to_desc(gpio), direction_may_change);
+ return gpiod_export(gpio_to_desc(gpio), direction_may_change);
}
-
+
+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
+static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name)
+{
+}
+
static inline int gpio_export_link(struct device *dev, const char *name,
- unsigned gpio)
+ unsigned gpio)
{
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
-@@ -451,6 +451,7 @@ static inline struct gpio_desc *devm_get
-
+@@ -451,6 +451,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_
+
#if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS)
-
+
+int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name);
int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
int gpiod_export_link(struct device *dev, const char *name,
- struct gpio_desc *desc);
+ struct gpio_desc *desc);
@@ -458,6 +459,13 @@ void gpiod_unexport(struct gpio_desc *de
-
+
#else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */
-
+
+static inline int _gpiod_export(struct gpio_desc *desc,
+ bool direction_may_change,
+ const char *name)
+}
+
static inline int gpiod_export(struct gpio_desc *desc,
- bool direction_may_change)
+ bool direction_may_change)
{
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1938,6 +1938,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
- The command-line arguments provided by the boot loader will be
- appended to the the device tree bootargs property.
-
+ The command-line arguments provided by the boot loader will be
+ appended to the the device tree bootargs property.
+
+config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
+ bool "Append rootblock parsing bootloader's kernel arguments"
+ help
+ sent by bootloader will be ignored.
+
endchoice
-
+
config CMDLINE
--- a/arch/arm/boot/compressed/atags_to_fdt.c
+++ b/arch/arm/boot/compressed/atags_to_fdt.c
@@ -4,6 +4,8 @@
-
+
#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND)
#define do_extend_cmdline 1
+#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
#define do_extend_cmdline 0
#endif
@@ -67,6 +69,59 @@ static uint32_t get_cell_size(const void
- return cell_size;
+ return cell_size;
}
-
+
+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
+
+static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
+
static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
{
- char cmdline[COMMAND_LINE_SIZE];
+ char cmdline[COMMAND_LINE_SIZE];
@@ -86,12 +141,21 @@ static void merge_fdt_bootargs(void *fdt
-
- /* and append the ATAG_CMDLINE */
- if (fdt_cmdline) {
+
+ /* and append the ATAG_CMDLINE */
+ if (fdt_cmdline) {
+
+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
+ //save original bootloader args
+ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt);
+
+#else
- len = strlen(fdt_cmdline);
- if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
- *ptr++ = ' ';
- memcpy(ptr, fdt_cmdline, len);
- ptr += len;
- }
+ len = strlen(fdt_cmdline);
+ if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) {
+ *ptr++ = ' ';
+ memcpy(ptr, fdt_cmdline, len);
+ ptr += len;
+ }
+#endif
- }
- *ptr = '\0';
-
+ }
+ *ptr = '\0';
+
@@ -148,7 +212,9 @@ int atags_to_fdt(void *atag_list, void *
- else
- setprop_string(fdt, "/chosen", "bootargs",
- atag->u.cmdline.cmdline);
+ else
+ setprop_string(fdt, "/chosen", "bootargs",
+ atag->u.cmdline.cmdline);
- } else if (atag->hdr.tag == ATAG_MEM) {
+ }
+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE
+ else if (atag->hdr.tag == ATAG_MEM) {
- if (memcount >= sizeof(mem_reg_property)/4)
- continue;
- if (!atag->u.mem.size)
+ if (memcount >= sizeof(mem_reg_property)/4)
+ continue;
+ if (!atag->u.mem.size)
@@ -187,6 +253,10 @@ int atags_to_fdt(void *atag_list, void *
- setprop(fdt, "/memory", "reg", mem_reg_property,
- 4 * memcount * memsize);
- }
+ setprop(fdt, "/memory", "reg", mem_reg_property,
+ 4 * memcount * memsize);
+ }
+#else
+
+ }
+#endif
-
- return fdt_pack(fdt);
+
+ return fdt_pack(fdt);
}
--- a/init/main.c
+++ b/init/main.c
@@ -95,6 +95,10 @@
#include <asm/sections.h>
#include <asm/cacheflush.h>
-
+
+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
+#include <linux/of.h>
+#endif
+
static int kernel_init(void *);
-
+
extern void init_IRQ(void);
@@ -574,6 +578,18 @@ asmlinkage __visible void __init start_k
- page_alloc_init();
-
- pr_notice("Kernel command line: %s\n", boot_command_line);
+ page_alloc_init();
+
+ pr_notice("Kernel command line: %s\n", boot_command_line);
+
+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
+ //Show bootloader's original command line for reference
+ }
+#endif
+
- parse_early_param();
- after_dashes = parse_args("Booting kernel",
- static_command_line, __start___param,
+ parse_early_param();
+ after_dashes = parse_args("Booting kernel",
+ static_command_line, __start___param,
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -699,6 +699,15 @@ dtb-$(CONFIG_ARCH_QCOM) += \
- qcom-apq8084-mtp.dtb \
- qcom-ipq4019-ap.dk01.1-c1.dtb \
- qcom-ipq8064-ap148.dtb \
+ qcom-apq8084-mtp.dtb \
+ qcom-ipq4019-ap.dk01.1-c1.dtb \
+ qcom-ipq8064-ap148.dtb \
+ qcom-ipq8064-c2600.dtb \
+ qcom-ipq8064-d7800.dtb \
+ qcom-ipq8064-db149.dtb \
+ qcom-ipq8064-wpq864.dtb \
+ qcom-ipq8065-nbg6817.dtb \
+ qcom-ipq8065-r7800.dtb \
- qcom-msm8660-surf.dtb \
- qcom-msm8960-cdp.dtb \
- qcom-msm8974-lge-nexus5-hammerhead.dtb \
+ qcom-msm8660-surf.dtb \
+ qcom-msm8960-cdp.dtb \
+ qcom-msm8974-lge-nexus5-hammerhead.dtb \
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
@@ -219,6 +219,9 @@ static int __init qcom_cpuidle_init(stru
- cpumask_t mask;
- bool use_scm_power_down = false;
-
+ cpumask_t mask;
+ bool use_scm_power_down = false;
+
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
+
- for (i = 0; ; i++) {
- state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i);
- if (!state_node)
+ for (i = 0; ; i++) {
+ state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i);
+ if (!state_node)
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
-@@ -91,6 +91,8 @@
- struct clk *iface_clk;
- struct clk *core_clk;
- struct clk *phy_clk;
+@@ -91,6 +91,8 @@ struct qcom_pcie_resources_2_1_0 {
+ struct clk *iface_clk;
+ struct clk *core_clk;
+ struct clk *phy_clk;
+ struct clk *aux_clk;
+ struct clk *ref_clk;
- struct reset_control *pci_reset;
- struct reset_control *axi_reset;
- struct reset_control *ahb_reset;
-@@ -249,6 +251,14 @@
- if (IS_ERR(res->phy_clk))
- return PTR_ERR(res->phy_clk);
-
+ struct reset_control *pci_reset;
+ struct reset_control *axi_reset;
+ struct reset_control *ahb_reset;
+@@ -249,6 +251,14 @@ static int qcom_pcie_get_resources_2_1_0
+ if (IS_ERR(res->phy_clk))
+ return PTR_ERR(res->phy_clk);
+
+ res->aux_clk = devm_clk_get(dev, "aux");
+ if (IS_ERR(res->aux_clk))
+ return PTR_ERR(res->aux_clk);
+ if (IS_ERR(res->ref_clk))
+ return PTR_ERR(res->ref_clk);
+
- res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
- if (IS_ERR(res->pci_reset))
- return PTR_ERR(res->pci_reset);
-@@ -281,6 +291,8 @@
- clk_disable_unprepare(res->iface_clk);
- clk_disable_unprepare(res->core_clk);
- clk_disable_unprepare(res->phy_clk);
+ res->pci_reset = devm_reset_control_get_exclusive(dev, "pci");
+ if (IS_ERR(res->pci_reset))
+ return PTR_ERR(res->pci_reset);
+@@ -281,6 +291,8 @@ static void qcom_pcie_deinit_2_1_0(struc
+ clk_disable_unprepare(res->iface_clk);
+ clk_disable_unprepare(res->core_clk);
+ clk_disable_unprepare(res->phy_clk);
+ clk_disable_unprepare(res->aux_clk);
+ clk_disable_unprepare(res->ref_clk);
- regulator_disable(res->vdda);
- regulator_disable(res->vdda_phy);
- regulator_disable(res->vdda_refclk);
-@@ -324,16 +336,28 @@
- goto err_assert_ahb;
- }
-
+ regulator_disable(res->vdda);
+ regulator_disable(res->vdda_phy);
+ regulator_disable(res->vdda_refclk);
+@@ -324,16 +336,28 @@ static int qcom_pcie_init_2_1_0(struct q
+ goto err_assert_ahb;
+ }
+
+ ret = clk_prepare_enable(res->core_clk);
+ if (ret) {
+ dev_err(dev, "cannot prepare/enable core clock\n");
+ goto err_clk_core;
+ }
+
- ret = clk_prepare_enable(res->phy_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable phy clock\n");
- goto err_clk_phy;
- }
-
+ ret = clk_prepare_enable(res->phy_clk);
+ if (ret) {
+ dev_err(dev, "cannot prepare/enable phy clock\n");
+ goto err_clk_phy;
+ }
+
- ret = clk_prepare_enable(res->core_clk);
+ ret = clk_prepare_enable(res->aux_clk);
- if (ret) {
+ if (ret) {
- dev_err(dev, "cannot prepare/enable core clock\n");
- goto err_clk_core;
+ dev_err(dev, "cannot prepare/enable aux clock\n");
+ if (ret) {
+ dev_err(dev, "cannot prepare/enable ref clock\n");
+ goto err_clk_ref;
- }
-
- ret = reset_control_deassert(res->ahb_reset);
-@@ -389,10 +413,14 @@
- return 0;
-
+ }
+
+ ret = reset_control_deassert(res->ahb_reset);
+@@ -389,10 +413,14 @@ static int qcom_pcie_init_2_1_0(struct q
+ return 0;
+
err_deassert_ahb:
- clk_disable_unprepare(res->core_clk);
-err_clk_core:
+err_clk_ref:
+ clk_disable_unprepare(res->aux_clk);
+err_clk_aux:
- clk_disable_unprepare(res->phy_clk);
+ clk_disable_unprepare(res->phy_clk);
err_clk_phy:
+ clk_disable_unprepare(res->core_clk);
+err_clk_core:
- clk_disable_unprepare(res->iface_clk);
+ clk_disable_unprepare(res->iface_clk);
err_assert_ahb:
- regulator_disable(res->vdda_phy);
+ regulator_disable(res->vdda_phy);
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
-@@ -98,6 +98,7 @@
+@@ -98,6 +98,7 @@ struct qcom_pcie_resources_2_1_0 {
struct reset_control *ahb_reset;
struct reset_control *por_reset;
struct reset_control *phy_reset;
struct regulator *vdda;
struct regulator *vdda_phy;
struct regulator *vdda_refclk;
-@@ -275,6 +276,10 @@
+@@ -275,6 +276,10 @@ static int qcom_pcie_get_resources_2_1_0
if (IS_ERR(res->por_reset))
return PTR_ERR(res->por_reset);
-
+
+ res->ext_reset = devm_reset_control_get(dev, "ext");
+ if (IS_ERR(res->ext_reset))
+ return PTR_ERR(res->ext_reset);
res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
return PTR_ERR_OR_ZERO(res->phy_reset);
}
-@@ -288,6 +293,7 @@
+@@ -288,6 +293,7 @@ static void qcom_pcie_deinit_2_1_0(struc
reset_control_assert(res->ahb_reset);
reset_control_assert(res->por_reset);
reset_control_assert(res->pci_reset);
clk_disable_unprepare(res->iface_clk);
clk_disable_unprepare(res->core_clk);
clk_disable_unprepare(res->phy_clk);
-@@ -306,6 +312,12 @@
+@@ -306,6 +312,12 @@ static int qcom_pcie_init_2_1_0(struct q
u32 val;
int ret;
-
+
+ ret = reset_control_assert(res->ahb_reset);
+ if (ret) {
+ dev_err(dev, "cannot assert ahb reset\n");
ret = regulator_enable(res->vdda);
if (ret) {
dev_err(dev, "cannot enable vdda regulator\n");
-@@ -324,16 +336,16 @@
+@@ -324,16 +336,16 @@ static int qcom_pcie_init_2_1_0(struct q
goto err_vdda_phy;
}
-
+
- ret = reset_control_assert(res->ahb_reset);
+ ret = reset_control_deassert(res->ext_reset);
if (ret) {
+ dev_err(dev, "cannot assert ext reset\n");
+ goto err_reset_ext;
}
-
+
ret = clk_prepare_enable(res->iface_clk);
if (ret) {
dev_err(dev, "cannot prepare/enable iface clock\n");
- goto err_assert_ahb;
+ goto err_iface;
}
-
+
ret = clk_prepare_enable(res->core_clk);
-@@ -422,7 +434,9 @@
+@@ -422,7 +434,9 @@ err_clk_phy:
clk_disable_unprepare(res->core_clk);
err_clk_core:
clk_disable_unprepare(res->iface_clk);
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -52,7 +52,13 @@
#define PCIE_CAP_CPL_TIMEOUT_DISABLE 0x10
-
+
#define PCIE20_PARF_PHY_CTRL 0x40
+#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK (0x1f << 16)
+#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) (x << 16)
#define PCIE20_PARF_MHI_CLOCK_RESET_CTRL 0x174
@@ -83,6 +89,18 @@
#define DBI_RO_WR_EN 1
-
+
#define PERST_DELAY_US 1000
+/* PARF registers */
+#define PCIE20_PARF_PCS_DEEMPH 0x34
+
+#define PCIE20_PARF_CONFIG_BITS 0x50
+#define PHY_RX0_EQ(x) (x << 24)
-
+
#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358
#define SLV_ADDR_SPACE_SZ 0x10000000
-@@ -102,6 +120,7 @@
+@@ -102,6 +120,7 @@ struct qcom_pcie_resources_2_1_0 {
struct regulator *vdda;
struct regulator *vdda_phy;
struct regulator *vdda_refclk;
+ uint8_t phy_tx0_term_offset;
};
-
+
struct qcom_pcie_resources_1_0_0 {
-@@ -179,6 +198,16 @@
-
+@@ -179,6 +198,16 @@ struct qcom_pcie {
+
#define to_qcom_pcie(x) dev_get_drvdata((x)->dev)
-
+
+static inline void
+writel_masked(void __iomem *addr, u32 clear_mask, u32 set_mask)
+{
static void qcom_ep_reset_assert(struct qcom_pcie *pcie)
{
gpiod_set_value_cansleep(pcie->reset, 1);
-@@ -280,6 +309,10 @@
+@@ -280,6 +309,10 @@ static int qcom_pcie_get_resources_2_1_0
if (IS_ERR(res->ext_reset))
return PTR_ERR(res->ext_reset);
-
+
+ if (of_property_read_u8(dev->of_node, "phy-tx0-term-offset",
+ &res->phy_tx0_term_offset))
+ res->phy_tx0_term_offset = 0;
res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
return PTR_ERR_OR_ZERO(res->phy_reset);
}
-@@ -309,7 +342,6 @@
+@@ -309,7 +342,6 @@ static int qcom_pcie_init_2_1_0(struct q
struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
struct dw_pcie *pci = pcie->pci;
struct device *dev = pci->dev;
- u32 val;
int ret;
-
+
ret = reset_control_assert(res->ahb_reset);
-@@ -378,15 +410,26 @@
+@@ -378,15 +410,26 @@ static int qcom_pcie_init_2_1_0(struct q
goto err_deassert_ahb;
}
-
+
- /* enable PCIe clocks and resets */
- val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
- val &= ~BIT(0);
+ /* Enable reference clock */
+ writel_masked(pcie->parf + PCIE20_PARF_PHY_REFCLK,
+ REF_USE_PAD, REF_SSP_EN);
-
+
ret = reset_control_deassert(res->phy_reset);
if (ret) {
@@ -83,6 +83,30 @@
#define PCIE20_CAP_LINK_1 (PCIE20_CAP + 0x14)
#define PCIE_CAP_LINK1_VAL 0x2FD7F
-
+
+#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10)
+
+#define PCIE20_AXI_MSTR_RESP_COMP_CTRL0 0x818
+#define MSM_PCIE_DEV_CFG_ADDR 0x01000000
+
#define PCIE20_PARF_Q2A_FLUSH 0x1AC
-
+
#define PCIE20_MISC_CONTROL_1_REG 0x8BC
-@@ -251,6 +275,57 @@
- writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
+@@ -251,6 +275,57 @@ static void qcom_pcie_2_1_0_ltssm_enable
+ writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL);
}
-
+
+static void qcom_pcie_prog_viewport_cfg0(struct qcom_pcie *pcie, u32 busdev)
+{
+ struct pcie_port *pp = &pcie->pci->pp;
+
static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
{
- struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
-@@ -465,6 +538,9 @@
- writel(CFG_BRIDGE_SB_INIT,
- pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1);
-
+ struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
+@@ -465,6 +540,9 @@ static int qcom_pcie_init_2_1_0(struct q
+ writel(CFG_BRIDGE_SB_INIT,
+ pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1);
+
+ qcom_pcie_prog_viewport_cfg0(pcie, MSM_PCIE_DEV_CFG_ADDR);
+ qcom_pcie_prog_viewport_mem2_outbound(pcie);
+
- return 0;
-
+ return 0;
+
err_deassert_ahb:
@@ -129,6 +129,8 @@
#define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE 0x358
#define SLV_ADDR_SPACE_SZ 0x10000000
-
+
+#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0
+
struct qcom_pcie_resources_2_1_0 {
- struct clk *iface_clk;
- struct clk *core_clk;
-@@ -218,6 +220,7 @@
- struct phy *phy;
- struct gpio_desc *reset;
- struct qcom_pcie_ops *ops;
+ struct clk *iface_clk;
+ struct clk *core_clk;
+@@ -218,6 +220,7 @@ struct qcom_pcie {
+ struct phy *phy;
+ struct gpio_desc *reset;
+ struct qcom_pcie_ops *ops;
+ uint32_t force_gen1;
};
-
+
#define to_qcom_pcie(x) dev_get_drvdata((x)->dev)
-@@ -532,6 +535,11 @@
-
- /* wait for clock acquisition */
- usleep_range(1000, 1500);
+@@ -532,6 +535,11 @@ static int qcom_pcie_init_2_1_0(struct q
+
+ /* wait for clock acquisition */
+ usleep_range(1000, 1500);
+ if (pcie->force_gen1) {
+ writel_relaxed((readl_relaxed(
+ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1),
+ pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);
+ }
-
-
- /* Set the Max TLP size to 2K, instead of using default of 4K */
-@@ -1382,6 +1390,8 @@
- struct dw_pcie *pci;
- struct qcom_pcie *pcie;
- int ret;
+
+
+ /* Set the Max TLP size to 2K, instead of using default of 4K */
+@@ -1382,6 +1390,8 @@ static int qcom_pcie_probe(struct platfo
+ struct dw_pcie *pci;
+ struct qcom_pcie *pcie;
+ int ret;
+ uint32_t force_gen1 = 0;
+ struct device_node *np = pdev->dev.of_node;
-
- pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
- if (!pcie)
-@@ -1403,6 +1413,9 @@
- if (IS_ERR(pcie->reset))
- return PTR_ERR(pcie->reset);
-
+
+ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
+ if (!pcie)
+@@ -1403,6 +1413,9 @@ static int qcom_pcie_probe(struct platfo
+ if (IS_ERR(pcie->reset))
+ return PTR_ERR(pcie->reset);
+
+ of_property_read_u32(np, "force_gen1", &force_gen1);
+ pcie->force_gen1 = force_gen1;
+
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
- pcie->parf = devm_ioremap_resource(dev, res);
- if (IS_ERR(pcie->parf))
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
+ pcie->parf = devm_ioremap_resource(dev, res);
+ if (IS_ERR(pcie->parf))
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -131,6 +131,14 @@
-
+
#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0
-
+
+#define __set(v, a, b) (((v) << (b)) & GENMASK(a, b))
+#define __mask(a, b) (((1 << ((a) + 1)) - 1) & ~((1 << (b)) - 1))
+#define PCIE20_DEV_CAS 0x78
+#define PCIE20_MPS(x) __set(x, 7, 5)
+
struct qcom_pcie_resources_2_1_0 {
- struct clk *iface_clk;
- struct clk *core_clk;
-@@ -1472,6 +1480,35 @@
- return 0;
+ struct clk *iface_clk;
+ struct clk *core_clk;
+@@ -1472,6 +1480,35 @@ static int qcom_pcie_probe(struct platfo
+ return 0;
}
-
+
+static void qcom_pcie_fixup_final(struct pci_dev *dev)
+{
+ int cap, err;
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, qcom_pcie_fixup_final);
+
static const struct of_device_id qcom_pcie_match[] = {
- { .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
- { .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
+ { .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
+ { .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
-@@ -407,6 +407,7 @@
+@@ -407,6 +407,7 @@ static void qcom_pcie_deinit_2_1_0(struc
{
- struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
-
+ struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
+
+ clk_disable_unprepare(res->phy_clk);
- reset_control_assert(res->pci_reset);
- reset_control_assert(res->axi_reset);
- reset_control_assert(res->ahb_reset);
-@@ -415,7 +415,6 @@
- reset_control_assert(res->ext_reset);
- clk_disable_unprepare(res->iface_clk);
- clk_disable_unprepare(res->core_clk);
+ reset_control_assert(res->pci_reset);
+ reset_control_assert(res->axi_reset);
+ reset_control_assert(res->ahb_reset);
+@@ -415,7 +416,6 @@ static void qcom_pcie_deinit_2_1_0(struc
+ reset_control_assert(res->ext_reset);
+ clk_disable_unprepare(res->iface_clk);
+ clk_disable_unprepare(res->core_clk);
- clk_disable_unprepare(res->phy_clk);
- clk_disable_unprepare(res->aux_clk);
- clk_disable_unprepare(res->ref_clk);
- regulator_disable(res->vdda);
-@@ -472,12 +472,6 @@
- goto err_clk_core;
- }
-
+ clk_disable_unprepare(res->aux_clk);
+ clk_disable_unprepare(res->ref_clk);
+ regulator_disable(res->vdda);
+@@ -472,12 +472,6 @@ static int qcom_pcie_init_2_1_0(struct q
+ goto err_clk_core;
+ }
+
- ret = clk_prepare_enable(res->phy_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable phy clock\n");
- goto err_clk_phy;
- }
-
- ret = clk_prepare_enable(res->aux_clk);
- if (ret) {
- dev_err(dev, "cannot prepare/enable aux clock\n");
-@@ -541,6 +535,12 @@
- return ret;
- }
-
+ ret = clk_prepare_enable(res->aux_clk);
+ if (ret) {
+ dev_err(dev, "cannot prepare/enable aux clock\n");
+@@ -541,6 +535,12 @@ static int qcom_pcie_init_2_1_0(struct q
+ return ret;
+ }
+
+ ret = clk_prepare_enable(res->phy_clk);
+ if (ret) {
+ dev_err(dev, "cannot prepare/enable phy clock\n");
+ goto err_deassert_ahb;
+ }
+
- /* wait for clock acquisition */
- usleep_range(1000, 1500);
- if (pcie->force_gen1) {
-@@ -566,8 +566,6 @@
+ /* wait for clock acquisition */
+ usleep_range(1000, 1500);
+ if (pcie->force_gen1) {
+@@ -566,8 +566,6 @@ err_deassert_ahb:
err_clk_ref:
- clk_disable_unprepare(res->aux_clk);
+ clk_disable_unprepare(res->aux_clk);
err_clk_aux:
- clk_disable_unprepare(res->phy_clk);
-err_clk_phy:
- clk_disable_unprepare(res->core_clk);
+ clk_disable_unprepare(res->core_clk);
err_clk_core:
- clk_disable_unprepare(res->iface_clk);
+ clk_disable_unprepare(res->iface_clk);
--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
-@@ -408,7 +408,7 @@
- struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
-
- clk_disable_unprepare(res->phy_clk);
+@@ -408,7 +408,7 @@ static void qcom_pcie_deinit_2_1_0(struc
+ struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
+
+ clk_disable_unprepare(res->phy_clk);
- reset_control_assert(res->pci_reset);
+ reset_control_assert(res->phy_reset);
- reset_control_assert(res->axi_reset);
- reset_control_assert(res->ahb_reset);
- reset_control_assert(res->por_reset);
+ reset_control_assert(res->axi_reset);
+ reset_control_assert(res->ahb_reset);
+ reset_control_assert(res->por_reset);
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
-@@ -422,6 +422,9 @@
- { .compatible = "qcom,scm-msm8996",
- .data = NULL, /* no clocks */
- },
+@@ -422,6 +422,9 @@ static const struct of_device_id qcom_sc
+ { .compatible = "qcom,scm-msm8996",
+ .data = NULL, /* no clocks */
+ },
+ { .compatible = "qcom,scm-ipq806x",
+ .data = NULL, /* no clocks */
+ },
- { .compatible = "qcom,scm",
- .data = (void *)(SCM_HAS_CORE_CLK
- | SCM_HAS_IFACE_CLK
+ { .compatible = "qcom,scm",
+ .data = (void *)(SCM_HAS_CORE_CLK
+ | SCM_HAS_IFACE_CLK
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
-@@ -561,6 +561,24 @@
- return ret ? : le32_to_cpu(out);
+@@ -561,6 +561,24 @@ int __qcom_scm_pas_mss_reset(struct devi
+ return ret ? : le32_to_cpu(out);
}
-
+
+int __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1)
+{
+ s32 ret;
+
int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
{
- struct {
+ struct {
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
-@@ -366,6 +366,16 @@
- return ret ? : res.a1;
+@@ -366,6 +366,16 @@ int __qcom_scm_pas_mss_reset(struct devi
+ return ret ? : res.a1;
}
-
+
+int __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1)
+{
+ return -ENOTSUPP;
+
int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 id)
{
- struct qcom_scm_desc desc = {0};
+ struct qcom_scm_desc desc = {0};
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -470,3 +470,16 @@ static int __init qcom_scm_init(void)
- return platform_driver_register(&qcom_scm_driver);
+ return platform_driver_register(&qcom_scm_driver);
}
subsys_initcall(qcom_scm_init);
+
@@ -58,6 +58,13 @@ extern int __qcom_scm_pas_auth_and_rese
extern int __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral);
extern int __qcom_scm_pas_mss_reset(struct device *dev, bool reset);
-
+
+#define SCM_IO_READ 1
+#define SCM_IO_WRITE 2
+#define SCM_SVC_IO_ACCESS 0x5
#include "../core.h"
#include "../pinconf.h"
#include "pinctrl-msm.h"
-@@ -638,6 +639,9 @@ static int msm_gpio_irq_set_type(struct
- const struct msm_pingroup *g;
- unsigned long flags;
- u32 val;
+@@ -638,6 +639,9 @@ static void msm_gpio_irq_ack(struct irq_
+ const struct msm_pingroup *g;
+ unsigned long flags;
+ u32 val;
+ u32 addr;
+ int ret;
+ const __be32 *reg;
-
- g = &pctrl->soc->groups[d->hwirq];
-
+
+ g = &pctrl->soc->groups[d->hwirq];
+
@@ -676,11 +680,30 @@ static int msm_gpio_irq_set_type(struct
- else
- clear_bit(d->hwirq, pctrl->dual_edge_irqs);
-
+ else
+ clear_bit(d->hwirq, pctrl->dual_edge_irqs);
+
+ int ret = of_device_is_compatible(pctrl->dev->of_node,
+ "qcom,ipq8064-pinctrl");
- /* Route interrupts to application cpu */
+ /* Route interrupts to application cpu */
- val = readl(pctrl->regs + g->intr_target_reg);
- val &= ~(7 << g->intr_target_bit);
- val |= g->intr_target_kpss_val << g->intr_target_bit;
+ pr_err("\n Routing interrupts to Apps proc failed");
+ }
+ }
-
- /* Update configuration for gpio.
- * RAW_STATUS_EN is left on for all gpio irqs. Due to the
+
+ /* Update configuration for gpio.
+ * RAW_STATUS_EN is left on for all gpio irqs. Due to the
@@ -954,4 +977,3 @@ int msm_pinctrl_remove(struct platform_d
- return 0;
+ return 0;
}
EXPORT_SYMBOL(msm_pinctrl_remove);
-
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
-@@ -43,6 +43,8 @@
+@@ -43,6 +43,8 @@ extern int qcom_scm_set_remote_state(u32
extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
#else
static inline
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
-@@ -73,5 +75,7 @@
+@@ -73,5 +75,7 @@ qcom_scm_set_remote_state(u32 state,u32
static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; }
static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) { return -ENODEV; }
static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) { return -ENODEV; }
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/pm_runtime.h>
-@@ -33,6 +34,8 @@
- struct device *dev;
- struct clk **clks;
- int num_clocks;
+@@ -33,6 +34,8 @@ struct dwc3_of_simple {
+ struct device *dev;
+ struct clk **clks;
+ int num_clocks;
+ struct reset_control *mstr_rst_30_0;
+ struct reset_control *mstr_rst_30_1;
};
-
+
static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count)
-@@ -102,6 +105,20 @@
- if (ret)
- return ret;
-
+@@ -102,6 +105,20 @@ static int dwc3_of_simple_probe(struct p
+ if (ret)
+ return ret;
+
+ simple->mstr_rst_30_0 = devm_reset_control_get(dev, "usb30_0_mstr_rst");
+
+ if (!IS_ERR(simple->mstr_rst_30_0))
+ else
+ dev_dbg(simple->dev, "cannot get handle for USB PHY 1 master reset control\n");
+
- ret = of_platform_populate(np, NULL, NULL, dev);
- if (ret) {
- for (i = 0; i < simple->num_clocks; i++) {
-@@ -130,6 +147,12 @@
- clk_put(simple->clks[i]);
- }
-
+ ret = of_platform_populate(np, NULL, NULL, dev);
+ if (ret) {
+ for (i = 0; i < simple->num_clocks; i++) {
+@@ -130,6 +147,12 @@ static int dwc3_of_simple_remove(struct
+ clk_put(simple->clks[i]);
+ }
+
+ if (!IS_ERR(simple->mstr_rst_30_0))
+ reset_control_assert(simple->mstr_rst_30_0);
+
+ if (!IS_ERR(simple->mstr_rst_30_1))
+ reset_control_assert(simple->mstr_rst_30_1);
+
- of_platform_depopulate(dev);
-
- pm_runtime_put_sync(dev);
+ of_platform_depopulate(dev);
+
+ pm_runtime_put_sync(dev);
---
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1023,7 +1023,7 @@
- { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
- { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
+@@ -1024,7 +1024,7 @@ static const struct flash_info spi_nor_i
+ { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+ { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
- { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SECT_4K) },
- { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
- { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
- { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+ { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
+ { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
+obj-$(CONFIG_BUS_TOPOLOGY_ADHOC)+= msm_bus/
-
+
# Interconnect bus driver for OMAP SoCs.
obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -93,6 +93,8 @@ config MVEBU_MBUS
- Driver needed for the MBus configuration on Marvell EBU SoCs
- (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
-
+ Driver needed for the MBus configuration on Marvell EBU SoCs
+ (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
+
+source "drivers/bus/msm_bus/Kconfig"
+
config OMAP_INTERCONNECT
- tristate "OMAP INTERCONNECT DRIVER"
- depends on ARCH_OMAP2PLUS
+ tristate "OMAP INTERCONNECT DRIVER"
+ depends on ARCH_OMAP2PLUS
--- /dev/null
+++ b/include/dt-bindings/msm/msm-bus-ids.h
@@ -0,0 +1,869 @@
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -78,6 +78,13 @@ config QCOM_SMSM
- Say yes here to support the Qualcomm Shared Memory State Machine.
- The state machine is represented by bits in shared memory.
-
+ Say yes here to support the Qualcomm Shared Memory State Machine.
+ The state machine is represented by bits in shared memory.
+
+config QCOM_TCSR
+ tristate "QCOM Top Control and Status Registers"
+ depends on ARCH_QCOM
+ functions for various peripherals.
+
config QCOM_WCNSS_CTRL
- tristate "Qualcomm WCNSS control driver"
- depends on ARCH_QCOM
+ tristate "Qualcomm WCNSS control driver"
+ depends on ARCH_QCOM
--- /dev/null
+++ b/drivers/soc/qcom/qcom_tcsr.c
@@ -0,0 +1,98 @@
projects / openwrt / staging / hauke.git / commitdiff