rpi3: Move rpi3_hw.h header file to include/rpi_hw.h

With the advent of Raspberry Pi 4 support, we need to separate some
board specific headers between the RPi3 and RPi4.
Rename and move the "rpi3_hw.h" header, so that .c files just include
rpi_hw.h, and automatically get the correct version.

Change-Id: I03b39063028d2bee1429bffccde71dddfe2dcde8
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/plat/rpi/rpi3/aarch64/plat_helpers.S b/plat/rpi/rpi3/aarch64/plat_helpers.S
index 7974b602d9d1edd13b6d24235b875614d4432f4d..556d87212b20a0466baeedf821ae5c8a2ddbc958 100644 (file)
--- a/plat/rpi/rpi3/aarch64/plat_helpers.S
+++ b/plat/rpi/rpi3/aarch64/plat_helpers.S
@@ -9,7 +9,7 @@
 #include <assert_macros.S>
 #include <platform_def.h>
 
-#include "../rpi3_hw.h"
+#include "../include/rpi_hw.h"
 
        .globl  plat_crash_console_flush
        .globl  plat_crash_console_init

diff --git a/plat/rpi/rpi3/include/platform_def.h b/plat/rpi/rpi3/include/platform_def.h
index 4d902225f75a47d0057bf162765d5a6ddd625711..2a12fe726b93fbdb596493c079921e0e2abc5b67 100644 (file)
--- a/plat/rpi/rpi3/include/platform_def.h
+++ b/plat/rpi/rpi3/include/platform_def.h
@@ -12,7 +12,7 @@
 #include <lib/utils_def.h>
 #include <plat/common/common_def.h>
 
-#include "../rpi3_hw.h"
+#include "rpi_hw.h"
 
 /* Special value used to verify platform parameters from BL2 to BL31 */
 #define RPI3_BL31_PLAT_PARAM_VAL       ULL(0x0F1E2D3C4B5A6978)

diff --git a/plat/rpi/rpi3/include/rpi_hw.h b/plat/rpi/rpi3/include/rpi_hw.h
new file mode 100644 (file)
index 0000000..7a3ea57
--- /dev/null
+++ b/plat/rpi/rpi3/include/rpi_hw.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef RPI_HW_H
+#define RPI_HW_H
+
+#include <lib/utils_def.h>
+
+/*
+ * Peripherals
+ */
+
+#define RPI3_IO_BASE                   ULL(0x3F000000)
+#define RPI3_IO_SIZE                   ULL(0x01000000)
+
+/*
+ * ARM <-> VideoCore mailboxes
+ */
+#define RPI3_MBOX_OFFSET               ULL(0x0000B880)
+#define RPI3_MBOX_BASE                 (RPI3_IO_BASE + RPI3_MBOX_OFFSET)
+/* VideoCore -> ARM */
+#define RPI3_MBOX0_READ_OFFSET         ULL(0x00000000)
+#define RPI3_MBOX0_PEEK_OFFSET         ULL(0x00000010)
+#define RPI3_MBOX0_SENDER_OFFSET       ULL(0x00000014)
+#define RPI3_MBOX0_STATUS_OFFSET       ULL(0x00000018)
+#define RPI3_MBOX0_CONFIG_OFFSET       ULL(0x0000001C)
+/* ARM -> VideoCore */
+#define RPI3_MBOX1_WRITE_OFFSET                ULL(0x00000020)
+#define RPI3_MBOX1_PEEK_OFFSET         ULL(0x00000030)
+#define RPI3_MBOX1_SENDER_OFFSET       ULL(0x00000034)
+#define RPI3_MBOX1_STATUS_OFFSET       ULL(0x00000038)
+#define RPI3_MBOX1_CONFIG_OFFSET       ULL(0x0000003C)
+/* Mailbox status constants */
+#define RPI3_MBOX_STATUS_FULL_MASK     U(0x80000000) /* Set if full */
+#define RPI3_MBOX_STATUS_EMPTY_MASK    U(0x40000000) /* Set if empty */
+
+/*
+ * Power management, reset controller, watchdog.
+ */
+#define RPI3_IO_PM_OFFSET              ULL(0x00100000)
+#define RPI3_PM_BASE                   (RPI3_IO_BASE + RPI3_IO_PM_OFFSET)
+/* Registers on top of RPI3_PM_BASE. */
+#define RPI3_PM_RSTC_OFFSET            ULL(0x0000001C)
+#define RPI3_PM_RSTS_OFFSET            ULL(0x00000020)
+#define RPI3_PM_WDOG_OFFSET            ULL(0x00000024)
+/* Watchdog constants */
+#define RPI3_PM_PASSWORD               U(0x5A000000)
+#define RPI3_PM_RSTC_WRCFG_MASK                U(0x00000030)
+#define RPI3_PM_RSTC_WRCFG_FULL_RESET  U(0x00000020)
+/*
+ * The RSTS register is used by the VideoCore firmware when booting the
+ * Raspberry Pi to know which partition to boot from. The partition value is
+ * formed by bits 0, 2, 4, 6, 8 and 10. Partition 63 is used by said firmware
+ * to indicate halt.
+ */
+#define RPI3_PM_RSTS_WRCFG_HALT                U(0x00000555)
+
+/*
+ * Hardware random number generator.
+ */
+#define RPI3_IO_RNG_OFFSET             ULL(0x00104000)
+#define RPI3_RNG_BASE                  (RPI3_IO_BASE + RPI3_IO_RNG_OFFSET)
+#define RPI3_RNG_CTRL_OFFSET           ULL(0x00000000)
+#define RPI3_RNG_STATUS_OFFSET         ULL(0x00000004)
+#define RPI3_RNG_DATA_OFFSET           ULL(0x00000008)
+#define RPI3_RNG_INT_MASK_OFFSET       ULL(0x00000010)
+/* Enable/disable RNG */
+#define RPI3_RNG_CTRL_ENABLE           U(0x1)
+#define RPI3_RNG_CTRL_DISABLE          U(0x0)
+/* Number of currently available words */
+#define RPI3_RNG_STATUS_NUM_WORDS_SHIFT        U(24)
+#define RPI3_RNG_STATUS_NUM_WORDS_MASK U(0xFF)
+/* Value to mask interrupts caused by the RNG */
+#define RPI3_RNG_INT_MASK_DISABLE      U(0x1)
+
+/*
+ * Serial port (called 'Mini UART' in the BCM docucmentation).
+ */
+#define RPI3_IO_MINI_UART_OFFSET       ULL(0x00215040)
+#define RPI3_MINI_UART_BASE            (RPI3_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
+#define RPI3_MINI_UART_CLK_IN_HZ       ULL(500000000)
+
+/*
+ * GPIO controller
+ */
+#define RPI3_IO_GPIO_OFFSET            ULL(0x00200000)
+#define RPI3_GPIO_BASE                 (RPI3_IO_BASE + RPI3_IO_GPIO_OFFSET)
+
+/*
+ * SDHost controller
+ */
+#define RPI3_IO_SDHOST_OFFSET           ULL(0x00202000)
+#define RPI3_SDHOST_BASE                (RPI3_IO_BASE + RPI3_IO_SDHOST_OFFSET)
+
+/*
+ * Local interrupt controller
+ */
+#define RPI3_INTC_BASE_ADDRESS                 ULL(0x40000000)
+/* Registers on top of RPI3_INTC_BASE_ADDRESS */
+#define RPI3_INTC_CONTROL_OFFSET               ULL(0x00000000)
+#define RPI3_INTC_PRESCALER_OFFSET             ULL(0x00000008)
+#define RPI3_INTC_MBOX_CONTROL_OFFSET          ULL(0x00000050)
+#define RPI3_INTC_MBOX_CONTROL_SLOT3_FIQ       ULL(0x00000080)
+#define RPI3_INTC_PENDING_FIQ_OFFSET           ULL(0x00000070)
+#define RPI3_INTC_PENDING_FIQ_MBOX3            ULL(0x00000080)
+
+#endif /* RPI_HW_H */

diff --git a/plat/rpi/rpi3/rpi3_common.c b/plat/rpi/rpi3/rpi3_common.c
index 9b10974adbe2ffc78f8b7b36978422da7dc83595..85a26c22269ee101b08ae18547e5c40ebbaaf294 100644 (file)
--- a/plat/rpi/rpi3/rpi3_common.c
+++ b/plat/rpi/rpi3/rpi3_common.c
@@ -16,7 +16,7 @@
 #include <drivers/ti/uart/uart_16550.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
 
-#include "rpi3_hw.h"
+#include <rpi_hw.h>
 #include "rpi3_private.h"
 
 #define MAP_DEVICE0    MAP_REGION_FLAT(DEVICE0_BASE,                   \

diff --git a/plat/rpi/rpi3/rpi3_hw.h b/plat/rpi/rpi3/rpi3_hw.h
deleted file mode 100644 (file)
index 1a86835..0000000
--- a/plat/rpi/rpi3/rpi3_hw.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef RPI3_HW_H
-#define RPI3_HW_H
-
-#include <lib/utils_def.h>
-
-/*
- * Peripherals
- */
-
-#define RPI3_IO_BASE                   ULL(0x3F000000)
-#define RPI3_IO_SIZE                   ULL(0x01000000)
-
-/*
- * ARM <-> VideoCore mailboxes
- */
-#define RPI3_MBOX_OFFSET               ULL(0x0000B880)
-#define RPI3_MBOX_BASE                 (RPI3_IO_BASE + RPI3_MBOX_OFFSET)
-/* VideoCore -> ARM */
-#define RPI3_MBOX0_READ_OFFSET         ULL(0x00000000)
-#define RPI3_MBOX0_PEEK_OFFSET         ULL(0x00000010)
-#define RPI3_MBOX0_SENDER_OFFSET       ULL(0x00000014)
-#define RPI3_MBOX0_STATUS_OFFSET       ULL(0x00000018)
-#define RPI3_MBOX0_CONFIG_OFFSET       ULL(0x0000001C)
-/* ARM -> VideoCore */
-#define RPI3_MBOX1_WRITE_OFFSET                ULL(0x00000020)
-#define RPI3_MBOX1_PEEK_OFFSET         ULL(0x00000030)
-#define RPI3_MBOX1_SENDER_OFFSET       ULL(0x00000034)
-#define RPI3_MBOX1_STATUS_OFFSET       ULL(0x00000038)
-#define RPI3_MBOX1_CONFIG_OFFSET       ULL(0x0000003C)
-/* Mailbox status constants */
-#define RPI3_MBOX_STATUS_FULL_MASK     U(0x80000000) /* Set if full */
-#define RPI3_MBOX_STATUS_EMPTY_MASK    U(0x40000000) /* Set if empty */
-
-/*
- * Power management, reset controller, watchdog.
- */
-#define RPI3_IO_PM_OFFSET              ULL(0x00100000)
-#define RPI3_PM_BASE                   (RPI3_IO_BASE + RPI3_IO_PM_OFFSET)
-/* Registers on top of RPI3_PM_BASE. */
-#define RPI3_PM_RSTC_OFFSET            ULL(0x0000001C)
-#define RPI3_PM_RSTS_OFFSET            ULL(0x00000020)
-#define RPI3_PM_WDOG_OFFSET            ULL(0x00000024)
-/* Watchdog constants */
-#define RPI3_PM_PASSWORD               U(0x5A000000)
-#define RPI3_PM_RSTC_WRCFG_MASK                U(0x00000030)
-#define RPI3_PM_RSTC_WRCFG_FULL_RESET  U(0x00000020)
-/*
- * The RSTS register is used by the VideoCore firmware when booting the
- * Raspberry Pi to know which partition to boot from. The partition value is
- * formed by bits 0, 2, 4, 6, 8 and 10. Partition 63 is used by said firmware
- * to indicate halt.
- */
-#define RPI3_PM_RSTS_WRCFG_HALT                U(0x00000555)
-
-/*
- * Hardware random number generator.
- */
-#define RPI3_IO_RNG_OFFSET             ULL(0x00104000)
-#define RPI3_RNG_BASE                  (RPI3_IO_BASE + RPI3_IO_RNG_OFFSET)
-#define RPI3_RNG_CTRL_OFFSET           ULL(0x00000000)
-#define RPI3_RNG_STATUS_OFFSET         ULL(0x00000004)
-#define RPI3_RNG_DATA_OFFSET           ULL(0x00000008)
-#define RPI3_RNG_INT_MASK_OFFSET       ULL(0x00000010)
-/* Enable/disable RNG */
-#define RPI3_RNG_CTRL_ENABLE           U(0x1)
-#define RPI3_RNG_CTRL_DISABLE          U(0x0)
-/* Number of currently available words */
-#define RPI3_RNG_STATUS_NUM_WORDS_SHIFT        U(24)
-#define RPI3_RNG_STATUS_NUM_WORDS_MASK U(0xFF)
-/* Value to mask interrupts caused by the RNG */
-#define RPI3_RNG_INT_MASK_DISABLE      U(0x1)
-
-/*
- * Serial port (called 'Mini UART' in the BCM docucmentation).
- */
-#define RPI3_IO_MINI_UART_OFFSET       ULL(0x00215040)
-#define RPI3_MINI_UART_BASE            (RPI3_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
-#define RPI3_MINI_UART_CLK_IN_HZ       ULL(500000000)
-
-/*
- * GPIO controller
- */
-#define RPI3_IO_GPIO_OFFSET            ULL(0x00200000)
-#define RPI3_GPIO_BASE                 (RPI3_IO_BASE + RPI3_IO_GPIO_OFFSET)
-
-/*
- * SDHost controller
- */
-#define RPI3_IO_SDHOST_OFFSET           ULL(0x00202000)
-#define RPI3_SDHOST_BASE                (RPI3_IO_BASE + RPI3_IO_SDHOST_OFFSET)
-
-/*
- * Local interrupt controller
- */
-#define RPI3_INTC_BASE_ADDRESS                 ULL(0x40000000)
-/* Registers on top of RPI3_INTC_BASE_ADDRESS */
-#define RPI3_INTC_CONTROL_OFFSET               ULL(0x00000000)
-#define RPI3_INTC_PRESCALER_OFFSET             ULL(0x00000008)
-#define RPI3_INTC_MBOX_CONTROL_OFFSET          ULL(0x00000050)
-#define RPI3_INTC_MBOX_CONTROL_SLOT3_FIQ       ULL(0x00000080)
-#define RPI3_INTC_PENDING_FIQ_OFFSET           ULL(0x00000070)
-#define RPI3_INTC_PENDING_FIQ_MBOX3            ULL(0x00000080)
-
-#endif /* RPI3_HW_H */

diff --git a/plat/rpi/rpi3/rpi3_mbox.c b/plat/rpi/rpi3/rpi3_mbox.c
index 2db605edf0b0a4c561580afe51f94f791fe75051..03b395e787ed1e8e920f002df72a3bd6814da706 100644 (file)
--- a/plat/rpi/rpi3/rpi3_mbox.c
+++ b/plat/rpi/rpi3/rpi3_mbox.c
@@ -12,7 +12,7 @@
 #include <common/debug.h>
 #include <lib/mmio.h>
 
-#include "rpi3_hw.h"
+#include <rpi_hw.h>
 
 /* This struct must be aligned to 16 bytes */
 typedef struct __packed __aligned(16) rpi3_mbox_request {

diff --git a/plat/rpi/rpi3/rpi3_pm.c b/plat/rpi/rpi3/rpi3_pm.c
index 4f586b51408774dc80ab1fa24b3a30bf6ede0bfa..b79e2736e5a41f3f7bb2d8973631a4e336058e86 100644 (file)
--- a/plat/rpi/rpi3/rpi3_pm.c
+++ b/plat/rpi/rpi3/rpi3_pm.c
@@ -15,7 +15,7 @@
 #include <lib/psci/psci.h>
 #include <plat/common/platform.h>
 
-#include "rpi3_hw.h"
+#include <rpi_hw.h>
 
 /* Make composite power state parameter till power level 0 */
 #if PSCI_EXTENDED_STATE_ID

diff --git a/plat/rpi/rpi3/rpi3_rng.c b/plat/rpi/rpi3/rpi3_rng.c
index fd69adbf31c160c9046f6b772fa0793fc5a6e99f..b6bf0052a95b69bf69b0cfbeac8cb4ad5c037a46 100644 (file)
--- a/plat/rpi/rpi3/rpi3_rng.c
+++ b/plat/rpi/rpi3/rpi3_rng.c
@@ -9,7 +9,7 @@
 
 #include <lib/mmio.h>
 
-#include "rpi3_hw.h"
+#include <rpi_hw.h>
 
 /* Initial amount of values to discard */
 #define RNG_WARMUP_COUNT       U(0x40000)