ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default

Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.

0x0: OMAP5 ES1 behavior, CPU cores would enter and exit OFF mode together.
     Broken! Fortunately, we do not support this anymore.
0x1: OMAP5 ES2, DRA7 behavior, CPU cores are allowed to enter/exit OFF mode
     independently.

This is one time settings thanks to always ON domain.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[nm@ti.com: minor conflict resolutions, consolidation for DRA7]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>

diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index 3e97c6c8ecf139781c7f0d03a68583d5ff81ea2b..dec2b05d184bd329cf990fef3477bfe36f1bb7cb 100644 (file)
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -45,6 +45,7 @@
 #define OMAP4_MON_L2X0_PREFETCH_INDEX  0x113
 
 #define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX        0x109
+#define OMAP5_MON_AMBA_IF_INDEX                0x108
 
 /* Secure PPA(Primary Protected Application) APIs */
 #define OMAP4_PPA_L2_POR_INDEX         0x23

diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 37843a7d3639fcc5188eff429fdfaffe729b82b5..e844e1603d76b843af373049b3bd9d5e71308433 100644 (file)
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -406,6 +406,7 @@ int __init omap_wakeupgen_init(void)
 {
        int i;
        unsigned int boot_cpu = smp_processor_id();
+       u32 val;
 
        /* Not supported on OMAP4 ES1.0 silicon */
        if (omap_rev() == OMAP4430_REV_ES1_0) {
@@ -451,6 +452,22 @@ int __init omap_wakeupgen_init(void)
        for (i = 0; i < max_irqs; i++)
                irq_target_cpu[i] = boot_cpu;
 
+       /*
+        * Enables OMAP5 ES2 PM Mode using ES2_PM_MODE in AMBA_IF_MODE
+        * 0x0: ES1 behavior, CPU cores would enter and exit OFF mode together.
+        * 0x1: ES2 behavior, CPU cores are allowed to enter/exit OFF mode
+        * independently.
+        * This needs to be set one time thanks to always ON domain.
+        *
+        * We do not support ES1 behavior anymore. OMAP5 is assumed to be
+        * ES2.0, and the same is applicable for DRA7.
+        */
+       if (soc_is_omap54xx() || soc_is_dra7xx()) {
+               val = __raw_readl(wakeupgen_base + OMAP_AMBA_IF_MODE);
+               val |= BIT(5);
+               omap_smc1(OMAP5_MON_AMBA_IF_INDEX, val);
+       }
+
        irq_hotplug_init();
        irq_pm_init();
 

diff --git a/arch/arm/mach-omap2/omap-wakeupgen.h b/arch/arm/mach-omap2/omap-wakeupgen.h
index b0fd16f5c3912a8ed9addba17f58d73a52b338bb..b3c8eccfae790de050f853d7528662a3a5c33aa2 100644 (file)
--- a/arch/arm/mach-omap2/omap-wakeupgen.h
+++ b/arch/arm/mach-omap2/omap-wakeupgen.h
@@ -27,6 +27,7 @@
 #define OMAP_WKG_ENB_E_1                       0x420
 #define OMAP_AUX_CORE_BOOT_0                   0x800
 #define OMAP_AUX_CORE_BOOT_1                   0x804
+#define OMAP_AMBA_IF_MODE                      0x80c
 #define OMAP_PTMSYNCREQ_MASK                   0xc00
 #define OMAP_PTMSYNCREQ_EN                     0xc04
 #define OMAP_TIMESTAMPCYCLELO                  0xc08